DETAILED ACTION
Status of Claims
The status of the claims is as follows:
(a) Claims 1-20 remain pending.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendments
The Examiner accepts the amendments received on 04/07/2026.
(a) The Examiner has considered Applicant’s arguments regarding the previous rejection under 35 U.S.C. § 101 and finds the arguments persuasive. The independent claims, as currently presented, are directed to an improvement to the system itself rather than merely reciting an abstract idea. Accordingly, the previous rejection under 35 U.S.C. § 101 is withdrawn.
Response to Arguments
The Examiner has considered the Applicant’s submitted Remarks, filed on 04/07/2026. The Examiner below proceeds with a bona fide attempt to respond properly to each argument raised by the Applicant.
To begin, the Applicant argues that “Emmart’s discussion of storing floating-point values in the array does not teach or suggest receiving ‘a command comprising a floating-point index,’ as recited by the claims.” Applicant further argues that “[a]n index into an array identifies a location in memory of a stored value, and is not a stored value itself.” The Examiner respectfully disagrees. Emmart teaches modifying a floating-point number to identify an integer value, including adjusting the floating-point number so that an integer approximation is identified with less processing power than applying a conversion function (Emmart, Paragraph [0130]). Emmart further teaches extracting fixed-point bits from the shifted floating-point number as an integer value or an approximation of a corresponding value (Emmart, Paragraph [0130]). Emmart further teaches that execution units operate on arrays of data elements and support integer and floating-point data types (Emmart, Paragraph [0426]). Thus, Emmart teaches using a floating-point number to access integer information used by the hardware, which teaches or at least suggests the claimed use of a floating-point index to determine integer-indexed memory locations.
Assuming arguendo that Emmart alone does not expressly teach the full “floating-point index into an integer-indexed array” limitation, Henry further supports the index/addressing aspect of the limitation. Henry teaches a data RAM arranged as rows of data words and a weight RAM arranged as rows of weight words, with memory addresses and read commands used to select data words and weight words from the RAM structures (Henry, Paragraphs [0110]-[0114]). Henry further teaches using addresses to select rows and locations within rows of the data RAM or weight RAM (Henry, Paragraphs [0110]-[0114]). Thus, even under Applicant’s position that an index identifies a location of a stored value, Henry teaches indexed memory structures and address-based selection of values from memory.
Applicant further argues that dependent claims 2-13, 15-17, 19, and 20 are allowable for at least the same reasons as the independent claims. The Examiner respectfully disagrees for at least the reasons set forth above. Applicant has not presented separate arguments for the dependent claims. Accordingly, the dependent claims remain unpatentable for the reasons set forth with respect to their respective independent claims and for the reasons set forth in the rejection.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over Emmart U.S. P.G. Publication 2021/0064338 (hereinafter, Emmart), in view of Henry et al. U.S. P.G. Publication 2018/0189639 (hereinafter, Henry).
Regarding Claim 1, Emmart describes a system comprising:
-a memory array (memory array (e.g., GDDR5), Emmart, Paragraphs 0130 and 0237 and Figures 15B, 18A, 23-24, 27, and 29); and
-a memory controller coupled to the memory array and configured to perform operations (memory controller coupled to memory and can perform operations, Emmart, Paragraph 0376, 0277, and 0237 and Figures 15B, 18A, 23-24, 27, and 29), comprising:
-receiving, via a bus, a command comprising a floating-point index into an integer-indexed array of values stored in the memory array (memory controller can issue a command for indexing or storing floating point values into an array of memory, Emmart, Paragraphs 0277-0288 and Figures 15B, 18A, 23-24, 27, and 29);
-determining, based on the floating-point index, a first address of a first value of the integer-indexed array of values and a second address of a second value of the array of values (overall processing system would know a first address of a first value of the array of values (e.g., a location for a value) and a second address of a second value within an array of values (e.g., a second location for some value, Emmart, Paragraphs 0236-0237 and Figures 15B, 18A, 23-24, 27, and 29);
-accessing, from the memory array, the first value from the first address and the second value from the second address (capable of accessing the values from the memory array, values accessed can be the first value at a first address and a second value at a second memory address, Emmart, Paragraphs 0236-0237 and Figures 15B, 18A, 23-24, 27, and 29);
…
-providing, in response to the command, the interpolated value (providing for an interpolated value, Emmart, Paragraph 0426).
Henry does not specifically disclose the system to include determining, based on the first weight for the first value, the first value, a second weight for the second value, and the second weight, an interpolated value.
Henry discloses, teaches, or at least suggests the missing limitation(s). Henry describes a memory system that is capable of determining both weight values and applying said weight values to other values stored in floating-point index memory arrays (Henry, Paragraphs 0110-0130)
As a result, a person of ordinary skill in the art, before the effective filing date of the claimed invention, would have found it obvious to modify the system of Emmart to include determining, based on the first weight for the first value, the first value, a second weight for the second value, and the second weight, an interpolated value, as disclosed, taught, or at least suggested by Henry.
It would have been obvious to combine and modify the cited references, with a reasonable expectation of success because storing, determining, and accessing memory values in the limitations stated above allow for improved performance and efficiently in computing / data accessing (Henry, Paragraph 0003).
Regarding Claim 2, Emmart, as modified, describes the system of claim 1, further comprising: circuits to control a vehicle (autonomous vehicle, Emmart, Paragraph 0100 and Figure 10A); and one or more processing elements configured to perform operations comprising: using the interpolated value to generate an image from synthetic aperture radar (SAR) pulse data (processing values from images generated by a variety of sensors, like radar pulse data, Emmart, Paragraphs 0110-00120 and 0144-0148); providing the image to a trained machine learning model; and using a result from the trained machine learning model to generate inputs to the circuits to control the vehicle (machine learning with data, Emmart, Paragraphs 0144-0148).
Regarding Claim 3, Emmart, as modified, describes the system of claim 2, wherein: the one or more processing elements are further configured to cause interpolated values for generation of the image to be determined by multiple memory controllers connected in a hybrid threading fabric (hybrid threading fabric, Emmart, Paragraphs 0235, 0276).
Regarding Claim 4, Emmart, as modified, describes the system of claim 1, wherein:
the bus is part of a network on chip (NOC); and the command is received from a host processor (network on a chip and commands can be received by a host processor, Emmart, Paragraph 0142 and Figures 15B, 18A, 23-24, 27, and 29).
Regarding Claim 5, Emmart, as modified, describes the system of claim 1, wherein the providing of the interpolated value comprises providing the interpolated value via a network on chip (NOC) hub edge to a hybrid threading processor (HTP) (interpolated values, via network on a chip, using a hybrid threading processor and process, Emmart, Paragraphs 0426-0429).
Regarding Claim 6, Emmart, as modified, describes the system of claim 1, wherein the memory controller is a memory controller chiplet of a computer near memory (CNM) system (memory controller is a computer near memory, Emmart, Figures 15B, 18A, 23-24, 27, and 29).
Regarding Claim 7, Emmart, as modified, describes the system of claim 1, wherein:
the system further comprises a cache memory (cache memory, Emmart, Paragraph 0077 and 0325); and the operations further comprise:
receiving, prior to the receiving of the command, a second command that indicates an address of a beginning of the array of values and a number of values in the array of values; and in response to the second command, storing the address and the number of values in the cache memory (via a command, storing values at an address, wherein the address is the start of an array, Emmart, Paragraphs 0236-0237, 0077, and 0325 and Figures 15B, 18A, 23-24, 27, and 29).
Regarding Claim 8, Emmart, as modified, describes the system of claim 1, wherein:
the received command is a single instruction/multiple data (SIMD) command that comprises multiple floating-point indices into multiple arrays of values stored in the memory array, the multiple floating-point indices comprising the floating-point index (SIMD commands, multiple floating point data handling in multiple arrays of memory, Emmart, Paragraph 0321 and Figure 20C).
Regarding Claim 9, Emmart, as modified, describes the system of claim 8, wherein:
the SIMD command is pipelined such that at least one of the multiple floating-point indices is processed each clock cycle (SIMD architecture is to handle a floating point index per clock cycle, Emmart, Paragraphs 0321-0324 and Figure 20C).
Regarding Claim 10, Emmart, as modified, describes the system of claim 1, wherein:
the floating-point index has a value between a first integer index of the array of values and a second integer index of the array of values; and the first address corresponds to the first integer index and the second address corresponds to the second integer index (storing values following a floating point index system that corresponds to integer index of the array of values, wherein the integer index values can be stored at a first address and a second address, Emmart, Paragraph 0286-0291 and Figures 15B, 18A, 23-24, 27, and 29).
Regarding Claim 11, Emmart, as modified, describes the system of claim 10, wherein the operations further comprise: performing bounds-checking on the floating-point index (setting bound checking for floating point indexes, Emmart, Paragraph 0064).
Regarding Claim 12, Emmart, as modified, describes the system of claim 11, wherein:
the first number of bits is 64 bits; and the second number of bits is 32 bits (64 bits and 32 bits used, Emmart, Paragraphs 0072 and 0430).
Regarding Claim 13, Emmart, as modified, describes the system of claim 1.
Henry does not specifically disclose the system to include determining of the interpolated value comprises: determining a first product of the first value with the first weight; determining a second product of the second value with the second weight; and determining the interpolated value as a sum of the first product and the second product.
Henry discloses, teaches, or at least suggests the missing limitation(s). Henry describes a memory system that is capable of determining both weight values and applying said weight values to other values stored in floating-point index memory arrays (Henry, Paragraphs 0110-0130).
As a result, a person of ordinary skill in the art, before the effective filing date of the claimed invention, would have found it obvious to modify the system of Emmart to include determining of the interpolated value comprises: determining a first product of the first value with the first weight; determining a second product of the second value with the second weight; and determining the interpolated value as a sum of the first product and the second product, as disclosed, taught, or at least suggested by Henry.
It would have been obvious to combine and modify the cited references, with a reasonable expectation of success because storing, determining, and accessing memory values in the limitations stated above allow for improved performance and efficiently in computing / data accessing (Henry, Paragraph 0003).
Regarding Claim 14, Emmart describes a non-transitory machine-readable medium that stores instructions that, when executed by a system, cause the system to perform operations (memory controller coupled to memory and can perform operations, Emmart, Paragraph 0376, 0277, and 0237 and Figures 15B, 18A, 23-24, 27, and 29) comprising:
-receiving, via a bus, a command comprising a floating-point index into an integer-indexed array of values stored in a memory array (memory controller can issue a command for indexing or storing floating point values into an array of memory, Emmart, Paragraphs 0277-0288 and Figures 15B, 18A, 23-24, 27, and 29);
-determining, based on the floating-point index, a first address of a first value of the integer-indexed array of values and a second address of a second value of the integer-indexed array of values (overall processing system would know a first address of a first value of the array of values (e.g., a location for a value) and a second address of a second value within an array of values (e.g., a second location for some value, Emmart, Paragraphs 0236-0237 and Figures 15B, 18A, 23-24, 27, and 29);
-accessing, from the memory array, the first value from the first address and the second value from the second address (capable of accessing the values from the memory array, values accessed can be the first value at a first address and a second value at a second memory address, Emmart, Paragraphs 0236-0237 and Figures 15B, 18A, 23-24, 27, and 29);
…
-providing, in response to the command, the interpolated value (providing for an interpolated value, Emmart, Paragraph 0426)..
Henry does not specifically disclose the medium to include determining, based on the floating-point index, a first weight for the first value and a second weight for the second value; determining, based on the first weight, the first value, the second weight, and the second value, an interpolated value.
Henry discloses, teaches, or at least suggests the missing limitation(s). Henry describes a memory system that is capable of determining both weight values and applying said weight values to other values stored in floating-point index memory arrays (Henry, Paragraphs 0110-0130)
As a result, a person of ordinary skill in the art, before the effective filing date of the claimed invention, would have found it obvious to modify the medium of Emmart to include determining, based on the floating-point index, a first weight for the first value and a second weight for the second value; determining, based on the first weight, the first value, the second weight, and the second value, an interpolated value, as disclosed, taught, or at least suggested by Henry.
It would have been obvious to combine and modify the cited references, with a reasonable expectation of success because storing, determining, and accessing memory values in the limitations stated above allow for improved performance and efficiently in computing / data accessing (Henry, Paragraph 0003).
Regarding Claim 15, the Applicant’s claim has similar limitations to claim 6 and therefore are rejected for similar reasons set forth by the Examiner in the rejection of said claim.
Regarding Claim 16, the Applicant’s claim has similar limitations to claim 2 and therefore are rejected for similar reasons set forth by the Examiner in the rejection of said claim.
Regarding Claim 17, the Applicant’s claim has similar limitations to claim 7 and therefore are rejected for similar reasons set forth by the Examiner in the rejection of said claim.
Regarding Claim 18, the Applicant’s claim has similar limitations to claim 1 and therefore are rejected for similar reasons set forth by the Examiner in the rejection of said claim.
Regarding Claim 19, the Applicant’s claim has similar limitations to claim 2 and therefore are rejected for similar reasons set forth by the Examiner in the rejection of said claim.
Regarding Claim 20, the Applicant’s claim has similar limitations to claim 3 and therefore are rejected for similar reasons set forth by the Examiner in the rejection of said claim.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANDREW J CROMER whose telephone number is (313)446-6563. The examiner can normally be reached M-F: ~ 8:15 A.M. - 6:00 P.M..
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Faris Almatrahi can be reached at (313) 446-4821. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ANDREW J CROMER/Examiner, Art Unit 3667
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