Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This action is in response to the application filed on 11/15/2024.
Claim Objections
Claims 1, 2, 5, 6, and 10 are objected to because of the following informalities: Regarding claim 1, in lines 19-20, “the output voltage signal from the isolated SMPS” appears that it should read as “an output voltage signal from the isolated SMPS”.
Regarding claim 2, in line 2, “the respective synchronous rectifier” appears that it should read as “a respective synchronous rectifier”;in line 3, “the specific power switch” appears that it should read as “that respective power switch”. Regarding claim 5, the variable “i” is recited (e.g., “an i-th one of the second logic control modules”) without being defined in the claim. A clause defining the range of i, e.g., “wherein i is an integer from 2 to N,” is suggested. Regarding claim 6, in line 2, “the current thresholds are adapted to” appears that it should read as “the current threshold is adapted to”. Regarding claim 10, in line 4, “a primary side reference ground” appears that it should read as “the primary side reference ground”;in line 6-7, “a secondary side reference ground” appears that it should read as “the secondary side reference ground.”
Appropriate correction is required.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1, 2, 3, 6, 7, 8, 9, 10, and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Ilic et al. (US Patent US 6,031,747, hereinafter “Ilic”) in view of Vemuri et al. (US Patent Application Publication US 2017/0033698 A1, hereinafter “Vemuri”). Regarding claim 1, Ilic discloses (see Fig. 3 and Fig. 6) an isolated switched-mode power supply (SMPS) (switching power supply 20 with transformer isolation) comprising N primary side circuits, N secondary side circuits, an isolated control module, and N transformers (converter stage A and converter stage B, each having a transformer 22, 24, where N=2), each of the primary side circuits comprising a power switch (Q1, Q3), each of the secondary side circuits comprising a synchronous rectifier (Q2, Q4; see col. 5, “Secondary side power switches Q2 and Q4 may be synchronous rectifiers”), each of the transformers comprising a primary winding connected in series with the power switch in a respective one of the primary side circuits between an input terminal of the isolated SMPS and a primary side reference ground (LPR1 in series with Q1, and LPR2 in series with Q3, between the input Vin/Cin and ground), each of the transformers comprising a secondary winding connected in series with the synchronous rectifier in a respective one of the secondary side circuits between an output terminal of the isolated SMPS and a secondary side reference ground (LSEC1 in series with Q2, and LSEC2 in series with Q4, between the output Vout/Cout and ground), where N is an integer greater than or equal to 2 (two converter stages); wherein the isolated control module comprises a primary side control module and an optocoupler (PWM controller U51 and optocoupler U54 of Fig. 6), the primary side control module being connected to control terminals of the power switches and generating, based on optocoupler signals, N PWM signals staggered in phase from one another and transmitting the N PWM signals to the control terminals of the respective power switches (see Fig. 4 and col. 5-7; U51 generates PWM_A and PWM_B such that the converter stages operate “180 degrees out of phase”, the optocoupler U54 conveying to U51 a control signal derived from the output voltage).
Ilic does not disclose that the isolated control module comprises a secondary side control module connected to control terminals of the synchronous rectifiers, wherein the secondary side control module turns on or off the synchronous rectifiers based on respective N winding voltage signals from the secondary windings in the respective transformers, and the secondary side control module generates the optocoupler drive signals based on the output voltage signal from the isolated SMPS and the respective winding voltage signals, the optocoupler receiving the optocoupler drive signals and outputting the optocoupler signals to the primary side control module.
However, Vemuri teaches (see Fig. 1) an isolated control module comprising a primary side control circuit (114) and a secondary side control circuit (130) connected to a control terminal of a synchronous rectifier (S2), wherein the secondary side control circuit turns the synchronous rectifier on or off based on a winding voltage signal from the secondary winding (see [0020], the second control circuit 130 “operates as a synchronous rectifier controller to turn on the switch S2” based on the switch voltage signal VDS2 received at input 131; see also [0035]), and the secondary side control circuit generates a feedback control signal based on the output voltage signal and the winding voltage signal (see [0029]-[0030]; the second control logic 140 receives the output voltage VO at input 134 and the winding voltage VDS2 at input 131, the VO regulation circuit 300 generating a cycle-start request to regulate the output voltage).
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the isolated SMPS of Ilic to comprise the secondary side control module that turns the synchronous rectifiers on or off based on the respective winding voltage signals and that generates the optocoupler drive signals based on the output voltage signal and the respective winding voltage signals, the optocoupler outputting the optocoupler signals to the primary side control module, as taught by Vemuri, because it provides “tighter output Voltage regulation, better transient response” by sensing the output directly on the secondary side (see Vemuri [0003]).
Regarding claim 2, Ilic discloses (see Fig. 3 and Fig. 6) wherein a turn-on time of each power switch is later than a turn-off time of the respective synchronous rectifier that is connected to the same transformer as the power switch (see col. 5, “turning Q1 ON” following a short delay after Q2 is turned OFF, such that the power switch Q1 is turned on later than the synchronous rectifier Q2 of the same converter stage is turned off).
Regarding claim 3, Ilic discloses (see Fig. 3 and Fig. 6) wherein the primary side control module comprises a current threshold and frequency control module and a first logic control module connected to the current threshold and frequency control module (PWM controller U51 of Fig. 6 is a current-mode PWM controller having an oscillator that sets the switching frequency and a current-sense comparator that sets a current threshold), the current threshold and frequency control module adapted to generate a current threshold and frequency signals based on the optocoupler signals (U51 generates the gating based on the optocoupler-derived feedback together with the sensed current threshold and oscillator frequency), the first logic control module adapted to generate the N PWM signals based on the current threshold and the frequency signals (U51 generates the staggered PWM_A and PWM_B).
Regarding claim 6, Ilic discloses (see Fig. 3 and Fig. 6) wherein the frequency signals are adapted for phase staggering of the N PWM signals (converter stages A and B are operated 180 degrees out of phase, see Fig. 4), and the primary side control module is adapted to sample the current in each of the power switches (the primary current is sensed through Q1 and Q3 via current sensors curr_A and curr_B, see Fig. 6 and col. 6). Ilic does not disclose that the current threshold is adapted to be compared with the currents through the respective power switches such that, when the current in any of the power switches reaches the current threshold, the power switch is turned off. However, Vemuri teaches (see Fig. 2) a peak current control circuit (216) that turns the power switch (S1) off when the current-sense signal (CS) reaches a predetermined current level (see [0025]). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the isolated SMPS of Ilic so that each power switch is turned off when the current therethrough reaches the current threshold, as taught by Vemuri, because peak current-mode control provides cycle-by-cycle current limiting and regulation of the power delivered in each switching cycle (see [0025] of Vemuri).
Regarding claim 7, Ilic discloses (see Fig. 3 and Fig. 6) wherein the secondary side control module comprises an optocoupler drive module that converts a control signal derived from the output voltage into an optocoupler drive signal for driving the optocoupler (op-amp U55 senses the output voltage and drives optocoupler U54, see Fig. 6 and col. 6-7). Ilic does not disclose a third logic control module connected to an input terminal of the optocoupler drive module and adapted to output first control signals to the optocoupler drive module based on the output voltage signal and the N winding voltage signals. However, Vemuri teaches (see Fig. 3) a secondary side control logic circuit (140) that generates control signals based on the output voltage signal VO received at input 134 and the winding voltage signal VDS2 received at input 131 (see [0029]-[0030]). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the isolated SMPS of Ilic so that the secondary side control module comprises a third logic control module that outputs the first control signals to the optocoupler drive module based on the output voltage signal and the N winding voltage signals, as taught by Vemuri, because deriving the regulation signal from both the output voltage and the winding voltage enables secondary-side regulation with tighter output voltage regulation and better transient response (see [0003] of Vemuri).
Regarding claim 8, Ilic does not disclose that the third logic control module is connected to all the synchronous rectifiers and outputs, based on the N winding voltage signals, N second control signals each for turning on or off a respective one of the synchronous rectifiers. However, Vemuri teaches (see Fig. 3) a secondary side control logic circuit (140) that generates a synchronous-rectifier switching control signal (SC2) to turn the synchronous rectifier (S2) on or off based on the winding voltage signal (VDS2) (see [0035]). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the isolated SMPS of Ilic so that the third logic control module is connected to all N synchronous rectifiers and outputs N second control signals each turning a respective synchronous rectifier on or off based on the respective winding voltage signal, as taught by Vemuri, because winding-voltage-sensed synchronous rectification mitigates the voltage-drop inefficiencies of passive diode rectification (see [0020] of Vemuri).
Regarding claim 9, Ilic does not disclose that the third logic control module is adapted to determine whether any of the winding voltage signals reaches a first predetermined value and, in response, turn on the respective synchronous rectifier. However, Vemuri teaches (see Fig. 3) a normal synchronous rectifier control circuit (316) together with a transmission window circuit (302) that compares the winding voltage signal VDS2 with the output voltage VO and turns on the synchronous rectifier S2 when VDS2 indicates that the primary switch has turned off (see [0031] and [0035]). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the isolated SMPS of Ilic so that the third logic control module turns on a respective synchronous rectifier when its winding voltage signal reaches a first predetermined value, as taught by Vemuri, because timing the synchronous rectifier turn-on to the winding-voltage transition confines conduction to the secondary conduction interval and mitigates switching losses (see [0035]of Vemuri).
Regarding claim 10, Ilic discloses (see Fig. 3 and Fig. 6) further comprising a primary side capacitor and a secondary side capacitor (input filter capacitor Cin and output filter capacitor Cout, see Fig. 1 and Fig. 3), one end of the primary side capacitor connected to the input terminal of the isolated SMPS and the other end connected to the primary side reference ground (Cin connected between the input Vin and ground), and one end of the secondary side capacitor connected to the output terminal of the isolated SMPS and the other end connected to the secondary side reference ground (Cout connected between the output Vout and ground).
Regarding claim 11, Ilic modified in view of Vemuri discloses an isolated switched-mode power supply (SMPS) system comprising the isolated SMPS according to claim 1 (see rejection of claim 1 above) and a load connected to the output terminal of the isolated SMPS (output voltage Vout is provided to a load, see Fig. 6).
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Ilic in view of Vemuri, and further in view of Jiang et al. (US Patent Application Publication US 2021/0028704 A1, hereinafter “Jiang”). Regarding claim 4, Ilic in view of Vemuri discloses the primary side control module comprising a current threshold and frequency control module (as set forth above for claim 3). Ilic does not disclose that the primary side control module comprises N parallel-connected second logic control modules, a first one of the second logic control modules adapted to generate a first one of the PWM signals and (N-1) flag signals based on the current threshold and the frequency signals, and the remaining (N-1) ones of the second logic control modules adapted to generate the respective remaining ones of the PWM signals based on the respective flag signals.
However, Jiang teaches a primary-side controller comprising a plurality of parallel-connected control circuits in which a first (master) control circuit (101) generates a first switch control signal (PWM1) and a shared phase control signal having a plurality of pulses distributed to the remaining (slave) control circuits (102-10N) (see [0030]-[0031]; the first terminals of the control circuits are coupled together to share the phase control signal Set, which includes a plurality of pulses for “successively triggering the plurality of switching circuits”, the pulses being modulated to generate respective sequence information for each slave control circuit), and the remaining control circuits each generate their respective switch control signal (PWM2-PWMN) based on the respective distributed signal (see [0031] and [0034]).
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to implement the primary side control module of Ilic in view of Vemuri as N parallel-connected second logic control modules wherein a first one generates a first PWM signal and (N-1) flag signals and the remaining (N-1) modules generate the respective PWM signals based on the respective flag signals, as taught by Jiang, because the parallel master/slave architecture provides a scalable controller in which users “can easily change the number of phases” by adding control circuits without redesigning a single central controller (see [0032] of Jiang).
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Ilic in view of Vemuri, and further in view of Xu et al. (US Patent Application Publication US 2011/0025284 A1, hereinafter “Xu”).
Regarding claim 5, Ilic in view of Vemuri discloses the primary side control module comprising a current threshold and frequency control module (as set forth above for claim 3). Ilic does not disclose that the primary side control module comprises N series-connected second logic control modules, a first one adapted to generate a first one of the PWM signals and a first flag signal, a second one adapted to generate a second one of the PWM signals and a second flag signal based on the first flag signal, an i-th one adapted to generate an i-th one of the PWM signals and an i-th flag signal based on an (i-1)-th flag signal, and an N-th one adapted to generate an N-th one of the PWM signals based on an (N-1)-th flag signal.
However, Xu teaches a primary-side controller comprising a plurality of pulse-width-modulation generators connected in series, wherein “the PWM generators are connected into a daisy chain” (see [0030]), a master PWM generator (103) generating a first PWM signal and a first phase decode signal, and each subsequent PWM generator (i) generating its PWM signal and providing “the <i> phase decode signal for the next PWM generator in the daisy chain” based on the phase decode signal <i-1> received from the preceding generator (see [0031]-[0034] and Fig. 3).
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to implement the primary side control module of Ilic in view of Vemuri as N series-connected second logic control modules in which each i-th module generates its PWM signal and an i-th flag signal based on the (i-1)-th flag signal of the preceding module, as taught by Xu, because daisy-chaining the per-phase PWM generators provides a scalable, modular design in which any practical number of phases is realized by adding identical generators as building blocks (see [0042] of Xu).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: US Patent US 10,250,151 B1 discloses a flyback converter controlled from the secondary side with winding-voltage-sensed synchronous rectification.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JYE-JUNE LEE whose telephone number is (571)270-7726. The examiner can normally be reached on M-F 9 AM - 5 PM.
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/JYE-JUNE LEE/Examiner, Art Unit 2838
/JEFFREY A GBLENDE/Primary Examiner, Art Unit 2838
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