Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-20 are now pending in the application under prosecution and have been examined.
The specification has not been checked to the extent necessary to determine the presence of all possible minor errors.
The specification should be amended to reflect the status of all related application, whether patented or abandoned. Therefore, applications noted by their serial number and/or attorney docket number should be updated with correct serial number and patent number if patented.
The first instance of all acronyms or abbreviation should be spelled out for clarity, whether or not considered well known in the art.
In the response to this Office action, the Examiner respectfully requests that support be shown for language added to any original claims on amendment and any new claims. That is, indicate support for newly added claim language by specifically pointing to page(s) and line numbers in the specification and/or drawing figure(s). This will assist the Examiner in prosecuting this application.
Examiner cites particular columns and line numbers in the references as applied to the claims below for the convenience of the applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested that, in preparing responses, the applicant fully consider the references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner.
37 C.F.R. § 1.83(a) requires the Drawings to illustrate or show all claimed features.
Applicant must clearly point out the patentable novelty that they think the claims present, in view of the state of the art disclosed by the references cited or the objections made, and must also explain how the amendments avoid the references or objections. See 37 C.F.R. § 1.111(c).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over US 20220206691 (LEE et al) in view of US 8954381 B1 ( NAAMAD).
With respect to claim 13, LEE teaches a system comprising: a memory device controller
[storage system comprising storage arrays 102A-B may provide persistent data storage, Fig. 1A, 1C, 1D, 2D] comprising
a first control circuit and a second control circuit
(storage array to include one or more storage array controllers 110A-D)[Par. 0040-0041; Par 0277-0280];
a first memory zone comprising a first memory unit associated with the first control circuit and a second memory unit associated with the first control circuit
(storage array comprising storage drives 171A-F referred to as storage devices or resources in the form of non-volatile Random Access Memory (‘NVRAM’) devices with the storage array controller 110A-D configured to connect the NVRAM storage devices 171A-F) [Par. 0042-0044; Par. 0277-0280); (FIG. 1A show storage array where storage array controllers 110A-D are communicatively coupled to one or more storage drives 171A-F and to NVRAM devices that are included as part of a storage array 102A-B) [Par. 0049-0051]; storage drive 171A-F being zoned storage devices with a zoned namespace on the zoned storage device can be addressed by groups of blocks that are grouped, the group or zone size being settable or dynamically sized with differing defined membership and differing characteristic levels [Par. 0059; Par. 0277-0279].
LEE fails to specifically teach a second memory zone comprising a third memory unit associated with the second control circuit (featuring storage donation from one storage set to another storage set). However, NAAMAD teaches a multi-tiered storage system comprising a plurality of storage tiers (Tier1, TIER2, TIER3, Fig. 4); a plurality of physical devices, wherein each of the plurality of storage tiers includes a different portion of the plurality of physical devices, in which storage movement or reallocation is performed (Fig. 6, FIG. 8A) by: (1) designating a donor tier and a receiver tier; (2) calculating data movement criteria including one or more goal criteria including availability goal and a storage capacity goal (Fig. 14); and (3) allocating a first storage portion to a first storage tier, a second storage portion to the first set that would have been allocated to a second data tier is allocated to the first storage tier, i.e., moving storage portion (unused amount of physical storage) from donor tier to receiving tier (Fig. 14) [Col. 3, Line 31 to Col. 4, Line 39; Col. 11, Line 55 to Col. 12, Line 58]. Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing of the instant application to modify the storage system of LEE by applying the storage allocation donation, as taught by NAAMAD, in order to optimize the amount of storage in each tier based on need / workload and possibly other criteria when performing a cost benefit analysis, as taught by NAAMAD [Col. 16, Lines 4-54].
With respect to claim 1, LEE teaches method for memory pool management
(flash storage array implementing a process managing the storages across the flash storage array) [Par. 0059-0060], the method comprising:
receiving, by a first control circuit of a memory device controller, a first request to create a first logical memory space, the first control circuit being associated with a first memory zone
(initialization of a zoned storage device forming (a control plane) logical group of storage associated with storage device controller 119A-D, management of the control plane and the storage plane being treated independently, presenting a logical device by a storage array controller; the logical device specifying structure forming entities grouped into storage, which is a storage node ) [Par. 0114-0117; Par. 0075-0076; Par. 0098-0102]; (based on the specified structure, identifying location or address space featuring medium address space and physical flash locations, addressing series of address-space transformations or mapping across an entire storage system) [Par. 00102-0103; Par. 0114-0118].
LEE teaches process of dynamically mapping storage of zoned until the zone reaches capacity, i.e., the system to free up the zone's allocated space where a zone sized to different capacity or allocation in different locations of the zoned storage device, e.g., as the zoned storage device being internal maintained by reallocating available storage [Par. 0061-0064; Par. 0282-0284]; but fails to specifically detail storage availability and unavailability, specifically based on:
determining, by the first control circuit, that a second memory unit of the first memory zone is occupied, sending, by the first control circuit, a memory-donation request to a second control circuit of the memory device controller, the second control circuit being associated with a second memory zone; and
based on determining, by the second control circuit, that a third memory unit of the second memory zone is available, allocating, by the second control circuit, the third memory unit to the first logical memory space.
However, NAAMAD teaches a multi-tiered storage system comprising a plurality of storage tiers (Tier1, TIER2, TIER3, Fig. 4); a plurality of physical devices, wherein storage may be allocated for thin devices in chunks or data portions of a particular size as needed rather than allocate all storage necessary for the thin device's entire capacity (Fig. 6, FIG. 8A) by: (1) designating a donor tier and a receiver tier; (2) tracking storage availability and unavailability by calculating data movement criteria including one or more goal criteria including availability goal and a storage capacity goal (Fig. 14; Col. 18, Lines 4-40); and (3) allocating a first storage portion to a first storage tier, a second storage portion to the first set that would have been allocated to a second data tier is allocated to the first storage tier, i.e., moving storage portion (e.g system may relocate a chunk from a flash storage pool to a SATA storage pool or unused amount of physical storage relocated) from donor tier to receiving tier (Fig. 14) [Col. 3, Line 31 to Col. 4, Line 39; Col. 11, Line 55 to Col. 12, Line 58]. Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing of the instant application to modify the storage system of LEE by applying the storage allocation donation, as taught by NAAMAD, in order to optimize the amount of storage in each tier based on need / workload and possibly other criteria while performing a cost benefit analysis, as taught by NAAMAD [Col. 16, Lines 4-54]. The combination is proper because NAAMAD teaches the system in accordance with such techniques would have the flexibility to relocate individual chunks as desired to different devices in the same as well as different pools or storage tiers [Col. 18, Lines 23-33].
With respect to claim 20, LEE teaches device comprising: a processing circuit associated with a first control circuit and a second control circuit
(a storage system, comprising storage memory array establishing storage group; associated with storage array controller) [Fig. 1A, 1C, 1D, 2D; Fig. 14; Par. 0288; Par. 0059-0060]; and
a computer-readable medium storing instructions that, based on being executed by the processing circuit, cause the processing circuit to perform
(tangible, non-transitory, computer-readable media having instructions thereupon which, when executed by a processor, cause the processor to perform a method comprising) [Par. 0313]:
receiving, with a first control circuit associated with a first memory zone, a request to create a first logical memory space; based on determining that a first memory unit, at a first physical address range of the first memory zone is available, allocating the first memory unit to the first logical memory space
(initialization of a zoned storage device forming (a control plane) logical group of storage associated with storage device controller 119A-D, management of the control plane and the storage plane being treated independently, maintaining or presenting a map of addressable storage, a logical device by a storage array controller; the map or logical device specifying structure forming entities grouped into storage, which is a storage node ) [Par. 0114-0117; Par. 0075-0076; Par. 0098-0102];
(based on the specified structure, identifying location or maintaining address space featuring allocation of medium address space and physical flash locations, identifying zone that is in full state to defining addressable space transformations or allocating free storage across an entire storage system) [Par. 0063-0066; 00102-0103; Par. 0114-0118 ;Par. 00284-0286] forming storage groups based on various sizes, e.g., the composition of resiliency groups can change with sone reset or reassigned as part of maintenance) [Par. 00284-0286]; and
LEE teaches process of dynamically mapping storage of zoned i=until the zone reaches capacity, i.e., the system to free up the zone's allocated space where a zone sized to different capacity or allocation in different locations of the zoned storage device, e.g., as the zoned storage device being internal maintained by reallocating available storage [Par. 0067-0069; Par. 0282-0284].; but fails to specifically detail storage availability and unavailability, specifically based on:
determining that a second memory unit of the first memory zone is occupied, sending a memory-donation request from the first control circuit to a second control circuit associated with a second memory zone; and
determining that a third memory unit of the second memory zone is available, allocating the third memory unit to the first logical memory space, the third memory unit corresponding to a third physical address range that is separated from the first physical address range.
However, NAAMAD teaches a multi-tiered storage system comprising a plurality of storage tiers (Tier1, TIER2, TIER3, Fig. 4); a plurality of physical devices, wherein storage may be allocated for thin devices in chunks or data portions of a particular size as needed rather than allocate all storage necessary for the thin device's entire capacity (Fig. 6, FIG. 8A) by: (1) designating a donor tier and a receiver tier; (2) tracking storage availability and unavailability by calculating data movement criteria including one or more goal criteria including availability goal and a storage capacity goal (Fig. 14; Col. 18, Lines 4-40); and (3) allocating a first storage portion to a first storage tier, a second storage portion to the first set that would have been allocated to a second data tier is allocated to the first storage tier, i.e., moving storage portion (e.g system may relocate a chunk from a flash storage pool to a SATA storage pool or unused amount of physical storage relocated) from donor tier to receiving tier (Fig. 14) [Col. 3, Line 31 to Col. 4, Line 39; Col. 11, Line 55 to Col. 12, Line 58]. Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing of the instant application to modify the storage system of LEE by applying the storage allocation donation, as taught by NAAMAD, in order to optimize the amount of storage in each tier based on need / workload and possibly other criteria while concurrently performing a cost benefit analysis, as taught by NAAMAD [Col. 16, Lines 4-54]. The combination is proper because NAAMAD teaches the system in accordance with such techniques would have the flexibility to relocate individual chunks as desired to different devices in the same as well as different pools or storage tiers [Col. 18, Lines 23-33].
With respect to claims 2 and 18, LEE and NAAMAD, combined teach method for memory pool management, wherein: the determining that the first memory unit is available comprises reading, by a memory-map manager of the first control circuit, a first memory map associated with the first memory zone; and the determining that the third memory unit is available comprises reading, by a memory-map manager of the second control circuit, a second memory map associated with the second memory zone (different storage tiers with associated technologies of the tiers; the performance obtained for each storage tier based on observed or collected data; creation of logical group; determining what data portions should be located in each of the different storage tiers such as for data movement optimizations; the event there is an insufficient amount of free of unused storage in the target tier, processing may also include displacing or relocating other data currently stored on a physical device of the target tier; NAAMAD’s; Col. 16, Lines 15-35; Col. 18, Lines 4-33) (opening or making physical storage held by that zone as available by maintaining a map address range that directly maps addresses flash drives for allocation) [LEE’s Par. 0066-0067].
-
With respect to claim 3, LEE and NAAMAD, combined teach method for memory pool management , wherein the determining that the second memory unit is occupied comprises reading, by a memory-map manager of the first control circuit, a first memory map associated with the first memory zone (maintaining mapping indicating a full or closed state indicating zone being unavailable after writes have been written to the entirety of the zone) [LEE’s Par. 0063; Pat. 0066-0067].
With respect to claim 4, LEE and NAAMAD, combined teach method for memory pool management , wherein the first request to create the first logical memory space is associated with a performance target (retrieving data and metadata from storage array and providing data to computing devices monitoring and reporting of disk utilization and performance; LEE’s Par.0040); (different storage tiers with associated technologies of the tiers; the performance obtained for each storage tier based on observed or collected data; creation of logical group; determining what data portions should be located in each of the different storage tiers such as for data movement optimizations; NAAMAD’s Col. 16, Lines 15-35; Col. 18, Lines 4-33; Col. 17, Lines 15-30].
With respect to claim 5, LEE and NAAMAD, combined teach method for memory pool management, further comprising: determining, by the first control circuit, that the first memory unit comprises a characteristic associated with providing the performance target; and determining, by the second control circuit, that the third memory unit comprises the characteristic associated with providing the performance target (maintaining predictive maintenance by continuously evaluating characteristics and training and updating model parameters in order to evaluate model accuracy; LEE’s Par. 0175-0176); (different storage tiers with associated technologies of the tiers; the performance obtained for each storage tier based on observed or collected data; creation of logical group; determining what data portions should be located in each of the different storage tiers such as for data movement optimizations; NAAMAD’s Col. 16, Lines 15-35; Col. 18, Lines 4-33; Col. 17, Lines 15-30].
With respect to claims 6 and 15, LEE and NAAMAD, combined teach method for memory pool management, wherein: the first memory unit comprises a first memory type; and the third memory unit comprises a second memory type that is different from the first memory type ((different storage tiers with associated technologies of the tiers; the performance obtained for each storage tier based on observed or collected data; creation of logical group; NAAMAD’s Fig. 6; 8A; Col. 16, Lines 15-35) establishing one or more resiliency groups with storage class memory featuring data access of various types of data) [LEE’s Par. 0035; Par. 0283; Par. 0087].
With respect to claims 7 and 19, LEE and NAAMAD, combined teach method for memory pool management, wherein: the first control circuit comprises a first control core and a second control core; the first request to create the first logical memory space is processed by the first control core; and a second request to create a second logical memory space is processed by the second control core ((NAAMAD’s Fig. 6; 8A; Col. 18, Lines 4-33; Col. 17, Lines 15-30 ); establishing groups of various sizes, numbers of members or membership .with portion of a storage drive having a designated type of flash memory storage, generalizing, a portion of storage memory of the designated type of characteristic level set to a specified group) [LEE’s Par. 0283-0285].
With respect to claims 8 and 14, LEE and NAAMAD, combined teach method for memory pool management, wherein the allocating of the first memory unit to the first logical memory space comprises updating, by a first control core of the first control circuit, a first memory map of the first control circuit with a property of the first memory unit (((NAAMAD’s Fig. 6; 8A-8B; Col. 16, Lines 15-35; the event there is an insufficient amount of free of unused storage in the target tier, processing may also include displacing or relocating other data currently stored on a physical device of the target tier); LEE’s Par. 0286-0288]..
With respect to claims 9 and 16, LEE and NAAMAD, combined teach method for memory pool management, wherein the allocating of the third memory unit to the first logical memory space comprises updating, by a second control core of the second control circuit, a second memory map of the second control circuit with a property of the third memory unit ((NAAMAD’s Fig. 6; 8A-8B; Col. 16, Lines 15-35; the event there is an insufficient amount of free of unused storage in the target tier, processing may also include displacing or relocating other data currently stored on a physical device of the target tier)
(storage group transitioning from larger resiliency groups to smaller resiliency groups and transitioning from smaller to larger, or from larger to smaller resiliency groups data reliability needs) [LEE’s Par. 0286-0287].
With respect to claim 10, LEE and NAAMAD, combined teach method for memory pool management,, wherein the third memory unit corresponds to a third physical address range that is separated from the first physical address range (NAAMAD’s Fig. 6; 8A); (storage system establishing resiliency group that has storage drives with another type of storage memory, or portions of storage drives with size, membership, characteristic level of redundancy set independently for each resiliency group, on an individual basis, and can differ between the first and second resiliency groups) [LEE’s Par. 0293-0294].
With respect to claim 11, LEE and NAAMAD, combined teach method for memory pool management, further comprising: receiving, by the first control circuit, a read request for a data location associated with the first logical memory space; determining, by the first control circuit, that the data location is located outside of the first memory zone; forwarding, by the first control circuit, the read request to the second control circuit; and reading, by a memory controller of the second control circuit, data associated with the read request from the second memory zone ((NAAMAD’s Fig. 6; 8A; Col. 18, Lines 4-33; Col. 17, Lines 15-30 ); storage system establishing resiliency group that has storage drives with another type of storage memory, or portions of storage drives with size, membership, characteristic level of redundancy set independently for each resiliency group, on an individual basis, and can differ between the first and second resiliency groups with data stripe having the characteristic level of redundancy of similar resiliency group accessed across the members of the third resiliency group) [LEE’s Par. 0293-0295].
With respect to claim 12, LEE and NAAMAD, combined teach method for memory pool management, further comprising: receiving, by the first control circuit, a write request for a data location associated with the first logical memory space; determining, by the first control circuit, that the data location is located outside of the first memory zone; forwarding, by the first control circuit, the write request to the second control circuit; and writing, by a memory controller of the second control circuit, data associated with the write request to the second memory zone [(NAAMAD’s Fig. 6; 8A; Col. 18, Lines 4-33; Col. 17, Lines 15-30 ); storage system establishing resiliency group that has storage drives with another type of storage memory, or portions of storage drives with size, membership, characteristic level of redundancy set independently for each resiliency group and can differ between the first and second resiliency groups with membership characteristics of the resiliency groups settable on each individual group in the storage system; and performing data accesses of data stripes in accordance with the staging region, the stable region, the resiliency groups) [LEE’s Par. 0295-0298].
With respect to claim 17, LEE and NAAMAD, combined teach method for memory pool management, wherein the memory device controller is configured to perform: receiving, at the first control circuit, a first request to create a first logical memory space; based on determining, by the first control circuit, that the first memory unit is available, allocating, by the first control circuit, the first memory unit to the first logical memory space; based on determining, by the first control circuit, that the second memory unit is occupied, sending, by the first control circuit, a memory-donation request to the second control circuit; and based on determining, by the second control circuit, that the third memory unit is available, allocating, by the second control circuit, the third memory unit to the first logical memory space (different storage tiers with associated technologies of the tiers; the performance obtained for each storage tier based on observed or collected data; creation of logical group; determining what data portions should be located in each of the different storage tiers such as for data movement optimizations; determining data movements which seek to optimize goal criteria may take into account an acceptable limit or threshold with respect to an activity level of a storage tier; the event there is an insufficient amount of free of unused storage in the target tier, processing may also include displacing or relocating other data currently stored on a physical device of the target tier) [NAAMAD’s Fig. 6; 8A; Col. 16, Lines 15-35;Col. 18, Lines 4-33; Col. 17, Lines 15-30].
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
US 20180232317 A1 (GARIBAY et a) teaching dynamic address translation table allocation module (DAAM) residing in memory and executed by at least one processor that dynamically changes allocation of memory to address translation tables by including in the allocation of memory to the address translation tables a logical memory block (LMB) of memory donated from memory of the operating system.
US 20240319893 A1 (NIEMEYER et al) teaching computer program product, system, and method provided for out-of-space condition risk mitigation, including: a donor pool contained within a storage pool, providing additional storage capacity which may be transferred to another storage pool which may be approaching an out-of-space condition; donated storage capacity being virtually transferred on a temporary or emergency basis to prevent an imminent out-of-space condition.
US 20250156312 A1 (MIN et al) teaching method of operating a storage system including device, which includes a zone manager, and a storage device, allocating, by the zone manager, essential write resource allocated to independent zone.
US 20230236755 A1 (KULKANI et al) teaching container storage system that provides storage services to a container system provides data resiliency using storage pools based on: detecting an interruption to storage services associated between a first storage pool that includes a first plurality of storage resources on which a first set of replicas of a dataset is distributed and a second storage pool that includes a second plurality of storage resources.
Moriguchi, S, Yokoo, S, “Communication Control System for Multidrop Line,” IP.com Prior Art Database Technical Disclosure, September 01, 1987.
Contact Information
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/PIERRE MICHEL BATAILLE/Primary Examiner, Art Unit 2136