Prosecution Insights
Last updated: April 19, 2026
Application No. 18/950,543

ENERGY EFFICIENT ULTRA-WIDEBAND IMPULSE RADIO SYSTEMS AND METHODS

Non-Final OA §101§112§DP
Filed
Nov 18, 2024
Examiner
JOSEPH, JAISON
Art Unit
2633
Tech Center
2600 — Communications
Assignee
Transfert Plus Societe En Commandite
OA Round
1 (Non-Final)
82%
Grant Probability
Favorable
1-2
OA Rounds
2y 5m
To Grant
95%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allow Rate
538 granted / 652 resolved
+20.5% vs TC avg
Moderate +12% lift
Without
With
+12.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
17 currently pending
Career history
669
Total Applications
across all art units

Statute-Specific Performance

§101
6.0%
-34.0% vs TC avg
§103
46.6%
+6.6% vs TC avg
§102
32.0%
-8.0% vs TC avg
§112
10.3%
-29.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 652 resolved cases

Office Action

§101 §112 §DP
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1 – 7 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 1 recites the limitation "establishing the energy" in line 4. There is insufficient antecedent basis for this limitation in the claim. Claim 5 recites the limitation "establishing the energy" in line 7. There is insufficient antecedent basis for this limitation in the claim. Claims 2 – 4, 6, and 7 are inherently rejected as being depended on above rejected claims. Claim Rejections - 35 USC § 101 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claims 1- 20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to non-statutory subject matter. The claim(s) does/do not fall within at least one of the four categories of patent eligible subject matter because Applicant direct claims 1 – 20 to “Computer executable instructions”. Computer executable instructions are program per se. A computer executable instructions or program itself is a non-statutory subject matter. The statutory subject matters are new and useful process (method), machine (apparatus), manufacture, composition of matter, and any useful improvement thereof. Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 1 – 10 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1, 2, 4 – 6, 8 – 10, and 14 of U.S. Patent No. 12,176,943. Although the claims at issue are not identical, they are not patentably distinct from each other because claims 1 – 10 of the instant application merely broadens the scope of the claims 1, 2, 4 – 6, 8 – 10, and 14 of the patent by eliminating the elements and their functions of claims 1, 2, 4 – 6, 8 – 10, and 14 of the patent. Therefore, it would be obvious to one having ordinary skill in the art at the time the invention was made to realize that the both invention to provide a computer executable instructions stored upon a non-volatile memory, the computer instructions when executed by a digital signal processing (DSP) circuit cause the DSP circuit to execute a process comprising: establishing the energy within integration time windows that are established in dependence upon a clock signal generated by a clock source forming part of a first wireless transceiver of a system with the DSP circuit; establishing an estimate of an elapsed time between transmission of a signal transmitted by the first wireless transceiver and receipt of an echo signal generated by a second wireless transceiver in response to the signal transmitted by the first wireless receiver where the estimate of the elapsed time is established in dependence upon an energy distribution determined by the DSP circuit for two consecutive integration time windows during which the echo signal is received; and establishing a range between the wireless transceiver and the second wireless transceiver with another process employing the estimate of the elapsed time established by the DSP. Furthermore, because omission element(s) in the claim would make the claim in the instant application broader, it would have been obvious to one of ordinary skill in the art at the time of the invention that the claim in the instant application is merely an obvious variation of the claim in the patent. It is well settled that omission of an element and it function is an obvious expedient if the remaining elements perform the same function as before. In re Karlson, 163 USPQ 184 (CCPA 1963). Also note Ex parte Rainu, 168 USPQ 184 (CCPA 1969). In light of the foregoing discussion, the broad claim of the instant application is rejected as obvious double patenting over the narrower patent claim. Instant Application Patent 12,176,943 Claim 1: Computer executable instructions stored upon a non-volatile memory, the computer instructions when executed by a digital signal processing (DSP) circuit cause the DSP circuit to execute a process comprising: establishing the energy within integration time windows that are established in dependence upon a clock signal generated by a clock source forming part of a first wireless transceiver of a system with the DSP circuit; establishing an estimate of an elapsed time between transmission of a signal transmitted by the first wireless transceiver and receipt of an echo signal generated by a second wireless transceiver in response to the signal transmitted by the first wireless receiver where the estimate of the elapsed time is established in dependence upon an energy distribution determined by the DSP circuit for two consecutive integration time windows during which the echo signal is received; and establishing a range between the wireless transceiver and the second wireless transceiver with another process employing the estimate of the elapsed time established by the DSP. Claim 1: A method comprising providing a first Ultra-Wideband (UWB) transceiver which incorporates: a filter circuit comprising an input port electrically coupled to an antenna for receiving UWB signals and an output port where the filter circuit processes the received UWB signals to generate processed UWB signals; a clock source; and an energy detector circuit electrically coupled to the output port of the filter circuit and the clock source; and a digital signal processing (DSP) circuit coupled to the energy detector circuit; wherein the first UWB transceiver receives an echo signal generated by a second UWB transceiver in response to a signal transmitted by the first UWB receiver; the DSP executes a process comprising: establishing the energy within integration time windows that are established in dependence upon a clock signal generated by the clock source; establishing an estimate of an elapsed time between transmission of the signal and receipt of the echo signal, the estimate of the elapsed time being established in dependence upon an energy distribution determined by the DSP for two consecutive integration time windows during which the echo signal is received; and establishing a range between the first UWB transceiver with a second UWB transceiver with another process employing the estimate of the elapsed. Claim 2: The computer executable instructions stored upon the non-volatile memory according to claim 1, wherein the first wireless transceiver comprises at least: a filter circuit comprising an input port electrically coupled to an antenna for receiving wireless signals according to a defined wireless standard and an output port where the filter circuit processes the received wireless signals to generate processed wireless signals; a clock source; and an energy detector circuit electrically coupled to the output port of the filter circuit and the clock source; and the DSP circuit is coupled to the energy detector circuit. Claim 1: A method comprising providing a first Ultra-Wideband (UWB) transceiver which incorporates: a filter circuit comprising an input port electrically coupled to an antenna for receiving UWB signals and an output port where the filter circuit processes the received UWB signals to generate processed UWB signals; a clock source; and an energy detector circuit electrically coupled to the output port of the filter circuit and the clock source; and a digital signal processing (DSP) circuit coupled to the energy detector circuit; wherein the first UWB transceiver receives an echo signal generated by a second UWB transceiver in response to a signal transmitted by the first UWB receiver; the DSP executes a process comprising: establishing the energy within integration time windows that are established in dependence upon a clock signal generated by the clock source; establishing an estimate of an elapsed time between transmission of the signal and receipt of the echo signal, the estimate of the elapsed time being established in dependence upon an energy distribution determined by the DSP for two consecutive integration time windows during which the echo signal is received; and establishing a range between the first UWB transceiver with a second UWB transceiver with another process employing the estimate of the elapsed. Claim 3: The computer executable instructions stored upon the non-volatile memory according to claim 1, wherein either: the energy distribution is established by dividing the energy within a second integration time window of the two consecutive integration time windows by the sum of the two consecutive integration time windows; or: the energy distribution is established by dividing the energy within a second integration time window of the two consecutive integration time windows by the sum of the two consecutive integration time windows; and the estimate of the elapsed time is established by multiplying energy distribution by the time of each integration time window. Claim 2: The method according to claim 1, wherein the energy distribution is established by dividing the energy within a second integration time window of the two consecutive integration time windows by the sum of the two consecutive integration time windows. Claim 4: The computer executable instructions stored upon the non-volatile memory according to claim 1, wherein the first wireless transceiver is not synchronized with the second wireless transceiver. Claim 4: The method according to claim 1, wherein the first UWB transceiver and the second UWB transceiver are not synchronized with each other. Claim 5: Computer executable instructions stored upon a non-volatile memory, the computer instructions when executed by a digital signal processing (DSP) circuit cause the DSP circuit to execute a process comprising: transmitting a signal from a first wireless transceiver associated with the DSP circuit to a second wireless transceiver, where the signal triggers an echo signal to be generated by the second wireless transceiver which is subsequently received by the first wireless receiver; establishing the energy within integration time windows that are established in dependence upon a clock signal generated by a clock source forming part of the first wireless transceiver and the output of an energy detector circuit forming part of the first wireless transceiver; establishing an estimate of an elapsed time between transmission of the signal and receipt of the echo signal, the estimate of the elapsed time being established in dependence upon an energy distribution determined by the DSP circuit for two consecutive integration time windows during which the echo signal is received; and establishing a range between the first wireless transceiver and the second wireless transceiver with another process employing the estimate of the elapsed time. Claim 5: A method comprising: providing a first Ultra-Wideband (UWB) transceiver comprising an energy detector circuit and a digital signal processor (DSP) coupled to the energy detector circuit; wherein the DSP executes a process comprising: transmitting a signal to a second UWB transceiver, where the signal triggers an echo signal to be generated by the second UWB transceiver which is subsequently received by the first UWB receiver; establishing the energy within integration time windows that are established in dependence upon a clock signal generated by a clock source forming part of the first UWB transceiver and the output of the energy detector circuit; establishing an estimate of an elapsed time between transmission of the signal and receipt of the echo signal, the estimate of the elapsed time being established in dependence upon an energy distribution determined by the DSP for two consecutive integration time windows during which the echo signal is received; and establishing a range between the first UWB transceiver with a second UWB transceiver with another process employing the estimate of the elapsed time. Claim 6: The computer executable instructions stored upon the non-volatile memory according to claim 5, wherein either: the energy distribution is established by dividing the energy within a second integration time window of the two consecutive integration time windows by the sum of the two consecutive integration time windows; or: the energy distribution is established by dividing the energy within a second integration time window of the two consecutive integration time windows by the sum of the two consecutive integration time windows; and the estimate of the elapsed time is established by multiplying energy distribution by the time of each integration time window. Claim 6: The method according to claim 5, wherein the energy distribution is established by dividing the energy within a second integration time window of the two consecutive integration time windows by the sum of the two consecutive integration time windows. Claim 7: The computer executable instructions stored upon the non-volatile memory according to claim 5, wherein the first wireless transceiver is not synchronized with the second wireless transceiver. Claim 8: The method according to claim 5, wherein the first UWB transceiver and the second UWB transceiver are not synchronized with each other. Claim 8: Computer executable instructions stored upon a non-volatile memory, the computer instructions when executed by a digital signal processing (DSP) circuit cause the DSP circuit to execute a process comprising: transmitting a first packet comprising a plurality of pulse bundles from a first wireless transceiver associated with the DSP circuit; starting a first timer associated upon transmission of the last pulse bundle of the plurality of pulse bundles; processing a plurality of other pulse bundles forming a second packet received from a second wireless transceiver at a detector circuit forming part of the first wireless transceiver; synchronizing to a predetermined pulse within a last pulse bundle of the plurality of other pulse bundles of the second packet using a synchronization circuit forming part of the first wireless transceiver; stopping the first timer upon determining detection of the predetermined pulse within the last pulse bundle of the plurality of other pulse bundles of the second packet; and calculating a time of flight in dependence upon the elapsed time of the first timer. Claim 9: A method comprising: providing a first Ultra-Wideband (UWB) transceiver comprising a digital signal processor (DSP) coupled to a detector circuit and a synchronization circuit comprising a correlation circuit; wherein the DSP executes a process comprising: transmitting a first packet comprising a plurality of UWB pulse bundles; starting a first timer associated upon transmission of the last pulse bundle of the plurality of UWB pulse bundles; processing a plurality of other UWB pulse bundles forming a second packet received from the second UWB transceiver; synchronizing to a predetermined pulse within a last pulse bundle of the plurality of other UWB pulse bundles of the second packet using the synchronization circuit; stopping the first timer upon determining detection of the predetermined pulse; and calculating a time of flight in dependence upon the elapsed time of the first timer. Claim 9: The computer executable instructions stored upon the non-volatile memory according to claim 8, wherein the computer instructions when executed by another DSP circuit forming part of the second wireless transceiver cause the another DSP circuit to execute another process comprising: processing the plurality of pulse bundles of the first packet received from the first wireless transceiver by another detector circuit forming part of the second wireless transceiver; synchronizing to another predetermined pulse within a last pulse bundle of the plurality of pulse bundles of the first packet using a second synchronization circuit forming part of the first wireless transceiver; starting a second timer upon determining detection of the another predetermined pulse; and transmitting the second packet when the second timer reaches a predetermined wait time. Claim 10: The method according to claim 9, wherein the second UWB transceiver comprises another digital signal processor (DSP) coupled to another detector circuit and another synchronization circuit comprising another correlation circuit and another delay-locked loop; and the another DSP executes another process comprising: processing the plurality of UWB pulse bundles of the first packet; synchronizing to another predetermined pulse within a last pulse bundle of the plurality of UWB pulse bundles of the first packet using the second synchronization circuit; starting a second timer upon determining detection of the another predetermined pulse; and transmitting the second packet when the second timer reaches a predetermined wait time Claim 10: The computer executable instructions stored upon the non-volatile memory according to claim 8, wherein the computer instructions further cause the DSP circuit to execute a timing reference process which advances which tap of a plurality of taps of a delay-locked loop (DLL) forming part of the synchronization circuit is employed by a pulse generator of the first wireless transceiver in driving the pulse generator to generate a reference pulse sequence until a correlation peak is established with the correlation circuit; the synchronization circuit correlates a portion of the plurality of pulse bundles received by the first wireless transceiver with the reference pulse sequence generated by the reference pulse generator; the pulse generator is driven by the DLL which itself is driven by a reference clock Claim 14: The method according to claim 10, wherein the correlation circuit comprises a delay-locked loop (DLL) comprising a plurality of taps which are spaced at a predetermined time offset relative to one another and reference pulse generator which is driven by a signal from a pulse generator for generating a reference pulse sequence where the correlation circuit correlates a portion of the plurality of other UWB pulse bundles received by the first UWB transceiver with the reference pulse sequence generated by the reference pulse generator; the reference pulse generator is driven by the DLL which itself is driven by a reference clock; a timing reference process executed by DSP advances which tap of the plurality of taps from the DLL is employed by the reference pulse generator in driving the reference pulse generator to generate the reference pulse sequence until a correlation peak is established with the correlation circuit the another correlation circuit comprises another DLL comprising another plurality of taps which are spaced at another predetermined time offset relative to one another and another reference pulse generator which is driven by a signal from another pulse generator for generating another reference pulse sequence where the another correlation circuit correlates a portion of the plurality of UWB pulse bundles received by the second UWB transceiver with the another reference pulse sequence generated by the another reference pulse generator; the another reference pulse generator is driven by the another DLL which itself is driven by another reference clock; and another timing reference process executed by another DSP advances which tap of the another plurality of taps from the another DLL is employed by the another reference pulse generator in driving the another reference pulse generator to generate the another reference pulse sequence until another correlation peak is established with the another correlation circuit. Claims 11 – 20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1, 3 – 6, 8 – 11, and 13 of U.S. Patent No. 10,742,261. Although the claims at issue are not identical, they are not patentably distinct from each other because claims 11 – 20 of the instant application merely broadens the scope of the claims 1, 3 – 6, 8 – 11, and 13 of the patent by eliminating the elements and their functions of claims 1, 3 – 6, 8 – 11, and 13 of the patent. Therefore, it would be obvious to one having ordinary skill in the art at the time the invention was made to realize that the both invention to provide a computer executable instructions stored upon a non-volatile memory, the computer instructions when executed by a digital signal processing (DSP) circuit cause the DSP circuit to execute a process comprising: establishing a range between a pair of Ultra-Wideband (UWB) transceivers comprising a first ultra-wideband (UWB) transceiver with a second UWB transceiver using another process in execution upon the first UWB transceiver and the second UWB transceiver; wherein the another process comprises: synchronizing the first ultra-wideband (UWB) transceiver with the second UWB transceiver; transmitting a first packet from the first UWB transceiver comprising a plurality of UWB pulse bundles; starting a first timer associated with the first UWB transceiver upon transmission of the last pulse bundle; processing the received plurality of UWB pulse bundles upon the second UWB transceiver; synchronizing to a predetermined pulse within the UWB pulse bundles of the first packet using a circuit comprising at least a first correlator and a first delay-locked loop; starting a second timer associated with the second UWB transceiver upon determining detection of the predetermined pulse within the last pulse bundle of the plurality of pulse bundles; transmitting a second packet from the second UWB transceiver when the second timer reaches a predetermined wait time; processing the received plurality of UWB pulse bundles associated with the second UWB transceiver upon the first UWB transceiver; synchronizing to a predetermined pulse within the UWB pulse bundles of the second packet using a circuit comprising at least a second correlator and a second delay-locked loop; stopping the first timer upon determining detection of the predetermined pulse within the last pulse bundle of the plurality of pulse bundles of the second packet; calculating the time of flight in dependence upon the elapsed time of the first timer and determining a range between the first UWB transceiver and second UWB transceiver. Furthermore, because omission element(s) in the claim would make the claim in the instant application broader, it would have been obvious to one of ordinary skill in the art at the time of the invention that the claim in the instant application is merely an obvious variation of the claim in the patent. It is well settled that omission of an element and it function is an obvious expedient if the remaining elements perform the same function as before. In re Karlson, 163 USPQ 184 (CCPA 1963). Also note Ex parte Rainu, 168 USPQ 184 (CCPA 1969). In light of the foregoing discussion, the broad claim of the instant application is rejected as obvious double patenting over the narrower patent claim. Instant application Patent 10,742,261 Claim 11: Computer executable instructions stored upon a non-volatile memory, the computer instructions when executed by a digital signal processing (DSP) circuit cause the DSP circuit to execute a process comprising: establishing a range between a pair of Ultra-Wideband (UWB) transceivers comprising a first ultra-wideband (UWB) transceiver with a second UWB transceiver using another process in execution upon the first UWB transceiver and the second UWB transceiver; wherein the another process comprises: synchronizing the first ultra-wideband (UWB) transceiver with the second UWB transceiver; transmitting a first packet from the first UWB transceiver comprising a plurality of UWB pulse bundles; starting a first timer associated with the first UWB transceiver upon transmission of the last pulse bundle; processing the received plurality of UWB pulse bundles upon the second UWB transceiver; synchronizing to a predetermined pulse within the UWB pulse bundles of the first packet using a circuit comprising at least a first correlator and a first delay-locked loop; starting a second timer associated with the second UWB transceiver upon determining detection of the predetermined pulse within the last pulse bundle of the plurality of pulse bundles; transmitting a second packet from the second UWB transceiver when the second timer reaches a predetermined wait time; processing the received plurality of UWB pulse bundles associated with the second UWB transceiver upon the first UWB transceiver; synchronizing to a predetermined pulse within the UWB pulse bundles of the second packet using a circuit comprising at least a second correlator and a second delay-locked loop; stopping the first timer upon determining detection of the predetermined pulse within the last pulse bundle of the plurality of pulse bundles of the second packet; calculating the time of flight in dependence upon the elapsed time of the first timer and determining a range between the first UWB transceiver and second UWB transceiver. Claim 1: A method comprising: establishing a range between a pair of Ultra-Wideband (UWB) transceivers comprising a first ultra-wideband (UWB) transceiver with a second UWB transceiver using a process in execution upon the first UWB transceiver and the second UWB transceiver; wherein the process comprises: synchronizing the first ultra-wideband (UWB) transceiver with the second UWB transceiver; transmitting a first packet from the first UWB transceiver comprising a plurality of UWB pulse bundles; starting a first timer associated with the first UWB transceiver upon transmission of the last pulse bundle; processing the received plurality of UWB pulse bundles upon the second UWB transceiver; synchronizing to a predetermined pulse within the UWB pulse bundles of the first packet using a circuit comprising at least a first correlator and a first delay-locked loop; starting a second timer associated with the second UWB transceiver upon determining detection of the predetermined pulse within the last pulse bundle of the plurality of pulse bundles; transmitting a second packet from the second UWB transceiver when the second timer reaches a predetermined wait time; processing the received plurality of UWB pulse bundles associated with the second UWB transceiver upon the first UWB transceiver; synchronizing to a predetermined pulse within the UWB pulse bundles of the second packet using a circuit comprising at least a second correlator and a second delay-locked loop; stopping the first timer upon determining detection of the predetermined pulse within the last pulse bundle of the plurality of pulse bundles of the second packet; calculating the time of flight in dependence upon the elapsed time of the first timer and determining a range between the first UWB transceiver and second UWB transceiver. Claim 12: The computer executable instructions stored upon the non-volatile memory according to claim 11, wherein the process further comprises repeating the determination of the time of flight a second time with a reduced length of the first packet and second packet. Claim 3: The method according to claim 1, further comprising repeating the determination of the time of flight a second time with a reduced length of the first packet and second packet. Claim 13: The computer executable instructions stored upon the non-volatile memory according to claim 11, wherein each UWB pulse bundle of the plurality of UWB pulse bundles comprises a plurality N pulses; wherein each pulse of the N pulses is at a predetermined frequency of a plurality M frequencies, has a predetermined amplitude, and has a predetermined pulse length. Claim 4: he method according to claim 1, wherein each UWB pulse bundle of the plurality of UWB pulse bundles comprises a plurality N pulses; wherein each pulse of the N pulses is at a predetermined frequency of a plurality M frequencies, has a predetermined amplitude, and has a predetermined pulse length. Claim 14: Computer executable instructions stored upon a non-volatile memory, the computer instructions when executed by a digital signal processing (DSP) circuit cause the DSP circuit to execute a process comprising: establishing a range between a pair of Ultra-Wideband (UWB) transceivers comprising a first ultra-wideband (UWB) transceiver with a second UWB transceiver using another process in execution upon the first UWB transceiver and the second UWB transceiver; wherein the another process comprises: providing a synchronization circuit forming part of the first ultra-wideband (UWB) transceiver for synchronizing wireless communications with the second UWB transceiver comprising at least a first correlator and a first delay-locked loop; transmitting a first packet from the first UWB transceiver comprising a plurality of first UWB pulse bundles; starting a first timer associated with the first UWB transceiver upon transmission of the last first UWB pulse bundle of the plurality of first UWB pulse bundles; receiving a second packet from the second UWB transceiver comprising a plurality of second UWB pulse bundles; synchronizing to a predetermined second UWB pulse bundle within the plurality of second UWB pulse bundles of the second packet using the synchronization circuit; stopping the first timer upon determining detection of the predetermined pulse within the last pulse bundle of the plurality of pulse bundles of the second packet; and calculating the time of flight in dependence upon the elapsed time of the first timer and determining a range between the first UWB transceiver and second UWB transceiver. Claim 5: A method comprising: establishing a range between a pair of Ultra-Wideband (UWB) transceivers comprising a first ultra-wideband (UWB) transceiver with a second UWB transceiver using a process in execution upon the first UWB transceiver and the second UWB transceiver; wherein the process comprises: providing a synchronization circuit forming part of the first ultra-wideband (UWB) transceiver for synchronizing wireless communications with the second UWB transceiver comprising at least a first correlator and a first delay-locked loop; transmitting a first packet from the first UWB transceiver comprising a plurality of first UWB pulse bundles; starting a first timer associated with the first UWB transceiver upon transmission of the last first UWB pulse bundle of the plurality of first UWB pulse bundles; receiving a second packet from the second UWB transceiver comprising a plurality of second UWB pulse bundles; synchronizing to a predetermined second UWB pulse bundle within the plurality of second UWB pulse bundles of the second packet using the synchronization circuit; stopping the first timer upon determining detection of the predetermined pulse within the last pulse bundle of the plurality of pulse bundles of the second packet; and calculating the time of flight in dependence upon the elapsed time of the first timer and determining a range between the first UWB transceiver and second UWB transceiver. Claim 15: The computer executable instructions stored upon the non-volatile memory according to claim 14, wherein the another process further comprises: processing the received plurality of first UWB pulse bundles upon the second UWB transceiver; synchronizing to a predetermined first UWB pulse bundle of the plurality of first UWB pulse bundles within the first packet using a second synchronization circuit forming part of the second UWB transceiver for synchronizing wireless communications with the first UWB transceiver which comprises at least a second correlator and a second delay-locked loop; starting a second timer associated with the second UWB transceiver upon determining detection of the predetermined pulse within the last pulse bundle of the plurality of pulse bundles; transmitting a second packet comprising the plurality of second UWB pulse bundles from the second UWB transceiver when the second timer reaches a predetermined wait time Claim 6: The method according to claim 5, further comprising providing a second synchronization circuit forming part of the second UWB transceiver for synchronizing wireless communications with the first UWB transceiver comprising at least a second correlator and a second delay-locked loop; processing the received plurality of first UWB pulse bundles upon the second UWB transceiver; synchronizing to a predetermined first UWB pulse bundle of the plurality of first UWB pulse bundles within the first packet using the second synchronization circuit; starting a second timer associated with the second UWB transceiver upon determining detection of the predetermined pulse within the last pulse bundle of the plurality of pulse bundles; transmitting a second packet comprising the plurality of second UWB pulse bundles from the second UWB transceiver when the second timer reaches a predetermined wait time. Claim 16: The computer executable instructions stored upon the non-volatile memory according to claim 14, wherein the process further comprises repeating the determination of the time of flight a second time with a reduced length of the first packet and second packet. Claim 8: The method according to claim 5, further comprising repeating the determination of the time of flight a second time with a reduced length of the first packet and second packet. Claim 17: The computer executable instructions stored upon the non-volatile memory according to claim 14, wherein each first UWB pulse bundle of the plurality of first UWB pulse bundles comprises a plurality N pulses; wherein each pulse of the N pulses is at a first predetermined frequency of a plurality M frequencies, has a first predetermined amplitude, and has a first predetermined pulse length; and each second UWB pulse bundle of the plurality of second UWB pulse bundles comprises a plurality R pulses; wherein each pulse of the R pulses is at a second predetermined frequency of a plurality S frequencies, has a second predetermined amplitude, and has a second predetermined pulse length. Claim 9: The method according to claim 5, wherein each first UWB pulse bundle of the plurality of first UWB pulse bundles comprises a plurality N pulses; wherein each pulse of the N pulses is at a first predetermined frequency of a plurality M frequencies, has a first predetermined amplitude, and has a first predetermined pulse length; and each second UWB pulse bundle of the plurality of second UWB pulse bundles comprises a plurality R pulses; wherein each pulse of the R pulses is at a second predetermined frequency of a plurality S frequencies, has a second predetermined amplitude, and has a second predetermined pulse length. Claim 18: Computer executable instructions stored upon a non-volatile memory, the computer instructions when executed by a digital signal processing (DSP) circuit cause the DSP circuit to execute a process comprising: establishing a range between a pair of Ultra-Wideband (UWB) transceivers comprising a first ultra-wideband (UWB) transceiver with a second UWB transceiver using another process in execution upon the first UWB transceiver and the second UWB transceiver; wherein the another process comprises: transmitting an ultra-wideband (UWB) impulse with the first UWB transceiver operating with a first clock rate having first integration windows in dependence upon the first clock rate; receiving from the second UWB transceiver an echo signal generated by the second UWB transceiver in dependence upon receipt of the UWB impulse; integrating received UWB signals within the first integration windows and determining when the received energy within a first integration window exceeds a predetermined threshold that the echo signal has been received; passing the integrated energies within the first integration windows to a digital signal processing (DSP) circuit; and deriving an estimate of elapsed time with the DSP circuit. Claim 10: A method comprising: establishing a range between a pair of Ultra-Wideband (UWB) transceivers comprising a first ultra-wideband (UWB) transceiver with a second UWB transceiver using a process in execution upon the first UWB transceiver and the second UWB transceiver; wherein the process comprises: transmitting an ultra-wideband (UWB) impulse with the first UWB transceiver operating with a first clock rate having first integration windows in dependence upon the first clock rate; receiving from the second UWB transceiver an echo signal generated by the second UWB transceiver in dependence upon receipt of the UWB impulse; integrating received UWB signals within the first integration windows and determining when the received energy within a first integration window exceeds a predetermined threshold that the echo signal has been received; passing the integrated energies within the first integration windows to a digital signal processing (DSP) circuit; and deriving an estimate of elapsed time with the DSP circuit Claim 19: he computer executable instructions stored upon the non-volatile memory according to claim 18, wherein the echo signal is generated by the second UWB transceiver through a further process comprising receiving the UWB impulse at the second UWB transceiver which is operating with a second clock rate having second integration windows in dependence upon the second clock rate; integrating received UWB signals within the second integration windows and determining when the received energy within a second integration window exceeds a predetermined threshold that the UWB impulse has been received; and transmitting in the next second integration window after a determination of receipt of the UWB impulse the echo signal. Claim 11: The method according to claim 10, wherein the echo signal is generated by the second UWB transceiver through a process comprising receiving the UWB impulse at the second UWB transceiver which is operating with a second clock rate having second integration windows in dependence upon the second clock rate; integrating received UWB signals within the second integration windows and determining when the received energy within a second integration window exceeds a predetermined threshold that the UWB impulse has been received; and transmitting in the next second integration window after a determination of receipt of the UWB impulse the echo signal. Claim 20: The computer executable instructions stored upon the non-volatile memory according to claim 18, wherein at least one of: the UWB impulse comprises a plurality N pulses; wherein each pulse of the N pulses is at a first predetermined frequency of a plurality M frequencies, has a first predetermined amplitude, and has a first predetermined pulse length; and the echo signal comprises a plurality R pulses; wherein each pulse of the R pulses is at a second predetermined frequency of a plurality S frequencies, has a second predetermined amplitude, and has a second predetermined pulse length. Claim 13: The method according to claim 10, wherein the UWB impulse comprises a plurality N pulses; wherein each pulse of the N pulses is at a predetermined frequency of a plurality M frequencies, has a predetermined amplitude, and has a predetermined pulse length. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAISON JOSEPH whose telephone number is (571)272-6041. The examiner can normally be reached M-F 8 - 4. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sam K Ahn can be reached at 571 272 3044. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. JAISON . JOSEPH Primary Examiner Art Unit 2633 /JAISON JOSEPH/ Primary Examiner, Art Unit 2633
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Prosecution Timeline

Nov 18, 2024
Application Filed
Feb 20, 2026
Non-Final Rejection — §101, §112, §DP (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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2y 5m
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