N O N - F I N A L A C T I O N
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 11/18/24 complies with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Election / Restriction – Election with Traverse
Applicant’s reply filed on 4/22/26, elected Species II, Sub-Species B (Fig. 10 & 11), which was with traverse. After further consideration, Applicant’s arguments are persuasive. Therefore, the election/restriction requirement has been withdrawn. All claims 1-20 have been examined and will be addressed in this Office Action.
Closest Prior Art
The prior art (cited on PTO-892) is considered pertinent to applicant's disclosure. Among these, the following references are considered to be the closest, collectively disclosing the state of the art concerned with pixel circuit architecture for a solid state image sensor and method of operation concerning a voltage generator and row driver.
DAI (US 20120120300) – applied to 35 USC 102 rejection, see Fig. 1, 5-6 in view of para [0017, 0020, 0045-0055].
LEE (US 20240340548) – see Fig. 5-6 in view of para [0052-60]: voltage generator 100, row driver 200, and pixel array 300.
CHO (US 20210099656) – see Fig. 1, 9 and 14: voltage generator 190, row driver 120, and pixel array 110.
NOTE: Examiner welcomes INTERVIEW(s) to discuss the instant application’s claimed invention as it corresponds to the specification embodiments, as well as, discussing the similarities/differences taught/not taught by prior art. In the interest of compact prosecution, Applicant’s arguments/amendments should not only address the cited closest art applied/relied on in the 35 USC 102 rejection (below), but also address the other cited closest art not applied/relied on.
Examiner cites particular columns and line numbers in the references as applied to the claims below for the convenience of the applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested that, in preparing responses, the applicant fully consider the references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner.
Claim Rejections – 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-2 and 17-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by DAI (US 20120120300) -- hereafter, termed as shown “underlined”.
As per INDEPENDENT CLAIM 1, DAI teaches an image sensor (Fig. 1, para [0017, 0020]) comprising:
a pixel array in which a plurality of pixels are arranged in rows and columns (Fig. 1 in view of Fig. 5, para [0017, 0020], pixel array 102);
a voltage generator configured to generate a plurality of voltages including a first power supply voltage and a second power supply voltage (Fig. 1: controller 108 considered to comprise a row driver and voltage generator 640 in view of Fig. 5-6 and para [0020, 0045-49, 0054-55]: first and second voltages shown by 642/630 644/632), wherein the first power supply voltage and the second power supply voltage have a same voltage level (para [0054] states “substantially the same transfer gate off voltage values may be provided on the first and second transfer gate off voltage supply conductors. Alternatively, in one or more embodiments, substantially different transfer gate off voltage values may be provided on the first and second transfer gate off voltage supply conductors”);
and a row driver configured to generate a pixel control signal provided to the plurality of pixels based on the first power supply voltage during a first period and generate the pixel control signal based on the second power supply voltage during a second period after the first period (Fig. 1: controller 108 considered to comprise a row driver in view of Fig. 5 and para [0020, 0045-55]. The row driver provides control signals to operate pixel array in a global shutter mode or rolling shutter mode, wherein switches (at 534, Fig. 5) allow a pixel control signal provided to transfer gates of the plurality of pixels based on the first power supply voltage during a first period and generate the pixel control signal to transfer gates based on the second power supply voltage during a second period after the first period).
As per CLAIM 2, DAI teaches the image sensor of claim 1, wherein the row driver includes: a first transistor, to which the first power supply voltage is applied, providing the first power supply voltage to an output node in response to an activation level of a first input signal during the first period; and a second transistor, to which the second power supply voltage is applied, providing the second power supply voltage to the output node in response to an activation level of a second input signal during the second period (Fig. 1: controller 108 considered to comprise a row driver in view of Fig. 5 and para [0020, 0045-55]. The row driver provides control signals to operate pixel array in a global shutter mode or rolling shutter mode, wherein “transistor” switches (at 534, Fig. 5) allow a pixel control signal provided to transfer gates of the plurality of pixels based on the first power supply voltage during a first period and generate the pixel control signal to transfer gates based on the second power supply voltage during a second period after the first period).
As per INDEPENDENT CLAIM 17, DAI teaches an operating method of an image sensor including a pixel array including a plurality of pixels, a row driver driving the pixel array, and a voltage generating circuit providing a power supply voltage to the row driver, the operating method comprising: generating, by the voltage generating circuit, a first power supply voltage and a second power supply voltage; generating, by the row driver, a pixel control signal provided to the plurality of pixels corresponding to a plurality of rows of the pixel array based on the first power supply voltage during a first period; and generating, by the row driver, the pixel control signal based on the second power supply voltage during a second period after the first period (The method of an image sensor recited in claim 17 comprises similar limitations as those recited for the image sensor in claim 1. Therefore, this claim is rejected for the same reasons over DAI’s teachings discussed in claim 1).
As per CLAIM 18, DAI teaches the operating method of claim 17, wherein an exposure start time of each of the plurality of pixels is the same (see Fig. 1, 5-6 in view of para [0020] discloses shutter signal is a global shutter signal for simultaneously enabling all pixels within the image sensor array to concurrently capture their respective image data during a single acquisition window or exposure period).
As per CLAIM 19, DAI teaches the operating method of claim 17, wherein the first period and the second period are included in a shuttering period of the plurality of pixels (Control circuitry 108 may generate a shutter signal using global shutter / rolling shutter method per para [0020] and see Fig. 5-6 in view of para [0046-0054]).
As per CLAIM 20, DAI teaches the operating method of claim 17, wherein the first period is included in a shuttering period of the plurality of pixels, and the second period is included in a signal sampling period of the plurality of pixels (Control circuitry 108 may generate a shutter signal using global shutter / rolling shutter method per para [0020] and see Fig. 5-6 in view of para [0046-0054]).
Allowable Subject Matter
Claims 11-16 are allowed.
Claims 3-10 are objected to as being dependent upon a rejected base claim but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Contact Information
Any inquiry concerning this communication or earlier communications from the EXAMINER should be directed to AKSHAY TREHAN whose telephone number is (571) 270-5252. The examiner can normally be reached between the hours of 10am – 6pm during the weekdays Monday – Friday.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, TWYLER HASKINS can be reached on (571) 272-7406. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300.
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/AKSHAY TREHAN/
Examiner, Art Unit 2639
/TWYLER L HASKINS/Supervisory Patent Examiner, Art Unit 2639
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