DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The lengthy specification and drawings have not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Information Disclosure Statement
The Information Disclosure Statements (IDS) filed January 17, 2025, and February 17, 2026, contained an unusually large number of cited references. The cited references have been considered in accordance with MPEP § 609. Examiner notes, however, the following from MPEP § 609:
Consideration by the examiner of the information submitted in an IDS means nothing more than considering the documents in the same manner as other documents in Office search files are considered by the examiner while conducting a search of the prior art in a proper field of search.
In view of the unusually large number of cited references, various further filters were used to determine the most likely relevant references, including Search terms and classifications, as well as brief reviews of abstracts or figures, similar to other searches performed in this application. Should Applicant believe particular cited references have been overlooked or their importance underappreciated, Applicant may make note of that fact in their response or in a telephonic interview.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
Determining the scope and contents of the prior art.
Ascertaining the differences between the prior art and the claims at issue.
Resolving the level of ordinary skill in the pertinent art.
Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 109, 111, 112, and 187 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent No. 11,051,422 to Norton et al.
Regarding Claim 109, Norton discloses (e.g., Figs. 4 and 7 and their description, though the whole document appears relevant) a system comprising: a communication device 100 comprising a housing (col. 1, lines 58–60, enclosure 105, “housed in an enclosure,” reasonably suggesting a housing enclosing the device) comprising a front panel, a rear panel, an upper panel, and a lower panel (not explicitly labeled, but col. 1, lines 58–60 suggests an enclosure housing, which reasonably suggests front, rear, upper, and lower panels to achieve the enclosing function of the housing); a first circuit board or substrate that has a first surface that defines a length and a width of the first circuit board or substrate (e.g., Figs. 1, 2, and 7, memory slots 140, as well as pcb 145 and circuit/processors 110/135), and the first circuit board or substrate is positioned relative to the housing such that the first surface of the first circuit board or substrate is at an angle relative to the bottom panel of the housing, and the angle is in a range from 45° to 90° (Figs. 1, 2, and 7 show the memory modules 140 at 90°, the bottom panel being what appears as the bottom panel in Figs. 1, 2, and 7, closest into the page), wherein the first circuit board or substrate is spaced apart from the front panel at a distance that is less than one half the distance between the front panel and the rear panel, and the front panel and the first circuit board or substrate define a first space between the front panel and the first circuit board or substrate (e.g., Fig. 7, where the specific dimensions and relative positions are not explicitly taught, but selecting appropriate relative positions, or adjusting based on known design considerations, would have been obvious to one of ordinary skill in the art at the time of effective filing, yielding predictable results, absent evidence of criticality or otherwise unobvious results from the claim feature); at least one active component 220, in which at least a portion of the at least one active component is positioned in the first space between the front panel and the first circuit board or substrate (Fig. 7), in which the at least one active component is configured to at least one of (i) process signals that originate from one or more sources external to the housing and are transmitted through one or more paths that pass through the front panel and received by the at least one active component, or (ii) process signals that are output from the at least one active component and transmitted through one or more paths that pass through the front panel to one or more destinations external to the housing (e.g., transceiver 220, where such is generally understood as the purpose of an optical transceiver, Fig. 7), wherein the portion of the at least one active component positioned in the first space is configured to generate heat while processing the signals (e.g., claim 1 of Norton discusses dissipating heat from the optical transceiver); and a first air duct configured to direct air from an inlet positioned at a front portion of the housing toward the at least one active component (e.g., col. 5, lines 7–11 suggests that other cooling components may be used within the enclosure, and ducts for directing air towards a component to be cooled would have been one such obvious component, as it would facilitate cooling of the transceiver), the air duct having an upper wall and a lower wall (typical of cooling air ducts); and a second air duct configured to direct air carrying heat from the at least one active component toward a rear portion of the housing (similarly, where Norton suggests additional cooling components, ducts for directing air away from a component to be cooled, along a continuing path, would have been one such obvious component, absent evidence of criticality or otherwise unobvious results from the use of a duct to carry heat away from the active component towards a rear of the housing, beyond what would have been readily obvious to one of ordinary skill in the art at the time of effective filing).
Regarding Claim 111, Norton would have rendered obvious the system of claim 109 in which the at least one active component comprises at least one optical module, each optical module is configured to perform at least one of (i) convert input optical signals to electrical signals, or (ii) convert electrical signals to output optical signals (e.g., optical transceiver 220).
Regarding Claim 112, Norton discloses (e.g., Figs. 4 and 7 and their description, though the whole document appears relevant) a system comprising: a server rack 100; and a plurality of rackmount servers installed in the server rack (e.g., col. 1, lines 58–60, where Norton does not explicitly disclose the modular server 100 as a “rackmount” server, but teaches that the servers may be loaded in one or more racks, reasonably suggesting a rackmount server configuration), each rackmount server having an n rack unit form factor, wherein n is an integer in a range from 1 to 8 (col. 1, lines 58–60), each rackmount server comprising: a housing (col. 1, lines 58–60, “housed in an enclosure,” reasonably suggesting a housing enclosing the device) comprising a front panel, a rear panel, an upper panel, and a lower panel (not explicitly labeled, but col. 1, lines 58–60 suggests an enclosure housing, which reasonably suggests front, rear, upper, and lower panels to achieve the enclosing function of the housing); a first circuit board or substrate that has a first surface that defines a length and a width of the first circuit board or substrate (e.g., Figs. 1, 2, and 7, memory slots 140, as well as pcb 145 and circuit/processors 110/135), and the first circuit board or substrate is positioned relative to the housing such that the first surface of the first circuit board or substrate is at an angle relative to the bottom panel of the housing, and the angle is in a range from 45° to 90° (Figs. 1, 2, and 7 show the memory modules 140 at 90°, the bottom panel being what appears as the bottom panel in Figs. 1, 2, and 7, closest into the page); at least one optical module 220 coupled to the first circuit board or substrate through a two-dimensional array of at least four rows and at least four columns of electrical contacts (where Norton appears silent regarding specific electrical contacts, but such would have been obvious as a matter of design choice, balancing desired power / data throughput and size, yielding predictable results, absent evidence of criticality or otherwise unobvious results from the claim features), in which at least a portion of the at least one optical module is positioned between the front panel and the first circuit board or substrate (Fig. 7), in which each optical module is configured to perform at least one of (i) convert input optical signals to electrical signals, or (ii) convert electrical signals to output optical signals (generally understood as the purpose of an optical transceiver such as 220 in Fig. 7); and at least one optical path that passes through the front panel (Figs. 4 and 7), wherein the at least one optical module is configured to at least one of (i) receive at least some of the input optical signals from the at least one optical path or (ii) transmit at least some of the output optical signals through the at least one optical path (generally understood as the purpose of an optical transceiver such as 220 in Fig. 7).
Regarding Claim 187, Norton would have rendered obvious the system of claim 112 wherein the at least one optical module is coupled to the first circuit board or substrate through a two-dimensional array of at least ten rows and at least ten columns of electrical contacts (where Norton appears silent regarding specific electrical contacts, but such would have been obvious as a matter of design choice, balancing desired power / data throughput and size, yielding predictable results, absent evidence of criticality or otherwise unobvious results from the claim features).
Allowable Subject Matter
Claims 56, 70, 74, 80, 81, 84, 85, 89, 90, 91, 95, and 102-107 are allowed.
The following is an examiner’s statement of reasons for allowance:
Regarding Claim 56, Norton discloses (e.g., Figs. 4 and 7 and their description, though the whole document appears relevant) a system comprising: a communication device 100 comprising a housing (col. 1, lines 58–60, enclosure 105, “housed in an enclosure,” reasonably suggesting a housing enclosing the device) comprising a front panel, a rear panel, an upper panel, and a lower panel (not explicitly labeled, but col. 1, lines 58–60 suggests an enclosure housing, which reasonably suggests front, rear, upper, and lower panels to achieve the enclosing function of the housing), wherein the communication device is configured to support optical paths that pass through the front panel (e.g., Fig. 4, module 115 may include io devices, including optical connectors such as 175 in Fig. 4, col. 2, line 64 to col. 3, line 6) and have an aggregate bandwidth of at least 25 Gbps (where specific speeds are not taught, but Norton teaches desirability of increasing signal speeds as well as balancing speed with heat, reasonably suggesting any desired speed so long as counterbalanced with heat management; col. 7, lines 35–60; col. 8, line 65 to col. 9, line 18); a first circuit board or substrate that has a first surface that defines a length and a width of the first circuit board or substrate (e.g., Figs. 1, 2, and 7, memory slots 140, as well as pcb 145 and circuit/processors 110/135), and the first circuit board or substrate is positioned relative to the housing such that the first surface of the first circuit board or substrate is at a first angle relative to a main surface of the bottom panel of the housing, and the first angle is in a range from 45° to 90° (Figs. 1, 2, and 7 show the memory modules 140 at 90°, the bottom panel being what appears as the bottom panel in Figs. 1, 2, and 7, closest into the page), at least one optical module 220 coupled to the first circuit board or substrate, in which at least a portion of the at least one optical module is positioned between the front panel and the first circuit board or substrate (Fig. 7), in which each optical module is configured to perform at least one of (i) convert input optical signals to electrical signals, or (ii) convert electrical signals to output optical signals (col. 5, lines 7–26); and a plurality of optical paths that pass through the front panel, wherein each optical path comprises at least one optical fiber core or waveguide core (e.g., optical cables 175, Figs. 4 and 7), the at least one optical module is configured to at least one of (i) receive at least some of the input optical signals from the optical paths or (ii) transmit at least some of the output optical signals through the optical paths (generally understood as the purpose of an optical transceiver such as 220 in Fig. 7), and the optical paths have an aggregate bandwidth of at least 25 Gbps (where specific speeds are not taught, but Norton teaches desirability of increasing signal speeds as well as balancing speed with heat, reasonably suggesting any desired speed so long as counterbalanced with heat management; col. 7, lines 35–60; col. 8, line 65 to col. 9, line 18).
However, the prior art fails to disclose, and would not have rendered obvious, the combination of all features recited in Claim 56, taken together in combination as a whole, including but not limited to where “the first surface of the first circuit board or substrate is at a second angle relative to a main surface of the front panel of the housing, and the second angle is in a range from 0° to 45°”. Claims 70, 74, 80, 81, 84, 85, 89, 90, 91, 95, and 102-107 depend from Claim 56.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to RYAN CROCKETT whose telephone number is (571)270-3183. The examiner can normally be reached M-F 8am to 5pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Michael Caley can be reached at 571-272-2286. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/RYAN CROCKETT/Primary Examiner, Art Unit 2871
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