Prosecution Insights
Last updated: October 04, 2026
Application No. 18/951,306

PULSE GENERATOR WITH INDEPENDENT PANEL TRIGGERING

Non-Final OA §103§DOUBLEPATENT
Filed
Nov 18, 2024
Priority
Feb 28, 2017 — divisional of 10/946,193 +1 more
Examiner
LEE, ERICA SHENGKAI
Art Unit
Tech Center
Assignee
Pulse Biosciences Inc.
OA Round
1 (Non-Final)
65%
Grant Probability
Favorable
1-2
OA Rounds
1y 9m
Est. Remaining
96%
With Interview

Examiner Intelligence

Grants 65% — above average
65%
Career Allowance Rate
403 granted / 616 resolved
+5.4% vs TC avg
Strong +30% interview lift
Without
With
+30.1%
Interview Lift
resolved cases with interview
Typical timeline
3y 7m
Avg Prosecution
46 currently pending
Career history
659
Total Applications
across all art units

Statute-Specific Performance

§101
6.3%
-33.7% vs TC avg
§103
51.7%
+11.7% vs TC avg
§102
11.1%
-28.9% vs TC avg
§112
24.7%
-15.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 616 resolved cases

Office Action

§103 §DOUBLEPATENT
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority This application claims priority as a divisional application to prior Application No. 17/158,325 and names the inventor or at least one joint inventor named in the prior application. However all of the non-elected claims of the prior application were rejoined during allowance. Therefore the claims of the instant application are subject to a double patenting rejection, if applicable. Specification The disclosure is objected to because of the following informalities: Paragraph [0001] should be amended to reflect any patent numbers issued to related applications. Appropriate correction is required. Claim Objections Claim 6 is objected to because of the following informalities: “temperate” should state, “temperature”. Appropriate correction is required. Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 1-10 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 10-19 of U.S. Patent No. 12,179,018. Although the claims at issue are not identical, they are not patentably distinct from each other because the application claims are merely broader in scope than the patented claim. Application Claim Patented Claim 1 10 2 11 3 12 4 13 5 14 6 15 7 16 8 17 9 18 10 19 Claims 1-3, 7-15 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1, 13-16, 23-30 of U.S. Patent No. 10,946,193. Although the claims at issue are not identical, they are not patentably distinct from each other because the application claims are merely a method equivalent and broader in scope than the patented apparatus claim. Application Claim Patented Claim 1 13 2 14, 15 3 16 7 23 8 24 9, 11 25 10 26 12 27 13 28 14 30 15 1 Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1, 3-4, 7, 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over. Regarding claim 1, Lee et al. discloses a method of operating a pulse generation system (fig. 1), the method comprising: transmitting an input signal pulse to a driver circuit 82 (“The microprocessor 82, in turn, provides control signals on the lines 28, 34, and 38 to control, respectively, the contactors 26 and 32, and the motor-operated switch 36.” col. 5, lines 36-39); in response to receiving the input signal pulse, transmitting a driving signal pulse to a first selected pulse generator circuit (“a start signal is provided on line 102” col. 7, line 33) of a plurality of pulse generator circuits 10, 12, 134 (fig. 1) wherein the driving signal pulse is not transmitted to at least one of the pulse generator circuits (col. 7, lines 37-50); in response to receiving the driving signal pulse, generating, by the first selected pulse generator circuit, a first output pulse (“voltage appearing on the lines 30 from the generator 20” col. 7, lines 37-40); receiving, via a controller 82, a first indication of a current or a voltage of the first output pulse (“The source voltage powering the motor 18 is then monitored along with the output voltage of the generator 10.” col. 6, lines 45-47; “When the motor 18 reaches synchronous speed, the regulator 40 controls the voltage appearing on the lines 30 from the generator 20. The microprocessor 82 monitors this voltage on its input line 85” col. 7, lines 37-40). Lee et al. does not expressly disclose determining, by the controller, whether the first selected pulse generator circuit is operational based on the first indication. However, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that by the controller 82 monitoring the voltage appearing on lines 30 from generator 20 (col. 7, lines 37-40), determines this generator is “the first generator to be brought on line” (col. 7, lines 42-44) and determines if the first indication (“output voltage”) is properly regulated between predetermined limits before providing power from the pulse generator to load 16 (col. 7, lines 46-50), the microprocessor has therefore determined that pulse generator 10 is operational and fit for use for providing power from the pulse generator 10 to load 16. Regarding claim 3, Lee et al. discloses transmitting a second input signal to the driver circuit (“A start signal is provided to the microprocessor 96 on line 104” col. 7, lines 52-53); in response to receiving the second input signal, transmitting, by the driver circuit, a second driving signal to a second selected pulse generator circuit 12 of the plurality of pulse generator circuits (fig. 1); and in response to receiving the second driving signal, generating, by the second selected pulse generator circuit 12, a second output pulse (col. 7, lines 56-58), wherein the first output pulse and the second output pulse have different voltages (col. 11, lines 31-37). Regarding claim 4, Lee et al. discloses determining whether each of the selected pulse generator circuits is operational (see obviousness rejection of claim 1); and taking a corrective action for each of the pulse generator circuits of the pulse generation system determined to be not operational (“contactor 50 is opened and the synchronizing sequence is aborted” col. 8, lines 3-5). Regarding claim 7, Lee et al. discloses comparing the first indication with a threshold voltage to determine whether the first selected pulse generator circuit is operational (“if the generator 20 output voltage is properly regulated between predetermined limits” col. 7, lines 46-47). Regarding claim 15, Lee et al. discloses a pulse generation system (fig. 1), comprising: a controller 66; an output terminal (“provide power to the load 16” col. 7, line 32); a driver circuit 82 (“The microprocessor 82, in turn, provides control signals on the lines 28, 34, and 38 to control, respectively, the contactors 26 and 32, and the motor-operated switch 36.” col. 5, lines 36-39); and a plurality of pulse generator circuits 10, 12, the plurality of pulse generator circuits electrically coupled in parallel (fig. 1), wherein: the controller is configured to cause an input signal pulse to be transmitted to the driver circuit, and the driver circuit, upon receiving the input signal pulse, transmits a driving signal pulse to a selected one pulse generator circuit (“a start signal is provided on line 102” col. 7, line 33) of the plurality of pulse generator circuits and not transmit the driving signal pulse to at least one other pulse generator circuit of the plurality of pulse generator circuits (col. 7, lines 37-50), the selected one pulse generator circuit of the plurality of pulse generator circuits is configured to generate a portion of an output voltage pulse at the output terminal in response to the driving signal pulse being transmitted thereto (“provides power from the generator 10 to the load 16” col. 7, lines 33-50), and the at least one other pulse generator circuit that does not receive the driving signal pulse does not generate any portion of the output voltage pulse, and the one pulse generator circuit of the plurality of pulse generator circuits contributes a characteristic of the output voltage pulse (col. 7, lines 31-50). Since Lee et al. only discloses in this embodiment (fig. 1) two pulse generator circuits, the prior art therefore does not expressly disclose transmitting a driving signal to any selected two or more pulse generator circuits and not transmit the driving signal to at least one other pulse generator circuit, each of the selected two or more pulse generator circuits is configured to generate a first and a second respective portion of an output voltage pulse at the output terminal, each of the selected two or more pulse generator circuits contributes to one or more characteristics of the output voltage pulse. However, Lee et al. does disclose more than two pulse generator circuits is envisioned (col. 6, lines 59-64; col. 13, lines 37-48) such as a third pulse generator circuit 134 (fig. 1); and that it is possible for a driving signal to be transmitted to two or more pulse generator circuits (“a start signal is provided on line 102” col. 7, line 33; “A start signal is provided to the micrprocessor 96 on line 104” col. 7, line 52-53), each of the selected two or more pulse generator circuits is configured to generate a first and a second respective portion of an output voltage pulse at the output terminal, each of the selected two or more pulse generator circuits contributes to one or more characteristics of the output voltage pulse (“enable both of the motor driven generators 10 and 12 to share the four-hundred hertz power supplied to the load 16” col. 6, lines 20-35). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to that the device of Lee et al. would be capable of transmitting a driving signal to any selected two or more pulse generator circuits and not transmit the driving signal to at least one other pulse generator circuit, each of the selected two or more pulse generator circuits is configured to generate a first and a second respective portion of an output voltage pulse at the output terminal, each of the selected two or more pulse generator circuits contributes to one or more characteristics of the output voltage pulse, as the prior art teaches it is known in the art to use multiple generators to collectively provide more power to a load when only lower power sources are available (col. 1, lines 16-27), but to only provide combined output voltage when pulse generators are in synchronization (col. 6, lines 20-35), in which case a pulse generator not in synchrony would not have a driving signal transmitted to it and would not generate any portion of the output voltage pulse. Statement Regarding Prior Art Claim 9 is directed to a method of operating a pulse generation system where an impedance value at an output terminal of the pulse generation system is used by a controller to select a first subset of one or more pulse generator circuits of a plurality of pulse generator circuits, where in response to a transmission of an input signal to a driver circuit, the first subset of the one or more pulse generator circuits generates at least a portion of an output voltage pulse at the output terminal. Lee et al. (US 4,575,671) discloses the plurality of pulse generator circuits, and generation of an output voltage pulse in response to a driving signal being transmitted to the plurality of pulse generator circuits, but does not disclose an impedance value at an output terminal of the pulse generation system is used by a controller to select a first subset of one or more pulse generator circuits of the plurality of pulse generator circuits. Horiguchi et al. (US 5,254,880) discloses a plurality of pulse generators can be used to minimize impedance but does not disclose an impedance value at an output terminal of the pulse generation system is used by a controller to select a first subset of one or more pulse generator circuits of the plurality of pulse generator circuits. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERICA S LEE whose telephone number is (571)270-1480. The examiner can normally be reached M-F 8-7pm, flex. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, David Hamaoui can be reached at (571) 270-5625. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ERICA S LEE/Primary Examiner, Art Unit 3796
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Prosecution Timeline

Nov 18, 2024
Application Filed
Aug 19, 2026
Non-Final Rejection mailed — §103, §DOUBLEPATENT (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
65%
Grant Probability
96%
With Interview (+30.1%)
3y 7m (~1y 9m remaining)
Median Time to Grant
Low
PTA Risk
Based on 616 resolved cases by this examiner. Grant probability derived from career allowance rate.

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