DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Application
This office action is in response to the Application filed on 11/18/2024.
Claims 1-20 are presented for examination.
Drawings
The drawings submitted on 11/18/2024 are accepted.
Specification
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP §§ 706.02(l)(1) - 706.02(l)(3) for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/process/file/efs/guidance/eTD-info-I.jsp.
Claims 1-17 rejected on the ground of nonstatutory double patenting as being anticipated by claims 1-13 of U.S. Patent No. 12,182,445).
Although the claims at issue are not identical, they are not patentably distinct from each other because the instant claims are anticipated as shown below.
Current application
PAT 12,182,445
1, 8, 15
identifying an indication of a completion of a memory access command directed to the memory device;
determining whether there are other memory access commands directed to the memory device that are pending;
responsive to determining that there are other memory access commands that are pending and have not yet been completed, waiting for a threshold period of time to expire before sending the indication of the completion to a host system;
responsive to determining that the threshold period of time has expired, appending dummy data to additional indications of completions of the other memory access commands that have since completed to form a full completion data chunk equal to a host memory write size granularity;
and sending the full completion data chunk to the host system, the host system to store the completion data chunk as one or more completion queue entries in a completion queue in a host memory of the host system via a single host memory write operation
1
3
1
identifying an indication of a completion of a memory access command directed to the memory device;
determining whether there are other memory access commands directed to the memory device that are pending;
responsive to determining that there are other memory access commands that are pending and have not yet been completed, waiting for a threshold period of time to expire before sending the indication of the completion to a host system; …
responsive to determining that there are no other memory access commands pending, appending dummy data to the indication of the completion to form a full completion data chunk equal to a host memory write size granularity;
and sending the full completion data chunk comprising the indication of the completion and the dummy data to the host system
…
sending the completion data chunk to the host system, the host system to store the completion data chunk as one or more completion queue entries in a completion queue in a host memory of the host system via a single host memory write operation.
2,
9,
16
responsive to determining that there are no other memory access commands pending, appending the dummy data to the indication of the completion to form the full completion data chunk equal to a host memory write size granularity; and
sending the full completion data chunk comprising the indication of the completion and the dummy data to the host system.
3
responsive to determining that there are no other memory access commands pending, appending dummy data to the indication of the completion to form a full completion data chunk equal to a host memory write size granularity; and
sending the full completion data chunk comprising the indication of the completion and the dummy data to the host system.
3,
10,
17
determining whether the indication of the completion of the memory access command or any of the additional indications of the completions of the other memory access commands indicate an error of a corresponding memory access operation; and
responsive to there being an indication of an error, sending the indication of the error to the host system without waiting for the threshold period of time to expire.
4
determining whether the indication of the completion of the memory access command or any of the additional indications of the completions of the other memory access commands indicate an error of a corresponding memory access operation; and
responsive to there being an indication of an error, sending the indication of the error to the host system without waiting for the threshold period of time to expire.
4,
11,
18
responsive to there being an indication of an error,
sending the indication of the completion to the host system as a partial completion data chunk, wherein the partial completion data chunk has a smaller size than a host memory write size granularity.
4
2
determining whether the indication of the completion of the memory access command or any of the additional indications of the completions of the other memory access commands indicate an error of a corresponding memory access operation; and
responsive to there being an indication of an error, sending the indication of the error to the host system without waiting for the threshold period of time to expire
sending the indication of the completion to the host system as a partial completion data chunk, wherein the partial completion data chunk has a smaller size than a host memory write size granularity
5,
12,
19
coalescing the additional indications of completions of the other memory access commands that have since completed and are available with the indication of the completion into a completion data chunk.
1
responsive to determining that the threshold period of time has expired, coalescing additional indications of completions of the other memory access commands that have since completed and are available with the indication of the completion into a completion data chunk
6,
13,
20
responsive to the threshold period of time not having expired, determining whether a size of the coalesced indications has reached the host memory write size granularity; and
responsive to determining that the size of the coalesced indications has reached the host memory write size granularity, sending the completion data chunk to the host system, wherein the completion data chunk comprises a full completion data chunk equal to the host memory write size granularity.
7
responsive to the threshold period of time not having expired, determining whether a size of the coalesced indications has reached the host memory write size granularity; and
responsive to determining that the size of the coalesced indications has reached the host memory write size granularity, sending the completion data chunk to the host system, wherein the completion data chunk comprises a full completion data chunk equal to the host memory write size granularity.
7
responsive to determining that the size of the coalesced indications has not reached the host memory write size granularity, continuing to coalesce additional indications of completions of the other memory access commands.
8
responsive to determining that the size of the coalesced indications has not reached the host memory write size granularity, continuing to coalesce additional indications of completions of the other memory access commands.
Allowable Subject Matter
Claims 1-20 would be allowable pending on resolving the aforementioned double patenting rejection. The following is an examiner’s statement of reasons for allowance. The closest prior art identified:
Benisty et al. (US 2017/0123656 A1) teach A system comprising: a memory device; and a processing device, operatively coupled with the memory device, to perform operations comprising (Fig. 1, 3, [0015], and [0018] show a storage including memory 110 and controller 108; where the functions of completion aggregator 300 are functions of the controller 108); identifying an indication of a completion of a memory access command directed to the memory device (Fig. 4A and [0033]-[0034] teach that the system receives a completion indicator (step 402, request for a new completion entry posting)); determining whether there are other memory access commands directed to the memory device that are pending; responsive to determining that there are other memory access commands pending ([0041]-[0042], the completion entry is aggregated with at least one other completion entry within an aggregation data store… aggregation of the completion entry and the at least one other completion entry is sent from the aggregation data store to the host memory device in response to a trigger event. … the trigger event may include a determination that the aforementioned aggregation includes a number of completion entries) …and sending the completion data chunk to a host system, the host system to store the completion data chunk as one or more completion queue entries in a completion queue in a host memory of the host system via a single host memory write operation (Benisty Fig. 1, 5, [0012], [0027], [0029], and [0042] teaches flushing the aggregated completion entries to the completion queue of the host memory device as a single operation in response to an appropriate triggering event).
Byun et al. (US 2020/0150898 A1) teach responsive to determining that there are no other memory access commands pending, appending dummy data to the indication of the completion to form a full completion data chunk equal to a host memory write size granularity (Byun [0034], [0040]-[0041] teaches appending dummy data to write operations to satisfy the alignment data size of the memory).
None of cited prior art, alone or in combination, teaches or suggests the particular combination of steps or elements as recited in the independent claims 1, 8 and 15. Specifically, the cited prior art on record fails to teach or suggest as a whole the limitation with level of detail that includes: “determining whether there are other memory access commands directed to the memory device that are pending; responsive to determining that there are other memory access commands that are pending and have not yet been completed, waiting for a threshold period of time to expire before sending the indication of the completion to a host system”.
Claims 2-7, 9-14, and 16-20 are potentially allowable as being dependent upon, and thus incorporating therein, the potentially allowable subject matter of the respective parent claims.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
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/TRACY C CHAN/ Primary Examiner, Art Unit 2138