Prosecution Insights
Last updated: April 19, 2026
Application No. 18/951,480

RESAMPLER FOR ELECTRONIC DISPLAY HAVING MULTIPLE PIXEL LAYOUTS

Non-Final OA §102§103§112
Filed
Nov 18, 2024
Examiner
OSORIO, RICARDO
Art Unit
2625
Tech Center
2600 — Communications
Assignee
Apple Inc.
OA Round
1 (Non-Final)
89%
Grant Probability
Favorable
1-2
OA Rounds
2y 3m
To Grant
97%
With Interview

Examiner Intelligence

Grants 89% — above average
89%
Career Allow Rate
723 granted / 813 resolved
+26.9% vs TC avg
Moderate +8% lift
Without
With
+8.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
21 currently pending
Career history
834
Total Applications
across all art units

Statute-Specific Performance

§101
1.8%
-38.2% vs TC avg
§103
43.1%
+3.1% vs TC avg
§102
26.1%
-13.9% vs TC avg
§112
7.0%
-33.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 813 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 15 recites the limitation " using a different layout resampler than those used for the different regions of the plurality of regions." There is insufficient antecedent basis for this limitation in the claim. Claim 15 will be examined as best understood. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 11-14 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Tang et al. (US 11,217,211). As to claim 11, Tang discloses a system (Fig. 1, (10) comprising: an electronic display (Fig. 1, (12) comprising a plurality of regions having different respective pixel layouts (Fig. 7, (60, 70)(col. 22, lines 13-24); and image processing circuitry (col. 1, (27) communicatively coupled to the electronic display (Fig. 1, (12), wherein the image processing circuitry (col. 1, (27) is configured to process image data associated with different regions of the plurality of regions(Fig. 7, (60, 62/70)(col. 23, lines 40-49). As to claim 12, Tang discloses, further, apply a first resolution compensation factor based on a first pixel layout of a first region of the plurality of regions (col. 32, lines 4-16); and apply a second resolution compensation factor based on a second pixel layout of a second region of the plurality of regions (col. 32, line 54-col. 33, line 3). As to claim 13, Tang discloses, further, the first pixel layout (Fig. 7, (70)(considered the first pixel layout) implements a higher pixel resolution than the second pixel layout (Fig. 7,(60)(considered the second pixel layout)(col. 22, lines 13-24). As to claim 14, Tang discloses, further, the second resolution compensation factor is greater than the first resolution compensation factor (col. 32, lines 4-16). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tang et al. (US 11,217,211) in view of Minaki et al. (US 2023/0100358). As to claim 15, Tang discloses, further, a boundary region (Fig. 7, (68) between at least two of the plurality of regions (Fig. 7, (60, 70), wherein the image processing circuitry is configured to process image data associated with the boundary region (col. 23, lines 17-45). However, Tang, further, does not specifically disclose the processing circuit using a different layout resampler for different regions. Minaki discloses the processing circuit (Fig. 1, (140) using a different layout resampler for different regions (subpixel rendering (SPR) circuits (Fig. 2, (222, 224)) are considered resampling circuits since have the same functionality) are respectively being used for different regions having different density (resolution)(Fig. 2, (222), (224), and a boundary region in between[0048]. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have the resamplers, as taught by Minaki, in the device of Tang, since it may effectively mitigate distortion and/or color shift potentially caused by the subpixel rendering [0039]. Claim(s) 1-3, 6-10 and 16-22 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tang et al. (US 11,217,211) in view of Minaki et al. (US 2023/0100358). As to claims 1 and 20, Tang discloses an electronic device (Fig. 1, (10) comprising: a display panel (Fig. 7, (40A) comprising a first region having a first pixel layout (Fig. 7, (60) and a second region having a second pixel layout (Fig. 7, (62); a sensor (Fig. 7, (42A) disposed behind the first region(Fig. 7, (40A)(col. 21, line 60-col. 21, line 13); and image processing circuitry (Fig. 1, (27)communicatively coupled to the display panel (Fig. 1, (12), Fig. 7(40A). However, Tang, further, does not specifically disclose the image processing circuitry is configured to process image data associated with the first region of the display panel using a first pixel layout resampler and process image data associated with the second region of the display panel using a second pixel layout resampler. Minaki discloses the image processing circuitry (Fig. 1, (140) is configured to process image data associated with the first region of the display panel (Fig. 2, (271) using a first pixel layout resampler (Fig. 2, (222) and process image data associated with the second region of the display panel (Fig. 2, (270) using a second pixel layout resampler (Fig. 2, (224)[0048]. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have the resamplers, as taught by Minaki, in the device of Tang, since it may effectively mitigate distortion and/or color shift potentially caused by the subpixel rendering [0039]. As to claim 2, Tang, further, receive the image data associated with the first region and the second region (col. 23, lines 23-49); determine a spatial position on the display panel of the image data (col. 29, lines 51-64). However, Tang, further, does not specifically disclose to process the image data based on the spatial position using the first pixel layout resampler or the second pixel layout resampler based on the spatial position. Minaki discloses the image processing circuitry (Fig. 1, (140) is configured to process image data based on the spatial position using the first pixel layout resampler (Fig. 2, (222) based on spatial position [0048]. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have the resamplers, as taught by Minaki, in the device of Tang, since it may effectively mitigate image artifact caused by the subpixel rendering [0038]. As to claim 3, Tang, further, a third region implemented with a third pixel layout (Fig. 7, (68). However, Tang, further, does not specifically disclose to process image data associated with the third region of the display panel using a third pixel layout resampler. Minaki discloses disclose to process image data associated with the third region of the display panel [0048](“ A third possible value of the location setting 233 may indicate the input image data 210 corresponds to a boundary between the low pixel density region 271 and the nominal pixel density region”). using a third pixel layout resampler [0048]. (Although, not directly mentioned, since (222) is being used to resample first region (271), and (224) is being used to resample second region (270), it is clear that if a boundary between the first and second regions has a third possible value of the location setting (233) and input image data being designated to correspond to a boundary region, then a third resampler (SPR) is implicitly described)[0048]. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have the third resampler, as taught by Minaki, in the device of Tang, to reduce visible artifacts in the boundary between the low pixel density region and the nominal pixel density region [0051]. As to claim 6, Tang discloses a boundary region (Fig. 7, (68) comprising an area of pixels in the first region (Fig. 7, (60) and an area of pixels in the second region (Fig. 7, (70) adjacent to the area of pixels in the first region (Fig. 7, (60)(col. 33, lines 3-19); and the image processing circuitry (Fig. 1, (27) is configured to process image data associated with the boundary region differently from pixels of the first region not in the boundary region and differently from pixels of the second region not in the boundary region (col. 23, lines 17-49). As to claim 7, further, Tang discloses to process image data associated with the boundary region (Fig. 7, (68) using a different set of pixel gains than applied to pixels of the first region not in the boundary region or to pixels of the second region not in the boundary region (col. 32, lines 17-37). As to claims 8, and 9, further, Tang discloses the first region (Fig. 7, (60) comprises a lower resolution than the second region (Fig. 7, (70)(col. 31, line 62-col. 32, line 3), wherein the image processing circuitry (Fig. 1, (27) is configured to apply a higher gain to the image data associated with the first region than to the image data associated with the second region of the display panel (col. 32, lines 4-16). As to claim 10, Tang discloses, further, a third region having a third pixel layout (Fig. 7, (68), wherein the third region (68) comprises a resolution greater than a resolution of the first region (60) and less than a resolution of the second region (70) (col. 23, lines 11-28). As to claim 16, Tang discloses, further, process image data associated with a first region (Figs. 7 and 14, 70), of an electronic display having a first pixel layout (col. 22, lines 13-24) using a first resolution compensation factor (col. 32, lines 4-37); and process image data associated with a second region (Fig. 7, (62) of the electronic display having a second pixel layout (col. 22, lines 13-24) using a second resolution compensation factor (col. 32, lines 4-37). However, Tang, further, does not specifically disclose to use a first pixel layout resampler for the first region and a second pixel layout resampler for the second region. Minaki discloses the image processing circuitry (Fig. 1, (140) is configured to process image data associated with the first region of the display panel (Fig. 2, (271) using a first pixel layout resampler (Fig. 2, (222) and process image data associated with the second region of the display panel (Fig. 2, (270) using a second pixel layout resampler (Fig. 2, (224)[0048]. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have the resamplers, as taught by Minaki, in the device of Tang, since it may effectively mitigate distortion and/or color shift potentially caused by the subpixel rendering [0039]. As to claim 17, Tang, further, discloses determine the first resolution compensation factor based on a first gain corresponding to the first pixel layout (Fig. 7, (60)(col. 32, lines 4-16); and determine the second resolution compensation factor based on a second gain corresponding to the second pixel layout (Fig. 7, (70)(col. 32, lines 4-16), wherein the second resolution compensation factor is greater than the first resolution compensation factor (col. 32, lines 4-16). However, Tang, as anticipated by Minaki, further, does not specifically disclose the first and second resolution compensation factors are based on a first and second gain maps, respectively. Examiner takes Official Notice as to the first and second resolution compensation factors are based on a first and second gain maps, respectively. Even if not specifically disclosed in Tang, a gain map, or some other table or storage means, would be necessary to extract the gain resolution compensation factor that goes with the specific resolution. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have a gain map, in the device of Tang and Minaki, because it is commonly known in the art of display devices with different resolution regions to store, or map, values that would be assigned to different areas, or resolutions. As to claims 18 and 19, further, Tang discloses determine a third resolution compensation factor based on a third gain (col. 32, (lines 18-37) and a third pixel layout of a third region (Fig. 7, (68) (boundary region between the first region and the second region) of the electronic display, wherein the third pixel layout (68) comprises a pixel resolution greater than the second pixel layout (70) and less than the first pixel layout (col. 23, lines 11-28), and wherein the third resolution compensation factor is greater than the first resolution compensation factor and less than the second resolution compensation factor (col. 32, lines 18-37); and process image data associated with the third resolution compensation factor (col. 32, lines 18-37). However, Tang, further, does not specifically disclose process data associated with the third region using a third pixel layout resampler. Minaki discloses disclose to process image data associated with the third region of the display panel [0048](“ A third possible value of the location setting 233 may indicate the input image data 210 corresponds to a boundary between the low pixel density region 271 and the nominal pixel density region”). using a third pixel layout resampler [0048]. (Although, not directly mentioned, since (222) is being used to resample first region (271), and (224) is being used to resample second region (270), it is clear that if a boundary between the first and second regions has a third possible value of the location setting (233) and input image data being designated to correspond to a boundary region, then a third resampler (SPR) is implicitly described)[0048]. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have the third resampler, as taught by Minaki, in the device of Tang, to reduce visible artifacts in the boundary between the low pixel density region and the nominal pixel density region [0051]. As to claim 21, Tang discloses, further, the first pixel layout (Fig. 7, (70)(considered the first pixel layout) implements a higher pixel resolution than the second pixel layout (Fig. 7,(60)(considered the second pixel layout)(col. 22, lines 13-24). As to claim 22, Tang discloses, further, the second pixel layout (Fig. 7, (70)has a different relative positioning of different color subpixels than the first pixel layout (Fig. 7, (60)(col. 3, lines 28-45, and col. 25, lines 23-29). Claim(s) 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tang et al. (US 11,217,211) in view of Minaki et al. (US 2023/0100358) as applied to claims 1 and 3 above, and further in view of Lamvik et al. (US 2004/0227703). As to claim 4, Tang discloses, further, a first boundary region (Fig. 7, (68) between the first region (Fig. 7, (60) and the second region (Fig. 7, (70). However, Tang, further, does not specifically disclose a second boundary region between the second region and the third region; and the image processing circuitry is configured to process image data associated with the first boundary region and the second boundary region. Lamvik, further, discloses a second boundary region (Fig. 1, (16) between the second region (Fig. 1, (12) and the third region (Fig. 1, (20); and the image processing circuitry (Fig. 9, (144) is configured to process image data associated with the first boundary region and the second boundary region [0038, 0039, 0055]. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have the second boundary region, as taught by Lamvik, in the device of Tang and Minaki, since this configuration allows a viewer to see the central region of the field of view in higher resolution and the peripheral regions of the field of view in lower resolution [0038]. Allowable Subject Matter Claim 5 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Claim 5 is indicated as allowable since certain key features of the claimed invention are not taught or fairly suggested by the prior art. In claim 5, “wherein the image processing circuitry is configured to process the image data associated with the first boundary region using a fourth pixel layout resampler, and the image data associated with the second boundary region using a fifth pixel layout resampler”. The closest prior art of record, Minaki et al. (US 2023/0100358), discloses the image processing circuitry (Fig. 1, (140) is configured to process image data associated with the first region of the display panel (Fig. 2, (271) using a first pixel layout resampler (Fig. 2, (222) and process image data associated with the second region of the display panel (Fig. 2, (270) using a second pixel layout resampler (Fig. 2, (224)[0048]. However, singularly or in combination, fails to anticipate or render the above underlined limitations obvious, together with all the other limitations of the claims. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Hack et al. (US 10,229,960) discloses one high resolution region, two low resolution regions, and two transitional resolution regions (Fig. 4B, (col. 11, lines 32-46). Any inquiry concerning this communication or earlier communications from the examiner should be directed to RICARDO OSORIO whose telephone number is (571)272-7676. The examiner can normally be reached M-F 9 AM-5:30 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Boddie can be reached at 571-272-0666. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /RICARDO OSORIO/Primary Examiner, Art Unit 2625
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Prosecution Timeline

Nov 18, 2024
Application Filed
Mar 20, 2026
Non-Final Rejection — §102, §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
89%
Grant Probability
97%
With Interview (+8.2%)
2y 3m
Median Time to Grant
Low
PTA Risk
Based on 813 resolved cases by this examiner. Grant probability derived from career allow rate.

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