DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The drawings are objected to under 37 CFR 1.83(a) because they fail to show the structural details of the plurality of blocks shown in Figures 1-2 as described in the specification (blocks 202, 200 1014 1010 without any structural components (all other blocks too) and/or input/out connections to any other blocks. Any structural detail that is essential for a proper understanding of the disclosed invention should be shown in the drawing. MPEP § 608.02(d). Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-3, 17 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Shiozaki et al. (US 2019/0066955).
Regarding Claim 1, Shiozaki discloses an apparatus (load controller, Figures 1-24), comprising:
a plurality of channels (CH1, CH2, CH3, CH4, Figures 1, 4-6, 16, 18-19) configured to drive at least one electrical load (31, 32, 1, 3-6, 21 22, Figure 18);
a control module (14, Figure 1) configured to generate at least one channel control signal to operate at least one channel in the plurality of channels (output signal from 14 to input of CH1, CH2, CH3, CH4, Figure 1);
an electronic fuse (11, Figure 1, SW1,…, SWn, Figure 16) configured to monitor at least one parameter in respective channels of the plurality of channels and to detect anomalous conditions in the respective channels based on the at least one parameter (); and
a parallel-mode block (parallel-block of CH2, CH3, Figure 5, CH2, CH3, CH4, Figure 6) configured to define at least one set of channels including at least two channels of the plurality of channels, the channels in the at least one set of channels being configured to drive a same load (CH2, CH3 driving 32, Figure 5, CH2, CH3, CH4 driving 32, Figure 6);
wherein: the control module is configured to receive from the parallel-mode block parallel-mode management control signals and to operate the channels in the at least one set of channels based on the parallel-mode management control signals received by the parallel-mode block (112D with input from Sw1-Swn and 112F with output to SW1-SWn, Figure 16, control unit 214 with input from 211, 212 and output to 211, 212, Figure 18), and
the electronic fuse is configured to make the channels in the at least one set of channels non-conductive in response to an anomalous condition detected in at least one channel in the at least one set of channels (Paragraphs 25-26, 163-164).
Regarding Claim 2, Shiozaki discloses the apparatus according to Claim 1, comprising: channel control registers configured to have stored therein configuration parameters for respective channels in the plurality of channels (comprising 112E in 112, Figure 16, Paragraphs 109, 111, 116, 126).
Regarding Claim 3, Shiozaki discloses the apparatus according to Claim 2, wherein the channel control registers of the channels in the at least one set of channels are configured to have stored therein identical configuration parameters for the respective channels in the at least one set of channels and the control module is configured to receive from the parallel-mode block parallel-mode management control signals based on the identical configuration parameters (comprising 112E in 112, Figure 16, Paragraphs 109, 111, 116, 126).
Regarding Claim 17, Shiozaki discloses a method of operation of an apparatus (Figures 1-24) including a plurality of channels (CH1, CH2, CH3, CH4, Figures 1, 4-6, 16, 18-19) configured to drive at least one electrical load (31, 32, 1, 3-6, 21, 22, Figure 18);
a control module (14, Figure 1) configured to generate at least one channel control signal to operate at least one channel in the plurality of channels (output signal from 14 to input of CH1, CH2, CH3, CH4, Figure 1);
an electronic fuse (11, Figure 1, SW1,…, SWn, Figure 16) configured to monitor at least one parameter in respective channels of the plurality of channels and to detect anomalous conditions in the respective channels based on the at least one parameter; and
a parallel-mode block (parallel-block of CH2, CH3, Figure 5, CH2, CH3, CH4, Figure 6) configured to define at least one set of channels including at least two channels of the plurality of channels, the channels in the at least one set of channels being configured to drive a same load (CH2, CH3 driving 32, Figure 5, CH2, CH3, CH4 driving 32, Figure 6);
wherein: the control module is configured to receive from the parallel-mode block parallel-mode management control signals and to operate the channels in the at least one set of channels based on the parallel-mode management control signals received by the parallel-mode block (112D with input from Sw1-Swn and 112F with output to SW1-SWn, Figure 16, control unit 214 with input from 211, 212 and output to 211, 212, Figure 18), and
wherein the electronic fuse is configured to make the channels in the at least one set of channels non-conductive in response to an anomalous condition detected in at least one channel in the at least one set of channels (Paragraphs 25-26, 163-164), and
wherein at least one electrical load coupled to the plurality of channels to be driven (Figures 5-6, 18), wherein the method comprises:
the electronic fuse monitoring at least one parameter in a respective channel in the plurality of channels and detecting anomalous conditions in the respective channel based on the at least one parameter (Paragraph 26, “…abnormality detection unit may detect the abnormality if even one of the temperature of the parallel switch, the current flowing through the parallel switch, and the power supplied to the parallel switch is equal to or higher than a threshold value…”);
the parallel-mode block defining the at least one set of channels including at least two channels of the plurality of channels (Figures 5-6, 18);
the control module receiving parallel-mode management control signals from the parallel-mode block and operating the channels in the at least one set of channels based on the parallel-mode management control signals received by the parallel-mode block (input to 214 from 211, 212 and output from 214 to 211, 21, Figure 18); and
the electronic fuse making the channels in the at least one set of channels non-conductive in response to an anomalous condition detected in at least one channel in the at least one set of channels (Paragraph 147, “…when any one of the temperature data, power data, and current data of the semiconductor relay CH11 exceeds the cutoff setting temperature, cutoff setting power, or cutoff setting current, the cutoff determining section 214G determines to cut off (turn off) the semiconductor relay CH11 that exhibits a value equal to or greater than the cutoff setting temperature, cutoff setting power, or cutoff setting current. The cutoff determining section 214G further cuts off the semiconductor relays CH14, CH21, and CH24 connected to the same load 21…”).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Shiozaki et al. (US 2019/0066955).
Regarding Claim 4, Shiozaki discloses the apparatus according to Claim 3, wherein the channel control registers of the channels in the at least one set of channels are configured to: update configuration parameters of the channels (Paragraph 161).
Shiozaki does not specifically disclose the details to include the channel control registers of the channels in the at least one set of channels are configured to receive, at an update control register out of the channel control registers of the channels in the at least one set of channels, an update request of the identical configuration parameters; update the identical configuration parameters in the channel control registers of the channels in the at least one set of channels in response to the update request received at the update control register; and ignore other update requests of the identical configuration parameters received at channel control registers of the channels in the at least one set of channels different from the update control register.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to include an update control register in the apparatus of Shiozaki and configure specific steps such as to receive an update request, update the control parameters and control channels based on the design requirements for safe, efficient operation of the apparatus.
Claims 8-14 are rejected under 35 U.S.C. 103 as being unpatentable over Shiozaki et al. (US 2019/0066955) in view of Randazzo et al. (US 2023/0187922).
Regarding Claim 8, Shiozaki discloses the apparatus according to Claim 1, comprising:
a current sense block configured to sense currents flowing in the channels in the plurality of channels (comprising T71, T72, Figure 18, Paragraphs 135, 137, 143, 145); and
wherein the control module is configured to generate at least one channel control signal to operate at least one channel in the plurality of channels based on the digital channel current signal corresponding to the at least one channel (output from 112D to the channels, Figure 16, output from 214 to T61, T62 input terminal of 211, 212, Figure 18),
Shiozaki does not specifically disclose an analog-to-digital converter, ADC, configured to receive channel currents sensed for the channels in the plurality of channels and to convert the sensed channel currents into digital channel current signals, and wherein the electronic fuse comprises ADC built-in self-test, BIST, circuitry configured to perform a self-test as to functional safety requirements being met in the analog-to-digital converter.
Randazzo discloses an apparatus (Figures 1-36, 100, Figure 1) comprising an electronic fuse coupled to a channel configured to drive a load (110 coupled to 104 to driving load 106, Figure 1),
a current sense block configured to sense currents flowing in the channel (112, 122, Figures 1-3); and an analog-to-digital converter, ADC, configured to receive channel currents sensed for the channels in channel and to convert the sensed channel current into digital channel current signal (comprising 138 122 coupled to 136, Figure 2, 238, Figures 9-10), a control module (comprising gate driver 116, Figures 1-3, 9-10) is configured to generate at least one channel control signal to operate the channel based on the digital channel current signal corresponding to the channel (output of 138 to logic 122 to output control signal to gate driver 116, Figure 2), and wherein the electronic fuse comprises ADC built-in self-test, BIST (comprising 113, Figure 3), circuitry configured to perform a self-test as to functional safety requirements being met in the analog-to-digital converter (Paragraph 15, paragraph 76, “…the current sense subsystem 112 includes corresponding self-test circuitry 113. The current sense subsystem 112 may be operable to initiate or otherwise be placed in a self-test state, which is a safety state to improve reliability of the system”). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide in the apparatus of Shiozaki, an ADC and ADC built-in self-test as taught by Randazzo, to increase the safety and reliability of the apparatus.
Regarding Claim 9, combination of Shiozaki and Randazzo discloses the apparatus according to Claim 8, wherein the ADC BIST circuitry is configured to: generate a plurality of reference current signals indicative of different reference current levels (Vthh, Vthl, Figure 3, Paragraph 78); and provide the plurality of reference current signals to the analog-to-digital converter, wherein the analog-to-digital converter is configured to receive and convert the plurality of reference current signals into digital reference current signals (Figures 1-3, Paragraph 78), and
wherein the ADC BIST circuitry is configured to perform the self-test as to functional safety requirements being met in the analog-to-digital converter by: receiving and comparing the digital reference current signals with a current acceptance mask (Figure 3, Paragraph 78); and considering functional safety requirements in the analog-to-digital converter as being met in response to the digital reference current signals matching the current acceptance mask and as not being met in response to the digital reference current signals failing to match the current acceptance mask (Figure 3, Paragraphs 76-81).
Regarding Claim 10, combination of Shiozaki and Randazzo discloses the apparatus according to Claim 9, wherein the ADC BIST circuitry is configured to disable current sensing by the current sense block during the self-test as to functional safety requirements being met in the analog-to-digital converter ((Figures 1-3, 9-10, 26, Paragraph 76).
Regarding Claim 11, Shiozaki does not specifically disclose the apparatus according to Claim 1, wherein the electronic fuse is configured to provide harness protection and comprises harness protection built-in self-test, BIST, circuitry configured to perform a self-test as to functional safety requirements being met by the harness protection.
Randazzo discloses an apparatus (Figures 1-36, 100, Figure 1) comprising an electronic fuse coupled to a channel configured to drive a load (110 coupled to 104 to driving load 106, Figure 1), wherein the electronic fuse is configured to provide harness protection (I2T function 124, Figure 2) and comprises harness protection built-in self-test, BIST (128, Figure 2), circuitry configured to perform a self-test as to functional safety requirements being met by the harness protection (Paragraph 15, “….the electronic fuse systems and devices include self-test circuitry which may be used to control safety of the whole system”, Paragraph 78). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide in the apparatus of Shiozaki, harness protection built-in self-test as taught by Randazzo, to increase the safety and reliability of the apparatus.
Regarding Claim 12, combination of Shiozaki and Randazzo discloses the apparatus according to Claim 11, wherein the apparatus comprises an analog-to-digital converter, ADC, configured to receive at least one input signal and to convert the at least one input signal into a digital output signal (comprising 138 coupled to 136 to receive Vo and output digital signal to logic 122, Figure 2, Figures 3, 9-10), and wherein the harness protection BIST circuitry is configured to:
generate a plurality of reference voltage signals indicative of different voltage levels (Vthh, Vthl, Figure 3, Paragraph 76); and provide the plurality of reference voltage signals to the analog-to-digital converter, wherein the analog-to-digital converter is configured to receive and convert the plurality of reference voltage signals into digital reference voltage signals (Figures 1-3, Paragraph 78), and wherein the harness protection BIST circuitry is configured to perform the self-test as to functional safety requirements being met by the harness protection by: receiving and comparing the digital reference voltage signals with a voltage acceptance mask (Figure 3, Paragraph 78); and considering functional safety requirements in the harness protection as being met in response to the digital reference voltage signals matching the voltage acceptance mask and as not being met in response to the digital reference voltage signals failing to match the voltage acceptance mask (Figure 3, Paragraphs 76-81).
Regarding Claim 13, combination of Shiozaki and Randazzo discloses the apparatus according to Claim 12, wherein the harness protection BIST circuitry is configured to disable harness protection provided by the electronic fuse during the self-test as to functional safety requirements being met in the harness protections (Figures 1-3, 9-10, 26, Paragraphs 76).
Regarding Claim 14, combination of Shiozaki and Randazzo discloses the apparatus according to Claim 8, wherein the self-test as to functional safety requirements is performed in response to power on reset signals (Figures 1-3, 9-10, 26, Paragraphs 76, 250).
Claims 15-16 are rejected under 35 U.S.C. 103 as being unpatentable over Shiozaki et al. (US 2019/0066955) in view of Jordan et al. (US 2004/0047097).
Regarding Claim 15, Shiozaki discloses the apparatus according to Claim 1, comprising: a voltage pre-regulator configured to produce a pre-regulated supply voltage for the apparatus (comprising power source IC 111 outputting a regulated voltage from power source voltage input received at T101, Figure 16).
Shiozaki does not disclose the details of the power source IC to include a capacitor coupled to a dedicated pin, the capacitor configured to be charged to a capacitor charge voltage equalling the pre-regulated supply voltage; and
switch circuitry coupled to the voltage pre-regulator, the switch circuitry configured to detect a voltage drop in the pre-regulated supply voltage and to counter discharge of the capacitor with respect to the charge voltage equalling the pre-regulated supply voltage in response to detecting a voltage drop in the pre-regulated supply voltage, wherein, the switch circuitry being further configured to detect a voltage drop on a battery line coupled to the voltage pre-regulator and, in response to the detection, to avoid a discharge of the capacitor,
Jordan discloses a voltage pre-regulator to provide a regulated voltage (comprising 22, Figure 1); a capacitor coupled to a dedicated pin (18 coupled to a dedicated pin, not labelled, Figure 1), the capacitor configured to be charged to a capacitor charge voltage equalling the pre-regulated supply voltage (22 pre-charging 18 to pre-regulated supply voltage, Figure 1); and
circuitry coupled to the voltage pre-regulator, the circuitry configured to detect a voltage drop in the pre-regulated supply voltage and to counter discharge of the capacitor with respect to the charge voltage equalling the pre-regulated supply voltage in response to detecting a voltage drop in the pre-regulated supply voltage (microprocessor 16, Figures 1 configured to detect undervoltage condition 54 and de-activate pre-charge 50, Figure 2), wherein, the circuitry being further configured to detect a voltage drop on a battery line coupled to the voltage pre-regulator and, in response to the detection, to avoid a discharge of the capacitor (16 configured to detect overvoltage condition 48 and de-activate pre-charge 50, Figure 2). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide in the apparatus of Shiozaki, a circuitry as taught by Jordan to monitor and control the pre-regulated supply voltage and to include a switch as an additional control element to protect the devices coupled to receive the pre-regulated voltage supply and safe operation of the apparatus.
Regarding Claim 16, combination of Shiozaki and Jordan discloses the apparatus according to Claim 15, comprising a supply pin configured to: receive a battery supply voltage through a battery pin (Shiozaki, T101, Figure 16, terminal/pin coupled + terminal of battery 14, Figure 1); receive a scaled supply voltage based on the battery supply voltage (Shiozaki, output of 111, Figure 16); and apply the scaled supply voltage to the dedicated pin in the apparatus to produce the pre-regulated supply voltage from the scaled supply voltage (operating voltage from 111 to 112A, Figure 16) . Combination of Shiozaki and Jordan does not specifically disclose applying the scaled supply voltage to the dedicated pin being though a diode. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide in the combination a diode to prevent reverse current flow from the dedicated pin to other devices coupled to the scaled supply pin.
Allowable Subject Matter
Claims 5-7 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: Regarding Claim 5, Shiozaki does not disclose the apparatus according to Claim 1, comprising:
an additional module configured to: receive a start signal indicating if at least one channel in the plurality of channels is coupled to a load comprising a capacitive component candidate for pre-charging;
select a first set of limit values for driver operating parameters in response to the start signal indicating that the at least one channel in the plurality of channels is coupled to the load comprising the capacitive component candidate for pre-charging; and
select a second set of limit values for the driver operating parameters, the second set of limit values comprising limit values higher than or equal to the limit values in the first set of limit values in response to the start signal indicating that no channel in the plurality of channels is coupled to the load comprising the capacitive component candidate for pre-charging, and wherein the control module is configured to: receive the first set of limit values or the second set of limit values from the additional module based on the start signal; receive a feedback signal providing actual values for driver operating parameters out of the driver operating parameters, the actual values being related to the at least one channel in the plurality of channels coupled to the load comprising the capacitive component candidate for pre-charging; and drive the at least one channel in the plurality of channels coupled to the load comprising the capacitive component candidate for pre-charging based on the feedback signal and on the limit values in the first set of limit values or the second set of limit values, and would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claims 6-7 depend from Claim 5 and are objected due to dependency to an objected Claim.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. van Oevelen (US 2020/0271722) discloses a power converter (300, Figure 3) comprising Built-in Self-test (BIST) (302, Figure 3).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LUCY M THOMAS whose telephone number is (571)272-6002. The examiner can normally be reached Mon-Fri 9:30 am - 5:30 pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Crystal L Hammond can be reached at (571)270-1682. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/LUCY M THOMAS/Examiner, Art Unit 2838, 8/13/2026
/CRYSTAL L HAMMOND/Supervisory Primary Examiner, Art Unit 2838
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