DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claims 1-20 are objected to because of the following informalities:
In claim 1, line 2, “device;” should be -device; and-.
In claim 1, line 6, “obtain from the host device, a” should be -obtain, from the host device, a-.
In claim 8, line 7, “device;” should be -device; and-.
In claim 8, line 11, “obtain, a” should be -obtain a-.
In claim 15, line 6, “obtaining, from the host device a” should be -obtaining, from the host device, a-.
Appropriate correction is required.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1, 3-5 and 7 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1, 3-5 and 10 of U.S. Patent No. 12,147,358. Although the claims at issue are not identical, they are not patentably distinct from each other because the ‘358 patent’s claims anticipate the current claims.
Current claims 1, 3-5 and 7
Claims 1, 3-5 and 10, ‘358 patent
1. A device comprising: an interface circuit configured to communicate with a host device;
1. Device comprising: an interface circuit configured to communicate with a host device using a protocol; and
a storage element configured to store data based on a data message;
a storage element configured to store data based on a data message of the protocol;
the interface circuit further configured to: determine a command associated with the data message; and
the interface circuit further configured to: determine a command associated with the data message;
determine a message address information from the data message; and
obtain from the host device, a message stored on the host device based on information in the data message.
obtain from the host device, using the message address information, a message stored on the host device.
3. The device of claim 1, wherein the interface circuit is configured to retrieve the data message from a host memory buffer reserved for the device.
3. The device of claim 1, wherein the interface circuit is configured to obtain the message from a host memory associated with the device.
4. The device of claim 1, wherein the interface circuit is configured to, based on a successful retrieval of the message, indicate that the data message is in a first state.
4. The device of claim 1, wherein the interface circuit is configured to, based on a successful retrieval of the data message, transmit an interrupt signal to the host device.
5. The device of claim 4, wherein the interface circuit is configured to, based on a successful retrieval of the message, transmit an interrupt signal to the host device.
5. The device of claim 1, wherein the information in the data message comprises a message address information; and wherein the interface circuit is further configured to: determine the message address information from the data message.
7. The device of claim 1, wherein the interface circuit is configured to perform data message flow control using a protocol for data messages.
10. The device of claim 1, wherein the interface circuit is configured to perform data message flow control using the protocol for data messages.
Both the current claim 1 and claim 1 of the ‘358 patent disclose a device comprising: an interface circuit configured to communicate with a host device; a storage element configured to store data based on a data message; the interface circuit further configured to: determine a command associated with the data message; and obtain from the host device, a message stored on the host device based on information in the data message.
Both the current claim 5 and claim 1 of the ‘358 patent disclose wherein the information in the data message comprises a message address information; and wherein the interface circuit is further configured to: determine the message address information from the data message.
Claim 1 of the ‘358 patent further discloses communicating with a host device using a protocol; and storing data based on a data message of the protocol. The current claims 1 and 5 do not appear to comprise these limitations.
Based on this, current claims 1 and 5 are rejected on the ground of nonstatutory anticipation-type double patenting.
Both the current claim 3 and claim 3 of the ‘358 patent disclose wherein the interface circuit is configured to retrieve the data message from a host memory associated with the device.
While the current claim 3 further discloses “a host memory buffer reserved for the device,” it is respectfully submitted that such a configuration is an obvious modification of associating a host memory with the device. Therefore, current claim 3 is rejected on the ground of nonstatutory obviousness-type double patenting based on their respective antecedent claims.
Both the current claim 4 and claim 5 of the ‘358 patent disclose wherein the interface circuit is configured to, based on a successful retrieval of the data message, transmit an interrupt signal to the host device. Claim 4 of the ‘358 patent has further disclosures beyond the current claim 4, as shown above. Therefore, current claim 4 is rejected on the ground of nonstatutory anticipation-type double patenting.
Both the current claim 7 and claim 10 of the ‘358 patent disclose wherein the interface circuit is configured to perform data message flow control using a protocol for data messages. Therefore, current claim 7 is rejected on the ground of nonstatutory anticipation-type double patenting.
Claims 8, 11-12 and 14 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 11, 13-14 and 19 of U.S. Patent No. 12,147,358. Although the claims at issue are not identical, they are not patentably distinct from each other because the ‘358 patent’s claims anticipate the current claims.
Current claims 8, 11-12 and 14
Claims 11, 13-14 and 19, ‘358 patent
8. A system comprising: a host computing device comprising: a processor configured to: read and write data from a storage device, and offload commands to the storage device; and
11. A system comprising: a host computing device comprising: a processor configured to: read and write data from a storage device, and offload commands to the storage device; and
the storage device comprising: an interface circuit configured to communicate with the host computing device;
the storage device comprising: an interface circuit configured to communicate with the host computing device using a protocol; and
a storage element configured to store data based on a data message;
a storage element configured to store data based on a data message of the protocol;
the interface circuit further configured to: determine a command associated with the data message; and
the interface circuit further configured to: determine when a command is associated with the data message;
determine a message address from the data message; and
obtain, a message stored in a memory of the host computing device based on information in the data message.
obtain, using the message address, a message stored in a memory of the host computing device.
13. The system of claim 11, wherein the interface circuit is configured to, based on a successful retrieval of the message, indicate that the data message is in a first state.
11. The system of claim 8, wherein the interface circuit is configured to, based on a successful retrieval of the data message, transmit an interrupt signal to the host computing device.
14. The system of claim 13, wherein the interface circuit is configured to, based on a successful retrieval of the message, transmit an interrupt signal to the host computing device.
12. The system of claim 8, wherein the information in the data message comprises a message address information; and wherein the interface circuit is further configured to: determine the message address information from the data message.
14. The system of claim 8, wherein the interface circuit is configured to perform data message flow control using a protocol for data messages.
19. The system of claim 11, wherein the interface circuit is configured to perform data message flow control using the protocol for data messages.
Both the current claim 8 and claim 11 of the ‘358 patent disclose a system comprising: a host computing device comprising: a processor configured to: read and write data from a storage device, and offload commands to the storage device; and the storage device comprising: an interface circuit configured to communicate with the host computing device; a storage element configured to store data based on a data message; the interface circuit further configured to: determine a command associated with the data message; and obtain, a message stored in a memory of the host computing device based on information in the data message.
Both the current claim 12 and claim 11 of the ‘358 patent disclose wherein the information in the data message comprises a message address information; and wherein the interface circuit is further configured to: determine the message address information from the data message.
Claim 11 of the ‘358 patent further discloses communicating with a host device using a protocol; and storing data based on a data message of the protocol. The current claims 8 and 12 do not appear to comprise these limitations.
Based on this, current claims 8 and 12 are rejected on the ground of nonstatutory anticipation-type double patenting.
Both the current claim 11 and claim 14 of the ‘358 patent disclose wherein the interface circuit is configured to, based on a successful retrieval of the data message, transmit an interrupt signal to the host device. Claim 14 of the ‘358 patent has further disclosures beyond the current claim 11, as shown above. Therefore, current claim 11 is rejected on the ground of nonstatutory anticipation-type double patenting.
Both the current claim 14 and claim 19 of the ‘358 patent disclose wherein the interface circuit is configured to perform data message flow control using a protocol for data messages. Therefore, current claim 14 is rejected on the ground of nonstatutory anticipation-type double patenting.
Claims 15 and 19 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim 20 of U.S. Patent No. 12,147,358. Although the claims at issue are not identical, they are not patentably distinct from each other because the ‘358 patent’s claims anticipate the current claims.
Current claims 15 and 19
Claim 20, ‘358 patent
15. A method to be executed on a device, the method comprising: determining, by an interface circuit on the device, a command associated with a data message;
20. A method to be executed on a device, the method comprising: determining, by an interface circuit on the device, a command embedded within a data message;
determining, by the interface circuit, message address information from the data message; and
determining, by the interface circuit, message address information from the data message; and
obtaining, from a host device a message stored on the host device, based on information in the data message, wherein the interface circuit is configured to communicate with the host device.
retrieving, from a host device, using the message address information, a message stored on the host device, wherein the interface circuit is configured to communicate with the host device using a protocol.
19. The method of claim 15, wherein the information in the data message comprises a message address information; and wherein the interface circuit is further configured to: determine the message address information from the data message.
Both the current claim 15 and claim 20 of the ‘358 patent disclose a method to be executed on a device, the method comprising: determining, by an interface circuit on the device, a command associated with a data message; determining, by the interface circuit, message address information from the data message; and obtaining, from a host device a message stored on the host device, based on information in the data message, wherein the interface circuit is configured to communicate with the host device.
Claim 20 of the ‘358 patent further discloses wherein the interface circuit is configured to communicate with the host device using a protocol. This does not appear to be disclosed by the current claim 15.
Based on this, the current claim 15 is rejected on the ground of nonstatutory anticipation-type double patenting.
Current claim 19 and claim 20 of the ‘358 patent both disclose wherein the information in the data message comprises a message address information; and wherein the interface circuit is further configured to: determine the message address information from the data message.
Based on this, the current claim 19 is rejected on the ground of nonstatutory anticipation-type double patenting.
Claims 1-5 and 7 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-5 and 10 of U.S. Patent No. 11,030,129. Although the claims at issue are not identical, they are not patentably distinct from each other because the claims of the ‘129 patent anticipate the invention of the current claims.
Current claims 1-5 and 7
Claims 1-5 and 10, ‘129 patent
1. A device comprising: an interface circuit configured to communicate with a host device;
1. A device comprising: a host interface circuit configured to communicate with a host device via a data protocol;
a storage element configured to store data based on a data message;
a storage element configured to store data in response to a data message of the data protocol;
the interface circuit further configured to: determine a command associated with the data message; and
the host interface circuit further configured to: detect when a tunneling command is embedded within the data message, extract a tunneled message address information from the data message,
obtain from the host device, a message stored on the host device based on information in the data message.
retrieve from the host device, via the tunneled message address information, a tunneled message stored in a memory of the host device, and
route the tunneled message to an on-board processor; and the on-board processor configured to execute one or more instructions in response to the tunneled message.
2. The device of claim 1, wherein an operations code field of the data message includes a remote procedure call operations code.
2. The device of claim 1, wherein an operations code field of the data message includes a remote procedure call operations code.
3. The device of claim 1, wherein the interface circuit is configured to retrieve the data message from a host memory buffer reserved for the device.
3. The device of claim 1, wherein the host interface circuit is configured to retrieve the tunneled message from a host memory buffer reserved for the device.
4. The device of claim 1, wherein the host interface circuit is configured to, in response to a successful retrieval of the tunneled message, indicate that the data message is complete.
4. The device of claim 1, wherein the interface circuit is configured to, based on a successful retrieval of the data message, transmit an interrupt signal to the host device.
5. The device of claim 4, wherein the host interface circuit is configured to, in response to a successful retrieval of the tunneled message, transmit an interrupt signal to the host device.
5. The device of claim 1, wherein the information in the data message comprises a message address information; and wherein the interface circuit is further configured to: determine the message address information from the data message.
7. The device of claim 1, wherein the interface circuit is configured to perform data message flow control using a protocol for data messages.
10. The device of claim 1, wherein the host interface circuit is configured to perform data message flow control via the data protocol for tunneling data messages.
Both the current claim 1 and claim 1 of the ‘129 patent disclose a device comprising: an interface circuit configured to communicate with a host device; a storage element configured to store data based on a data message; the interface circuit further configured to: determine a command associated with the data message; and obtain from the host device, a message stored on the host device based on information in the data message.
The current claim 5 and claim 1 of the ‘129 patent disclose wherein the information in the data message comprises a message address information; and wherein the interface circuit is further configured to: determine the message address information from the data message.
Claim 1 of the ‘129 patent further discloses the communication being performed via a data protocol; a data message of the data protocol; detecting when a tunneling command is embedded within the data message; routing the tunneled message to an on-board processor; and the on-board processor configured to execute one or more instructions in response to the tunneled message.
These further disclosures are not disclosed in the current claim 1; therefore, the claims are not identical. Based on this, the current claims 1 and 5 are rejected on the ground of nonstatutory anticipation-type double patenting.
Both the current claim 2 and claim 2 of the ‘129 patent disclose wherein an operations code field of the data message includes a remote procedure call operations code. Based on this, claim 2 is rejected on the ground of nonstatutory anticipation-type double patenting.
Both the current claim 3 and claim 3 of the ‘129 patent disclose wherein the interface circuit is configured to retrieve the data message from a host memory buffer reserved for the device. Based on this, claim 3 is rejected on the ground of nonstatutory anticipation-type double patenting.
Both the current claim 4 and claim 5 of the ‘129 patent disclose wherein the interface circuit is configured to, based on a successful retrieval of the data message, transmit an interrupt signal to the host device. Based on this, claim 4 is rejected on the ground of nonstatutory anticipation-type double patenting.
Both the current claim 7 and claim 10 of the ‘129 patent disclose wherein the interface circuit is configured to perform data message flow control using a protocol for data messages. Based on this, claim 7 is rejected on the ground of nonstatutory anticipation-type double patenting.
Claims 8, 10-12 and 14 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 11-14 and 19 of U.S. Patent No. 11,030,129. Although the claims at issue are not identical, they are not patentably distinct from each other because the claims of the ‘129 patent anticipate the invention of the current claims.
Current claims 8, 10-12 and 14
Claims 11-14 and 19, ‘129 patent
8. A system comprising: a host computing device comprising: a processor configured to: read and write data from a storage device, and offload commands to the storage device; and
11. A system comprising: a host computing device comprising: a processor configured to: read and write data from a storage device, and offload commands to the storage device; and
the storage device comprising: an interface circuit configured to communicate with the host computing device;
the storage device comprising: a host interface circuit configured to communicate with the host computing device via a data protocol;
a storage element configured to store data based on a data message;
a storage element configured to store data in response to a data message of the data protocol;
the interface circuit further configured to: determine a command associated with the data message; and
the host interface circuit further configured to: detect when a tunneling command is embedded within the data message,
extract a tunneled message address information from the data message,
obtain, a message stored in a memory of the host computing device based on information in the data message.
retrieve, via the tunneled message address information, a tunneled message stored in a memory of the host computing device, and
route the tunneled message to an on-board processor; and the on-board processor configured to execute one or more instructions in response to the tunneled message.
10. The system of claim 8, wherein the interface circuit is configured to retrieve the data message from a host memory buffer reserved for the device.
12. The system of claim 11, wherein the memory of the host computing device includes a host memory buffer reserved for the storage device, and wherein the host interface circuit is configured to retrieve the tunneled message from the host memory buffer.
13. The system of claim 11, wherein the host interface circuit is configured to, in response to a successful retrieval of the tunneled message, indicate that the data message is complete.
11. The system of claim 8, wherein the interface circuit is configured to, based on a successful retrieval of the data message, transmit an interrupt signal to the host computing device.
14. The system of claim 13, wherein the host interface circuit is configured to, in response to a successful retrieval of the tunneled message, transmit an interrupt signal to the host computing device.
12. The system of claim 8, wherein the information in the data message comprises a message address information; and wherein the interface circuit is further configured to: determine the message address information from the data message.
14. The system of claim 8, wherein the interface circuit is configured to perform data message flow control using a protocol for data messages.
19. The system of claim 11, wherein the host interface circuit is configured to perform data message flow control via the data protocol for tunneling data messages.
Both the current claim 8 and claim 11 of the ‘129 patent disclose a system comprising: a host computing device comprising: a processor configured to: read and write data from a storage device, and offload commands to the storage device; and the storage device comprising: an interface circuit configured to communicate with the host computing device; a storage element configured to store data based on a data message; the interface circuit further configured to: determine a command associated with the data message; and obtain, a message stored in a memory of the host computing device based on information in the data message.
Both the current claim 12 and claim 11 of the ‘129 patent disclose wherein the information in the data message comprises a message address information; and wherein the interface circuit is further configured to: determine the message address information from the data message.
Claim 11 of the ‘129 patent further discloses the communication being performed via a data protocol; a data message of the data protocol; detecting when a tunneling command is embedded within the data message; routing the tunneled message to an on-board processor; and the on-board processor configured to execute one or more instructions in response to the tunneled message.
These further disclosures are not disclosed in the current claim 8; therefore, the claims are not identical. Based on this, the current claims 8 and 12 are rejected on the ground of nonstatutory anticipation-type double patenting.
Both the current claim 10 and claim 12 of the ‘129 patent disclose wherein the interface circuit is configured to retrieve the data message from a host memory buffer reserved for the device. Based on this, claim 10 is rejected on the ground of nonstatutory anticipation-type double patenting.
Both the current claim 11 and 14 of the ‘129 patent disclose wherein the interface circuit is configured to, based on a successful retrieval of the data message, transmit an interrupt signal to the host device. Based on this, claim 11 is rejected on the ground of nonstatutory anticipation-type double patenting.
Both the current claim 14 and claim 19 of the ‘129 patent disclose wherein the interface circuit is configured to perform data message flow control using a protocol for data messages. Based on this, claim 7 is rejected on the ground of nonstatutory anticipation-type double patenting.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(d):
(d) REFERENCE IN DEPENDENT FORMS.—Subject to subsection (e), a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers.
The following is a quotation of pre-AIA 35 U.S.C. 112, fourth paragraph:
Subject to the following paragraph [i.e., the fifth paragraph of pre-AIA 35 U.S.C. 112], a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers.
Claim 19 is rejected under 35 U.S.C. 112(d) or pre-AIA 35 U.S.C. 112, 4th paragraph, as being of improper dependent form for failing to further limit the subject matter of the claim upon which it depends, or for failing to include all the limitations of the claim upon which it depends.
Claim 19 discloses “wherein the information in the data message comprises a message address information; and wherein the interface circuit is further configured to: determine the message address information from the data message.” However, antecedent claim 15 discloses “determining, by the interface circuit, message address information from the data message”.
This fails to further limit the subject matter of claim 15 because claim 15 already discloses determining message address information from a data message, while claim 19 states that the information in the data message comprises message address information and the interface circuit is further configured to determine message address information from the data message.
Based on this, claim 19 fails to further limit the invention of claim 15, and is rejected under 35 U.S.C. 112(d) accordingly.
Applicant may cancel the claim(s), amend the claim(s) to place the claim(s) in proper dependent form, rewrite the claim(s) in independent form, or present a sufficient showing that the dependent claim(s) complies with the statutory requirements.
Allowable Subject Matter
Claims 1-5, 7-8, 10-12, 14-15, and 19 appear to comprise allowable subject matter, but cannot be allowed due to being rejected based on double patenting and/or 35 U.S.C. 112 issues.
Claims 6, 9, 13, 16-18, and 20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Referring to independent claim 1, the prior art of record does not appear to anticipate, explicitly teach, or fairly suggest an interface circuit configured to: obtain, from the host device, a message stored on the host device based on information in the data message.
Further, it would not have been obvious to combine the above limitations with the remaining limitations of the claim.
Bubb et al. (US 8,769,253) discloses accessing an address control word based on determining that a data transfer request was received in the proper order. However, this reference does not appear to anticipate or explicitly teach the subject matter determined to be allowable.
Lin (US 2011/0099296) discloses reading data content to be stored in a buffer unit based on a second reading address and the second reading address length for responding to second request signals. However, this reference does not appear to anticipate or explicitly teach the subject matter determined to be allowable.
Note that independent claims 8 and 15 contain the corresponding limitations of claim 1 as shown above; therefore, they are considered to contain allowable subject matter by the same reasoning accordingly.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Bubb et al. (US 8,769,253) discloses accessing an address control word based on determining that a data transfer request was received in the proper order.
Lin (US 2011/0099296) discloses reading data content to be stored in a buffer unit based on a second reading address and the second reading address length for responding to second request signals.
However, these references do not appear to anticipate or explicitly teach the subject matter determined to be allowable.
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOHN B ROCHE whose telephone number is (571)270-1721. The examiner can normally be reached Monday-Friday, 10:30 - 7.
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/J.B.R/Examiner, Art Unit 2184
/HENRY TSAI/Supervisory Patent Examiner, Art Unit 2184