DETAILED ACTION
This FINAL action is in response to Application No. 18/571,713 originally filed 11/19/2024. The amendment presented on 06/30/2026 which provides amendments to claims 6 and 20 and claims 2, 5, 10, and 19 is hereby acknowledged.
Currently Claim(s) 1, 3-4, 6-9, 11-18, and 20-22 are pending.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's arguments filed 06/30/2026 have been fully considered but they are not persuasive.
Applicant asserts (emphasis added) “Park does not disclose or teach anything about whether or how the data driver 130 would control the 15 operations of the charge sharing unit 40 based on the control signal provided by the timing controller 150.” and “does not disclose or teach whether or how the data driver 130 would control charge sharing unit 40 based on the control signal.” however The Office respectfully disagrees.
The following cited portions are considered most relevant:
[0052] The timing controller determines whether a difference in gray scale (i.e., a data voltage level) between previous data and current data is present per channel. In this case, when the difference in gray scale is present, the timing controller turns on a switching mode of the outputter OP for precharging, and when the difference in gray scale is not present, the timing controller turns off the switching mode of the outputter OP.
[0056] In addition, the timing controller analyzes data and drives the output buffer BF of a corresponding channel in a precharge mode using a precharge voltage (a 31 gray scale) through a control signal when the current data has different polarity or level from previous data and a gray scale of the current data is smaller than a predetermined referenced value (e.g., a 203 gray scale). In this case, a 31 gray scale voltage may be supplied to the outputter OP through the first control switch SW_ENB from an input amplifier 22 in a disable period (i.e., a charge sharing period) of the first source output enable signal SOE1. Then in the precharge period PC, the output buffer BF of the corresponding channel drives the first output transistor MP1 in a switching mode by the turned-on second control switch SWP1 or drives the second output transistor MN1 in a switching mode by the turned-on third control switch SWN1.
The Office notes that the “outputter OP” circuit is controlled by the “mode controller 28”. In the cited paragraphs, Park is expressly clear that the timing controller 130 analyzes data and drives the output buffer BF (seen in Fig. 4). A gray scale voltage is supplied to the “outputter” circuit during the charge sharing period. The mode controller 28 selectively controls the first to third control switches SW_ENB, SWP1, and SWN1 of the control switch unit 26 using a control signal input per data channel from a timing controller. In response to a control signal supplied per channel from the timing controller, the mode controller 28 controls the control switch unit 26. The mode controller 28 selectively controls the first to third control switches SW_ENB, SWP1, and SWN1 of the control switch unit 26 using a control signal input per data channel from a timing controller. An example can be seen in Table 1 following paragraph [0053]. Park makes it clear in the cited portions, and further related paragraphs [0040-0060] “how the data driver 130 would control the 15 operations of the charge sharing unit 40 based on the control signal provided by the timing controller 150”. Upon review, these arguments are not found persuasive.
Applicant further asserts “Park indeed does not teach to use the "voltage level difference between the previous data 5 and current data" to determine whether to perform a charge sharing operation.” however The Office respectfully disagrees. Again, in the noted paragraphs [0052], Park expressly states in [0052] that the timing controller, in response to a difference determination in the grayscale, controls the outputter OP for precharging. The Office considers this an express teaching of the claimed subject matter. Upon review, these arguments are not found persuasive.
Remaining arguments on pgs 15-16 are continuation of the assertion Park “does not disclose or teach whether or how the data driver 130 would control charge sharing unit 40”. As seen above, these arguments are not found persuasive and the rejection will be maintained. The Office notes that Applicants claimed invention, as provided by the independent claims, is still broad enough to read on the prior art of record and will be currently maintained. The Office further notes that claims 13-18 will continue to be objected herein. To more quickly advance prosecution, The Office suggests incorporating one or more of these claims into the independent claims.
Claim Rejections - 35 USC § 102
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claim(s) 1, 3-4, 6-9, 11-12, and 20-22 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Park et al. U.S. Patent Application Publication No. 2015/0002503 A1 hereinafter Park.
Consider Claim 1:
Park discloses a control method for reducing operating temperature of a driving device, the driving device comprising (Park, See Abstract.)
a plurality of channel driving circuits, the control method comprising: (Park, [0073], “The data driver 130 may include at least one data IC, may be mounted on a circuit film such as a tape carrier package (TCP), a chip on film (COF), a flexible printed circuit (FPC), or the like, and may be attached to the liquid crystal panel 100 using a tape automatic bonding (TAB) method or may be mounted on the liquid crystal panel 100 using a chip on glass (COG) method.”)
enabling an over-temperature sensing function to determine whether to perform a temperature reducing operation; (Park, [0052], [0037], “In FIG. 1, a power switch PS selectively connects the first high level voltage VDD or the second high level voltage FVDD higher than the first high level voltage VDD to the outputter OP of the positive output buffer PBF in response to a mode control signal of a corresponding channel.”)
detecting whether display frame data to be displayed includes a heavy load pattern; determining to perform the temperature reducing operation in response to determining that the display frame data to be displayed includes the heavy load pattern; and (Park, [0059], [0067] “The timing controller 150 analyzes data to be supplied to a plurality of channels (data lines) through the data driver 130 per channel, generates a control signal indicating whether a difference in data level is present per channel or indicating whether a data level has a specific gray scale or more as well as whether a difference in data level is present per channel, and outputs the control signal to the data driver 130.”)
for each line period, determining that the plurality of channel driving circuits perform a charge sharing operation for temperature reducing during an activation period of a trigger signal within the line period based on determining that a gray level of channel data of a channel in the line period is smaller than a gray level of channel data of the channel in a previous line period before the line period in response to determining to perform the temperature reducing operation. (Park, [0056], [0052], “The timing controller determines whether a difference in gray scale (i.e., a data voltage level) between previous data and current data is present per channel. In this case, when the difference in gray scale is present, the timing controller turns on a switching mode of the outputter OP for precharging, and when the difference in gray scale is not present, the timing controller turns off the switching mode of the outputter OP.”)
Consider Claim 3:
Park discloses the control method of claim 1, further comprising: determining that the plurality of channel driving circuits perform an overdriving operation to a power supply voltage or a ground voltage for temperature reducing during the activation period of the trigger signal within the line period based on determining that the gray level of channel data of the channel in the line period is greater than the gray level of channel data of the channel in the previous line period. (Park, [0035], [0054], “For example, the timing controller analyzes data, and drives the output buffer BF of a corresponding channel in a precharge mode using overshooting or undershooting through a mode control signal when the data has different polarity from previous data and a gray scale of the current data is greater than a predetermined referenced value (e.g., 203 gray scale). Thus, in the precharge period PC of each horizontal line, the positive output buffer PBF of a corresponding channel drives the first output transistor MP1 in a switching mode by the turned-on second control switch SWP1, and the negative output buffer NBF of the corresponding channel drives the second output transistor MN1 in a switching mode by the turned-on third control switch SWN1. In this case, the second high level voltage FVDD as the first voltage V1 is supplied to the positive output buffer PBF.”)
Consider Claim 4:
Park discloses the control method of claim 3, further comprising: outputting, by a channel driving circuit with a positive polarity of the driving device, a first voltage during the activation period of the trigger signal within the line period for implementing the overdriving operation, wherein the first voltage is the power supply voltage; and outputting, by a channel driving circuit with a negative polarity of the driving device, a second voltage during the activation period of the trigger signal within the line period for implementing the overdriving operation, wherein the second voltage is the ground voltage. (Park, [0035], [0054], “For example, the timing controller analyzes data, and drives the output buffer BF of a corresponding channel in a precharge mode using overshooting or undershooting through a mode control signal when the data has different polarity from previous data and a gray scale of the current data is greater than a predetermined referenced value (e.g., 203 gray scale). Thus, in the precharge period PC of each horizontal line, the positive output buffer PBF of a corresponding channel drives the first output transistor MP1 in a switching mode by the turned-on second control switch SWP1, and the negative output buffer NBF of the corresponding channel drives the second output transistor MN1 in a switching mode by the turned-on third control switch SWN1. In this case, the second high level voltage FVDD as the first voltage V1 is supplied to the positive output buffer PBF.”)
Consider Claim 6:
Park discloses the control method of claim 1, further comprising: for each line period, determining that the plurality of channel driving circuits perform an overdriving operation to a half power supply voltage for temperature reducing during an activation period of a trigger signal within the line period based on determining that the gray level of channel data of the channel in the line period is smaller than the gray level of channel data of the channel in the previous line period in response to determining to perform the temperature reducing operation. (Park, [0067], [0046], “The outputter OP includes a first output transistor MP1 for forming a charging path for an output line and a second output transistor MN1 for forming a discharging path, which are connected in series between the first and second voltages V1 and V2. When the output buffer BF is the positive output buffer PBF, one of the first and second high level voltages VDD and FVDD is supplied as the first voltage V1 and the middle level voltage HVDD is supplied as the second voltage V2. When the output buffer BF is the negative output buffer NBF, the middle level voltage HVDD is supplied as the first voltage V1, and the low level voltage VSS is supplied as the second voltage V2.”)
Consider Claim 7:
Park discloses the control method of claim 1, further comprising: determining that the plurality of channel driving circuits perform an overdriving operation to a power supply voltage or a ground voltage during the activation period of the trigger signal within the line period based on determining that the gray level of channel data of the channel in the line period is greater than the gray level of channel data of the channel in the previous line period, and an absolute difference of the gray level of channel data of the channel in the line period and the gray level of channel data of the channel in the previous line period is greater than a first threshold. (Park, [0035], [0054], “For example, the timing controller analyzes data, and drives the output buffer BF of a corresponding channel in a precharge mode using overshooting or undershooting through a mode control signal when the data has different polarity from previous data and a gray scale of the current data is greater than a predetermined referenced value (e.g., 203 gray scale). Thus, in the precharge period PC of each horizontal line, the positive output buffer PBF of a corresponding channel drives the first output transistor MP1 in a switching mode by the turned-on second control switch SWP1, and the negative output buffer NBF of the corresponding channel drives the second output transistor MN1 in a switching mode by the turned-on third control switch SWN1. In this case, the second high level voltage FVDD as the first voltage V1 is supplied to the positive output buffer PBF.”)
Consider Claim 8:
Park discloses the control method of claim 1, further comprising: determining that the plurality of channel driving circuits perform the charge sharing operation or an overdriving operation to a half power supply voltage during the activation period of the trigger signal within the line period based on determining that the gray level of channel data of the channel in the line period is smaller than the gray level of channel data of the channel in the previous line period, and an absolute difference of the gray level of channel data of the channel in the line period and the gray level of channel data of the channel in the previous line period is greater than a second threshold. (Park, [0060], “In addition, the data driver according to the present invention precharges an outputter of an output buffer via overshooting/undershooting using a high level voltage FVDD/low level voltage VSS with respect to a channel to which a specific gray level data or more is supplied and precharges the outputter of the output buffer using an optimal gray scale voltage with respect to a channel to which data less than a specific gray level data is supplied, in response to a control signal from a timing controller, indicating whether a data level has a specific gray scale or more as well as whether a difference in data level is present per channel, so as to reduce a data charging and discharging period of the outputter, thereby reducing charging and discharging current.”)
Consider Claim 9:
Park discloses a driving device comprising: (Park, See Abstract.)
a plurality of channel driving circuits; and (Park, [0073], “The data driver 130 may include at least one data IC, may be mounted on a circuit film such as a tape carrier package (TCP), a chip on film (COF), a flexible printed circuit (FPC), or the like, and may be attached to the liquid crystal panel 100 using a tape automatic bonding (TAB) method or may be mounted on the liquid crystal panel 100 using a chip on glass (COG) method.”)
a processing circuit, configured to enable an over-temperature sensing function sand determine whether to perform a temperature reducing operation; (Park, [0052], [0037], “In FIG. 1, a power switch PS selectively connects the first high level voltage VDD or the second high level voltage FVDD higher than the first high level voltage VDD to the outputter OP of the positive output buffer PBF in response to a mode control signal of a corresponding channel.”)
wherein the processing circuit is configured to detect whether display frame data to be displayed includes a heavy load pattern and determine to perform the temperature reducing operation in response to determining that the display frame data to be displayed includes the heavy load pattern; (Park, [0042], [0052], “The timing controller determines whether a difference in gray scale (i.e., a data voltage level) between previous data and current data is present per channel. In this case, when the difference in gray scale is present, the timing controller turns on a switching mode of the outputter OP for precharging, and when the difference in gray scale is not present, the timing controller turns off the switching mode of the outputter OP.”)
wherein for each line period, the processing circuit is further configured to determine that the plurality of channel driving circuits perform a charge sharing operation for temperature reducing during an activation period of a trigger signal within the line period based on determining that a gray level of channel data of a channel in the line period is smaller than a gray level of channel data of the channel in a previous line period before the line period in response to determining to perform the temperature reducing operation. (Park, [0035], [0054], [0052], “The timing controller determines whether a difference in gray scale (i.e., a data voltage level) between previous data and current data is present per channel. In this case, when the difference in gray scale is present, the timing controller turns on a switching mode of the outputter OP for precharging, and when the difference in gray scale is not present, the timing controller turns off the switching mode of the outputter OP.”)
Consider Claim 11:
Park discloses the driving device of claim 9, wherein the processing circuit is configured to determine that the plurality of channel driving circuits perform an overdriving operation to a power supply voltage or a ground voltage during the activation period of the trigger signal within the line period based on determining that the gray level of channel data of the channel in the line period is greater than the gray level of channel data of the channel in the previous line period. (Park, [0035], [0054], “For example, the timing controller analyzes data, and drives the output buffer BF of a corresponding channel in a precharge mode using overshooting or undershooting through a mode control signal when the data has different polarity from previous data and a gray scale of the current data is greater than a predetermined referenced value (e.g., 203 gray scale). Thus, in the precharge period PC of each horizontal line, the positive output buffer PBF of a corresponding channel drives the first output transistor MP1 in a switching mode by the turned-on second control switch SWP1, and the negative output buffer NBF of the corresponding channel drives the second output transistor MN1 in a switching mode by the turned-on third control switch SWN1. In this case, the second high level voltage FVDD as the first voltage V1 is supplied to the positive output buffer PBF.”)
Consider Claim 12:
Park discloses the driving device of claim 11, wherein the channel driving circuit is configured to output a first voltage during the activation period of the trigger signal within the line period for implementing the overdriving operation when the channel driving circuit is a channel driving circuit with a positive polarity, wherein the first voltage is the power supply voltage, and the channel driving circuit is configured to output a second voltage during the activation period of the trigger signal within the line period for implementing the overdriving operation when the channel driving circuit is a channel driving circuit with a negative polarity, wherein the second voltage is the ground voltage. (Park, [0056], “In addition, the timing controller analyzes data and drives the output buffer BF of a corresponding channel in a precharge mode using a precharge voltage (a 31 gray scale) through a control signal when the current data has different polarity or level from previous data and a gray scale of the current data is smaller than a predetermined referenced value (e.g., a 203 gray scale). In this case, a 31 gray scale voltage may be supplied to the outputter OP through the first control switch SW_ENB from an input amplifier 22 in a disable period (i.e., a charge sharing period) of the first source output enable signal SOE1. Then in the precharge period PC, the output buffer BF of the corresponding channel drives the first output transistor MP1 in a switching mode by the turned-on second control switch SWP1 or drives the second output transistor MN1 in a switching mode by the turned-on third control switch SWN1.”)
Consider Claim 20:
Park discloses the control method of claim 9, further comprising: wherein for each line period, the processing circuit is configured to determine that the plurality of channel driving circuits perform an overdriving operation to a half power supply voltage for temperature reducing during an activation period of a trigger signal within the line period based on determining that the gray level of channel data of the channel in the line period is smaller than the gray level of channel data of the channel in the previous line period in response to determining to perform the temperature reducing operation. (Park, [0046], “The outputter OP includes a first output transistor MP1 for forming a charging path for an output line and a second output transistor MN1 for forming a discharging path, which are connected in series between the first and second voltages V1 and V2. When the output buffer BF is the positive output buffer PBF, one of the first and second high level voltages VDD and FVDD is supplied as the first voltage V1 and the middle level voltage HVDD is supplied as the second voltage V2. When the output buffer BF is the negative output buffer NBF, the middle level voltage HVDD is supplied as the first voltage V1, and the low level voltage VSS is supplied as the second voltage V2.”)
Consider Claim 21:
Park discloses the driving device of claim 9, wherein the processing circuit is configured to determine that the plurality of channel driving circuits perform an overdriving operation to a power supply voltage or a ground voltage during the activation period of the trigger signal within the line period based on determining that the gray level of channel data of the channel in the line period is greater than the gray level of channel data of the channel in the previous line period, and an absolute difference of the gray level of channel data of the channel in the line period and the gray level of channel data of the channel in the previous line period is greater than a first threshold. (Park, [0035], [0054], “For example, the timing controller analyzes data, and drives the output buffer BF of a corresponding channel in a precharge mode using overshooting or undershooting through a mode control signal when the data has different polarity from previous data and a gray scale of the current data is greater than a predetermined referenced value (e.g., 203 gray scale). Thus, in the precharge period PC of each horizontal line, the positive output buffer PBF of a corresponding channel drives the first output transistor MP1 in a switching mode by the turned-on second control switch SWP1, and the negative output buffer NBF of the corresponding channel drives the second output transistor MN1 in a switching mode by the turned-on third control switch SWN1. In this case, the second high level voltage FVDD as the first voltage V1 is supplied to the positive output buffer PBF.”)
Consider Claim 22:
Park discloses the driving device of claim 9, wherein the processing circuit is configured to determine that the plurality of channel driving circuits perform the charge sharing operation or an overdriving operation to a half power supply voltage during the activation period of the trigger signal within the line period based on determining that the gray level of channel data of the channel in the line period is smaller than the gray level of channel data of the channel in the previous line period, and an absolute difference of the gray level of channel data of the channel in the line period and the gray level of channel data of the channel in the previous line period is greater than a second threshold. (Park, [0072], [0060], “In addition, the data driver according to the present invention precharges an outputter of an output buffer via overshooting/undershooting using a high level voltage FVDD/low level voltage VSS with respect to a channel to which a specific gray level data or more is supplied and precharges the outputter of the output buffer using an optimal gray scale voltage with respect to a channel to which data less than a specific gray level data is supplied, in response to a control signal from a timing controller, indicating whether a data level has a specific gray scale or more as well as whether a difference in data level is present per channel, so as to reduce a data charging and discharging period of the outputter, thereby reducing charging and discharging current.”)
Allowable Subject Matter
Claim 13-18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Prior art made of record and not relied upon which is still considered pertinent to applicant's disclosure is cited in a current or previous PTO-892. The prior art cited in a current or previous PTO-892 reads upon the applicants claims in part, in whole and/or gives a general reference to the knowledge and skill of persons having ordinary skill in the art before the effective filing date of the invention. Applicant, when responding to this Office action, should consider not only the cited references applied in the rejection but also any additional references made of record.
In the response to this office action, the Examiner respectfully requests support be shown for any new or amended claims. More precisely, indicate support for any newly added language or amendments by specifying page, line numbers, and/or figure(s). This will assist The Office in compact prosecution of this application. The Office has cited particular columns, paragraphs, and/or line numbers in the applied rejection of the claims above for the convenience of the applicant. Citations are representative of the teachings in the art and are applied to the specific limitations within each claim, however other passages and figures may apply. Applicant, in preparing a response, should fully consider the cited reference(s) in its entirety and not only the cited portions as other sections of the reference may expand on the teachings of the cited portion(s).
Applicant Representatives are reminded of CFR 1.4(d)(2)(ii) which states “A patent practitioner (§ 1.32(a)(1) ), signing pursuant to §§ 1.33(b)(1) or 1.33(b)(2), must supply his/her registration number either as part of the S-signature, or immediately below or adjacent to the S-signature. The number (#) character may be used only as part of the S-signature when appearing before a practitioner’s registration number; otherwise the number character may not be used in an S-signature.” When an unsigned or improperly signed amendment is received the amendment will be listed in the contents of the application file, but not entered. The examiner will notify applicant of the status of the application, advising him or her to furnish a duplicate amendment properly signed or to ratify the amendment already filed. In an application not under final rejection, applicant should be given a two month time period in which to ratify the previously filed amendment (37 CFR 1.135(c) ).
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Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL J JANSEN II whose telephone number is (571)272-5604. The examiner can normally be reached Normally Available Monday-Friday 9am-4pm EST.
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/Michael J Jansen II/ Primary Examiner, Art Unit 2626
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