Prosecution Insights
Last updated: August 17, 2026
Application No. 18/951,806

Transferable Nanostructure Fabrication by Gapless Stencil Lithography

Non-Final OA §102§103§112
Filed
Nov 19, 2024
Priority
Jan 19, 2024 — provisional 63/622,619
Examiner
ZIMMERMAN, JOSHUA D
Art Unit
2853
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Massachusetts Institute of Technology
OA Round
1 (Non-Final)
41%
Grant Probability
Moderate
1-2
OA Rounds
1y 6m
Est. Remaining
56%
With Interview

Examiner Intelligence

Grants 41% of resolved cases
41%
Career Allowance Rate
314 granted / 772 resolved
-27.3% vs TC avg
Strong +16% interview lift
Without
With
+15.5%
Interview Lift
resolved cases with interview
Typical timeline
3y 3m
Avg Prosecution
27 currently pending
Career history
810
Total Applications
across all art units

Statute-Specific Performance

§101
0.8%
-39.2% vs TC avg
§103
55.7%
+15.7% vs TC avg
§102
20.7%
-19.3% vs TC avg
§112
15.9%
-24.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 772 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election of Species X (Figure 1a) in the reply filed on 04/27/2026 is acknowledged. Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.01(a)). Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 2-5 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Regarding claim 2, claim 1 requires forming a stencil and then placing the already formed stencil in direct contact with a surface of a substrate. However, claim 2 recites that the step of forming the stencil comprises disposing a membrane in direct contact with the surface of the substrate, then patterning the membrane. This is contradictory to the parent claim, as it is unclear how the step of “placing the stencil in direct contact with a surface of the substrate” can be carried out if the stencil is already in direct contact, as is required by claim 2. Since it cannot be ascertained what applicant is intending to claim, prior art cannot be applied. Claims 3-5 are rejected based upon their dependency. Appropriate correction and/or clarification is required. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1, 9-13, 15 and 17-20 is/are rejected under 35 U.S.C. 102a1 as being anticipated by Jackman et al. (US 2008/0063851). Regarding claim 1, Jackman et al. teach “a method of fabricating nanostructures (paragraphs 53, 55, 78, and 97), on a substrate, the method comprising: forming a stencil for the nanostructures (paragraph 54); placing the stencil in direct contact with a surface of the substrate (paragraph 59); depositing material through the stencil directly on the surface of the substrate to form the nanostructures on the surface of the substrate (paragraph 59); and removing the stencil from the substrate without removing the nanostructures from the surface of the substrate (paragraph 59). Regarding claim 9, Jackson et al. further teach “wherein the substrate is a first substrate, and further comprising: placing the stencil directly on a surface of a second substrate (paragraph 52); depositing material through the stencil directly on the surface of the second substrate to form nanostructures on the surface of the second substrate (paragraph 52); and removing the stencil from the second substrate without removing the nanostructures from the surface of the second substrate (paragraphs 52 and/or 59: ‘reused’).” Regarding claim 10, Jackson et al. further teach “wherein the stencil is a first stencil, and further comprising: disposing a second stencil directly on the first stencil (paragraph 60).” Regarding claim 11, Jackson et al. further teach “wherein disposing the second stencil directly on the first stencil comprises rotating the second stencil with respect to the first stencil about an axis perpendicular to the surface of the substrate and/or translating the second stencil with respect to the first stencil in a direction parallel to the surface of the substrate (paragraphs 60, 61).” Regarding claim 12, Jackson et al. teach “a method of fabricating nanostructures on a sample (paragraphs 53, 55, 78, and 97), the method comprising: forming a stencil for the nanostructures on a sacrificial substrate (paragraph 54); removing the stencil from the sacrificial substrate (paragraph 54); placing the stencil in direct contact with a surface of the sample (paragraph 59); depositing material through the stencil directly on the surface of the sample to form the nanostructures (paragraph 59); and removing the stencil from the sample (paragraph 59).” Regarding claim 13, Jackson et al. further teach “wherein forming the stencil comprises patterning holes for the nanostructures in a membrane (paragraph 54).” Regarding claim 15, Jackson et al. further teach “wherein the membrane has a thickness of about 30 nm to about 500 nm (paragraph 55).” Regarding claim 17, Jackson et al. further teach “further comprising: forming additional nanostructures with the stencil on another substrate (paragraph 59: reused).” Regarding claim 18, Jackson et al. further teach “wherein the stencil is a first stencil, and further comprising: disposing a second stencil directly on the first stencil (paragraph 60).” Regarding claim 19, Jackson et al. further teach “wherein depositing the material through the first stencil comprises depositing the material through second stencil (paragraph 60).” Regarding claim 20, Jackson et al. further teach “wherein disposing the second stencil directly on the first stencil comprises rotating the second stencil with respect to the first stencil about an axis perpendicular to the surface of the sample and/or translating the second stencil with respect to the first stencil in a direction parallel to the surface of the sample (paragraphs 60 and 61).” Claim(s) 1, 9, 13-15 is/are rejected under 35 U.S.C. 102a1 as being anticipated by Breese et al. (US 2015/0293450). Regarding claim 1, Breese et al. teach “a method of fabricating nanostructures (paragraphs 2-5), on a substrate, the method comprising: forming a stencil for the nanostructures (paragraph 4); placing the stencil in direct contact with a surface of the substrate (paragraph 2); depositing material through the stencil directly on the surface of the substrate to form the nanostructures on the surface of the substrate (paragraph 2); and removing the stencil from the substrate without removing the nanostructures from the surface of the substrate (paragraph 3: reusable many times, therefore it must be removed).” Regarding claim 9, Breese et al. further teach “wherein the substrate is a first substrate, and further comprising: placing the stencil directly on a surface of a second substrate (paragraph 3: reusable many times); depositing material through the stencil directly on the surface of the second substrate to form nanostructures on the surface of the second substrate (paragraph 3: ‘reusable many times’); and removing the stencil from the second substrate without removing the nanostructures from the surface of the second substrate (paragraph 3: ‘reusable many times’).” Regarding claim 12, Breese et al. teach “a method of fabricating nanostructures on a sample (paragraphs 2-5), the method comprising: forming a stencil for the nanostructures on a sacrificial substrate (paragraph 4: support); removing the stencil from the sacrificial substrate (paragraph 4); placing the stencil in direct contact with a surface of the sample (paragraph 2); depositing material through the stencil directly on the surface of the sample to form the nanostructures (paragraph 2); and removing the stencil from the sample (paragraph 3: reusable many times, therefore it must be removed).” Regarding claim 13, Breese et al. further teach “wherein forming the stencil comprises patterning holes for the nanostructures in a membrane (paragraph 4).” Regarding claim 14, Breese et al. further teach “wherein the membrane comprises silicon nitride (paragraph 4).” Regarding claim 15, Breese et al. further teach “wherein the membrane has a thickness of about 30 nm to about 500 nm (paragraph 5).” Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim(s) 6-8 and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Breese et al. Regarding claims 7 and 8, Breese et al. teach all that is claimed, as in claim 1 above, except “wherein the substrate is a first substrate, and further comprising: transferring the nanostructures from the surface of the first substrate to a surface of a second substrate.” However, Examiner takes Official Notice that, at the time of filing of the invention, it was known to use a transfer printing technique in order to form a device or a 3-dimensional pattern on a surface. Therefore, at the time of the filing of the invention, it would have been obvious to one having ordinary skill in the art to transfer the pattern of nanostructures from the first substrate to another substrate in order to form a device or a 3-dimensional pattern on a surface of an object, including dielectric layers. Regarding claim 8, Breese et al. further disclose “wherein the first substrate comprises at least one of silicon or silicon oxide (paragraph 15)” and Examiner interprets the dielectric layer to be “an air-sensitive material” in the sense that oxygen in the air could cause oxidation of the dielectric layers. Regarding claims 6 and 16, Breese et al. disclose all that is claimed, as in claims 1 and 12 above, except “lifting the stencil off the sacrificial substrate with a piece of adhesive tape,” leaving the choice up to one having ordinary skill in the art as to how the reusable stencil is removed from the substrate. However, Examiner takes Official Notice that, at the time of the filing of the invention, a reusable adhesive tape was a known method to pick and place objects. Therefore, at the time of the filing of the invention, it would have been obvious to one having ordinary skill in the art to use a reusable adhesive tape to pick and place the stencil because it is known in the art to be suitable for the intended purpose. See MPEP §2144.07. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOSHUA D ZIMMERMAN whose telephone number is (571)272-2749. The examiner can normally be reached Monday-Thursday, 9:30AM-6:30PM, First Fridays: 9:30AM-5:30PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Stephen Meier can be reached at (571) 272-2149. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JOSHUA D ZIMMERMAN/ Primary Examiner, Art Unit 2853
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Prosecution Timeline

Nov 19, 2024
Application Filed
Jul 20, 2026
Non-Final Rejection mailed — §102, §103, §112
Aug 11, 2026
Examiner Interview Summary
Aug 11, 2026
Applicant Interview (Telephonic)

Precedent Cases

Applications granted by this same examiner with similar technology

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METHOD FOR SMOOTHER TONAL RESPONSE IN FLEXOGRAPHIC PRINTING
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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
41%
Grant Probability
56%
With Interview (+15.5%)
3y 3m (~1y 6m remaining)
Median Time to Grant
Low
PTA Risk
Based on 772 resolved cases by this examiner. Grant probability derived from career allowance rate.

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