DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Election/Restrictions
Applicant’s arguments regarding the requirement for restriction/election have been fully considered.
Applicant indicates Invention I, claims 1-7 is selected with traverse. The Applicant argues that there would not be a serious search and/or examination burden. And any prior art relevant to the method would be equally relevant to the apparatus and system claim. The examiner respectfully disagrees, as indicated in the requirement for Restriction/Election, each group of claims, especially each independent claim recites distinct features which requires additional search strategies, and search syntax and strings. Furthermore, each group of claims is classified with different classes/subclasses, therefore there are more search strings in combined with each of the classes/subclasses are required. These are serious search and office action preparation burden that impose on the examiner. Applicant’s arguments are unpersuasive, therefore, claims 1-7 are examined.
Response to Amendment
Claim 3 is amended.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 1 is rejected under 35 U.S.C. 103 as being unpatentable over Craddock et al. (US 2002/0198927), hereinafter Craddock in view of Rowley et al. (US 2021/0165751), hereinafter Rowley.
As for claim 1, Craddock teaches a method, comprising:
receiving, by a memory device interface, a signal that includes a header (paragraphs [0136]- [0140] describe a host channel adapter (HCA) (see Fig. 1, 118-124 – paragraph [0043]- [0044]) receives Raw Datagram (RawD) or Unreliable Datagram (UD) and sends the RawD or UD as a single message to a router. The router receives the data packet and parses the data packet’s routing header);
decoding, by the memory device interface, the header to determine an instruction (paragraph [0140] describes the router parses the data packet’s routing header and determines which output port to send the packet out of by looking at the packet’s IB Global Router Header’s Destination Global ID or IPv6 Destination Address);
selecting, by the memory device interface, a first communication associated with a first memory resource based on the instruction (paragraphs [0140]-[0141] describe the router modifies the header information of the data packet as appropriate. After the header is managed based on the type of data, the router then sends the packet from the router output port to either the HCA or the external network);
sending, by the memory device interface, the header to a second communication associated with a second memory resource (paragraph [0146] describes the router separates incoming packet headers from the data and sends them to the host channel adapter in two separate operations. The first operation is used to send the header to either the HCA or the external network); and
sending, by the memory device interface, subsequent packets of the header to the first channel (paragraph [0146] describes the second operation is used to send the data, each operation can target the same or a different host channel adapter receive queue).
Craddock fails to teach wherein a first and second communication is a first and second channel.
Rowley discloses
wherein a first and second communication is a first and second channel (paragraphs [0021]-[0022] describe a controller communicates with respective ones of interface components respectively over respective ones of channels).
One of ordinary skill in the art before the effective filing date of the claimed invention would have recognized the ability to utilize the teachings of Rowley for utilizing multiple channels per interface component. The teachings of Rowley, when implemented in the Craddock system, will allow one of ordinary skill in the art to route data to its destination. One of ordinary skill in the art would be motivated to utilize the teachings of Rowley in the Craddock system in order to increase the storage capacity of a storage system without increasing the number of channels per a controller (Rowley: paragraph [0023]).
Claims 2-3 are rejected under 35 U.S.C. 103 as being unpatentable over Craddock (US 2002/0198927) in view of Rowley (US 2021/0165751) further in view of Irizarry et al. (US 11,228,525), hereinafter Irizarry.
As for claim 2, the combined system of Craddock and Rowley fails to teach wherein a second channel is a previously selected channel by a memory device interface.
Irizarry discloses
wherein a second channel is a previously selected channel by a memory device interface (col. 9, lines 23-33 describe a controller receives a route connection data and actively configures a designated network path among a plurality of different available network paths based on the route connection data. Accordingly, data is exchanged between the host computing system and a destination communication device using the designated network path).
One of ordinary skill in the art before the effective filing date of the claimed invention would have recognized the ability to utilize the teachings of Irizarry for using a designated network path. The teachings of Irizarry, when implemented in the Craddock and Rowley system, will allow one of ordinary skill in the art to route data to its destination. One of ordinary skill in the art would be motivated to utilize the teachings of Irizarry in the Craddock and Rowley system in order to route data via a designated network path.
As for claim 3, the combined system of Craddock and Rowley fails to teach wherein a second channel was a selected channel of a memory device interface upon receiving a signal from a host.
Irizarry discloses
wherein a second channel was a selected channel of a memory device interface upon receiving a signal from the host (col. 9, lines 9-33 describe a MCR route controller receives a route connection data including routing schemes, routing tables, node hopping schedules for routing data through the data communications network. The MCR route controller receives the route connection data and actively configures a designated network path among the plurality of different available network paths based on the route connection data).
One of ordinary skill in the art before the effective filing date of the claimed invention would have recognized the ability to utilize the teachings of Irizarry for using a designated network path. The teachings of Irizarry, when implemented in the Craddock and Rowley system, will allow one of ordinary skill in the art to route data to its destination. One of ordinary skill in the art would be motivated to utilize the teachings of Irizarry in the Craddock and Rowley system in order to route data via a designated network path.
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Craddock (US 2002/0198927) in view of Rowley (US 2021/0165751) further in view of
Peled et al. (US 2020/0244780), hereinafter Peled.
As for claim 6, the combined system of Craddock and Rowley fails to teach ignoring, by a second memory resource, a header upon receiving the header from a second channel.
Peled discloses
ignoring, by a second memory resource, a header upon receiving the header from a second channel (paragraph [0103] describes a programmable header alteration processor receives a packet including a packet header. The programmable header alteration processor determines whether the packet header is to be provided to a processing path or to be diverted to a bypass path that bypasses the programmable header alteration processor and provides the packet header to the bypass path based on the determination. The programmable heard alteration processor does not process the packet header when the packet header is provided to the bypass path) (paragraph [0061] describes a base station receives a Route Creation Header from a device. The base station ignores the header based on status information of a Route Creation Protocol).
One of ordinary skill in the art before the effective filing date of the claimed invention would have recognized the ability to utilize the teachings of Peled for sending a packet header to a bypass path. The teachings of Peled, when implemented in the Craddock and Rowley system, will allow one of ordinary skill in the art to route data to its destination. One of ordinary skill in the art would be motivated to utilize the teachings of Peled in the Craddock and Rowley system in order to determine that packet header that does not need processing can skip the programmable path entirely.
Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Craddock (US 2002/0198927) in view of Rowley (US 2021/0165751) further in view of
Park (US 2016/0183187)
As for claim 7, the combined system of Craddock and Rowley fails to teach maintaining, by a second memory resource, a low power mode upon receiving a header from a second channel.
Park discloses
maintaining, by a second memory resource, a low power mode upon receiving a header from a second channel (paragraphs [0023] and [0041]-[0042] describe a computing device transmits a wake-up packet to second computing device. Upon receiving the wake-up packet, the low power wake-up receiver of the second computing device detects or decodes the wake-up packet. If the second computing device determines that the wake-up packet is not corrupted dues to interference, the second computing device determines the address field in the MAC header of the wake-up packet matches its own address, then the low-power wake-up receiver sends a signal to a wireless radio system to power on its circuitry containing one or more hardware components).
One of ordinary skill in the art before the effective filing date of the claimed invention would have recognized the ability to utilize the teachings of Park for receiving a packet header while in low power mode. The teachings of Park, when implemented in the Craddock and Rowley system, will allow one of ordinary skill in the art to maximize battery life of devices that are constrained by their small battery capacity. One of ordinary skill in the art would be motivated to utilize the teachings of Peled in the Craddock and Rowley system in order to enable computing devices to operate in the most efficient manner, conserving energy whenever possible (Park: paragraph [0002]).
Allowable Subject Matter
Claims 4 and 5 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Claim 4 recites the limitations “Claim 4. The method of claim 3, further comprising sending the header to the second channel prior to switching from the second channel to the first channel.”
Okuda et al. (US 9,921,983) disclose “A direct memory access controller, comprising: a first channel which includes a first reception channel and a first transmission channel, and performs a data transfer by a direct memory access in accordance with a descriptor acquired from a first memory; a second channel which includes a second reception channel and a second transmission channel, and performs the data transfer by a direct memory access in accordance with a descriptor acquired from a second memory; a mode setting register; and a channel switching part which selects one channel between the first channel and the second channel in accordance with information set at the mode setting register, detects a boundary of a packet to be transferred, and performs a switching to the selected channel at the detected boundary of the packet, by one packet unit, wherein the channel switching part detects the boundary of the packet based on data size information acquired from a header of the packet to be transferred, the second channel transmits a data, received at the second reception channel while a switching of the channels is performed, from the second transmission channel after the switching of the channels is completed when a switching from the second channel to the first channel is performed, and the channel switching part includes a transferring part which transfers the data, transmitted from the second transmission channel after the switching of the channels is completed, to the first reception channel when the switching from the second channel to the first channel is performed.” (Claim 1)
Okuda discloses a switching channels operations, however Okuda fails to disclose the sending of the header before the switching channels operations. Therefore, claim 4 includes allowable subject matter.
Claim 5 is dependent claim of claim 4, claim 5 therefore includes allowable subject matter.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Johnsen et al. (US 7,565,463) teach scalable routing and addressing
Ramamoorthi et al. (US 8,615,009) teach interface for extending service capabilities of a network device.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to L. T N. whose telephone number is (571)272-1013. The examiner can normally be reached M & Th 5:30 am - 2:30 pm EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, TONIA DOLLINGER can be reached at 571-272-4170. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/L. T. N/
Examiner, Art Unit 2459
/TONIA L DOLLINGER/Supervisory Patent Examiner, Art Unit 2459
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