Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
This action is in response to the application filed on 11/20/2024, in which claims 1-26 are presented for the examination.
Information Disclosure Statement
The Information Disclosure Statement (IDS) submitted on 02/14/2025 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the IDS statement is being considered by the examiner.
Drawings
The drawings filed on 11/20/2024 are accepted by the examiner.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-2, 4, 7-9, 15-18, 25, 26 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Thanner et al. (US 9,823,296, referred herein after Thanner).
As per claim 1, 25, 26, Thanner discloses a processor-implemented method for testing comprising:
accessing an automotive subsystem within a motor vehicle (Fig. 1, Col. 2, lines 30-35, built-in self test system 10 within auto mobile as claimed), wherein the automotive subsystem includes a system-on-a-chip (SoC) (Fig. 6, chip 90 SoC, Col. 6, lines 49-51), wherein the SoC includes a network-on-a-chip (NoC) (Fig. 1, communication lines 40, 42 is considered NOC as claimed), wherein the SoC is coupled to a communications bus, wherein the communications bus includes a bus controller, and wherein the SoC is coupled to a functional safety test environment (FUSATE) (Fig. 6, SoC 90 is coupled to FUSATE 10 as claimed); awakening, by a timer (Fig. 1, safety timer 38), the FUSATE from a low power mode (abstract, Col. 2, lines 39-43, Col. 3, lines 13-21, “a built-in self test control unit 32 coupled or connected to the built-in self test circuitry 22, 24, 26, 28 and the low power control unit 30 and arranged to initiate a built-in self test when receiving the BIST wake-up signal“);
sending, by the FUSATE, to one or more logic components within the SOC, a test sequence, wherein the test sequence includes a functionality check of the one or more logic components (Col. 2, lines 61-64, “The shown built-in self test system 10 may, for example, provide execution of self tests of the device 12 independently of being triggered by, for example, a power on or power off event”, wherein the execution of self tests for individual device is considered as providing test sequence to components of the chip as claimed);
receiving, by the FUSATE, a first response from the one or more logic components within the SoC (Col. 5, lines 28-31, “the built-in self test system 10 may comprise a BIST result accumulation unit 62 arranged to receive BIST result signatures provided by the built-in self test control unit 32”, wherein the results are stored in BIST result accumulation unit);
recording, by the FUSATE, the first response that was received; and (Col. 3, lines 42-47, results are recorded in cache, register or other storage devices);
reentering, by the FUSATE, the low power mode, wherein the reentering includes resetting the timer (abstract, Col. 3 lines 62-65, Col. 6, lines 33-35, wherein after completing built-in self tests, cycle of Fig. 3 repeats).
As per claim 2, Thanner discloses the method of claim 1 wherein the FUSATE is external to the SOC, wherein the FUSATE is coupled to the bus controller and the communications bus (Fig. 1, Fig. 6, Col. 6, lines 56-63, Soc 90).
As per claim 4, Thanner discloses method of claim 2 wherein the receiving occurs over the communications bus (Fig. 1, line 52, Col. 4, lines 4-8, Col. 4, lines 52-55, “The selection signal may, for example, be communicated to the built-in self test control unit 32 via a fourth connecting line 52, which may, for example, be any conductive line.”).
As per claim 7, Thanner discloses the method of claim 2 wherein the receiving occurs over a test response bus (Fig. 1, Col. 4, lines 4-8).
As per claim 8, Thanner discloses the method of claim 1 wherein the timer is at or above a first threshold (Col. 3, lines 57-61, a pre-defined process safety time is considered as timer is at threshold).
As per claim 9, Thanner discloses the method of claim 8 wherein the first threshold is programmable (Col. 3, lines 57-65, “the process safety timer 38 may be controllable or programmable by the self test supervision unit 36 and may be arranged to generate different process safety timer expiration trigger signals.”).
As per claim 15, Thanner discloses the method of claim 1 further comprising reawakening the FUSATE from the low power mode, wherein the reawakening is based on the resetting the timer (abstract, Col. 3 lines 62-65, Col. 6, lines 33-35, wherein after completing built-in self tests, cycle of Fig. 3 repeats).
As per claim 16, Thanner discloses the method of claim 15 wherein the receiving includes a second response (Col. 6, lines 27-33, second BIST cycle would receive second response as claimed).
As per claim 17, Thanner discloses the method of claim 1 further comprising examining, by the FUSATE, the first response that was recorded, wherein the examining detects a malfunction of the automotive subsystem (Col. 5, lines 48-67, malfunction detected as claimed).
As per claim 18, Thanner discloses the method of claim 17 further comprising notifying an automotive controller of the malfunction (Col. 5, lines 48-67, alert generated).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Thanner in view of Higuchi (US 2010/0312935).
As per claim 3, Thanner does not specifically disclose the method of claim 2 further comprising arbitrating, by the bus controller, between the test sequence and one or more functional transactions on the communications bus;
However, Higuchi discloses arbitrating, by the bus controller, between the test sequence and one or more functional transactions on the communications bus ([0004], “A bus controller is provided for arbitration of these competing access requests. As bus access request arbitration techniques, there are known fixed-priority arbitration and round-robin arbitration schemes, for example. In the fixed-priority arbitration scheme, priority levels are preassigned to respective circuit modules, and a bus access right is given to a circuit module having the highest priority level in comparison at the time of access contention.”, wherein the functional transactions are considered higher priority than the test sequence);
Therefore it would have been obvious to the one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate teaching of Higuchi’s fixed priority bus access arbitration scheme into Thanner’s Built-in-self test system because one of the ordinary skill in the art would have been motivated to ensure system stability, preventing data corruption, and enabling non-intrusive validation.
Claims 5-6 are rejected under 35 U.S.C. 103 as being unpatentable over Thanner and Higuchi in view of Gangasani et al. (US 2012/0226942, referred herein after Gangasani).
As per claim 5, thanner does not discloses the method of claim 4 wherein the first response is interleaved, by the bus controller, with one or more functional transactions;
However, Gangasani discloses the first response is interleaved, by the bus controller, with one or more functional transactions (Fig. 2, [0026], “the interleaved period is typically very small (a few tens of microseconds, for example), the test operation is interleaved with regular functional operation”);
Therefore it would have been obvious to the one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate teaching of Gangasani’s built-in self test (BIST) diagnostic system into Thanner’s Built-in-self test system because one of the ordinary skill in the art would have been motivated to achieve increased bus utilization and reduced latency.
As per claim 6, Gangasani discloses the method of claim 5 wherein the first response includes a packetized communication ([0055], [0023], data is communicated).
Claims 10-14, 19 are rejected under 35 U.S.C. 103 as being unpatentable over Thanner in view Portlan et al. (US 2012/0137186, referred herein after Portlan).
As per claim 10, Thanner does not disclose the method of claim 1 wherein the recording includes sending, to a remote server, the first response;
However, Portolan discloses the recording includes sending, to a remote server, the first response ([0223], [0225], wherein the testing results of SUT 620 can be send locally or remotely using interface 619);
Therefore it would have been obvious to the one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate teaching of Portlan’s remote testing capabilities into Thanner’s Built-in-self test system because one of the ordinary skill in the art would have been motivated to sending the data/results immediately to allow the central system to respond instantly to events occurring on the remote system.
As per claim 11, Thanner discloses the method of claim 10 wherein the sending is based on a number of responses recorded, wherein the number is above a second threshold (Col. 3, lines 48-65, different safety time expiration is considered as second threshold).
As per claim 12, Portlan discloses the method of claim 10 further comprising accessing, by a software program, the first response on the remote server, wherein the accessing is based on an application programming interface (API) ([0256]).
As per claim 13, Thanner discloses the method of claim 12 further comprising analyzing the first response, wherein the analyzing detects a malfunction of the automotive subsystem (Col. 5, lines 48-67, malfunction detected, alert generated).
As per claim 14, Thanner discloses the method of claim 13 further comprising alerting a user of the malfunction (Col. 5, lines 48-67).
As per claim 19, Thanner does not disclose the method of claim 1 further comprising programming the FUSATE, wherein the programming is accomplished with a test instruction set architecture (TISA);
However, Portlan discloses the programming is accomplished with a test instruction set architecture (TISA) ([0043], [0074], TISA);
Therefore it would have been obvious to the one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate teaching of Portlan’s remote testing capabilities into Thanner’s Built-in-self test system because one of the ordinary skill in the art would have been motivated to sending the data/results immediately to allow the central system to respond instantly to events occurring on the remote system.
Claims 20-21 are rejected under 35 U.S.C. 103 as being unpatentable over Thanner and Portlan in view of Gangasan.
As per claim 20, neither Thanner nor Portlan disclose the method of claim 19 further comprising providing programming access through a test port of the FUSATE;
However, Gangasani discloses providing programming access through a test port of the FUSATE ([0059], [0070]);
Therefore it would have been obvious to the one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate teaching of Gangasani’s built-in self test (BIST) diagnostic system into Thanner’s Built-in-self test system and Portlan’s remote testing capabilities because one of the ordinary skill in the art would have been motivated to achieve increased bus utilization and reduced latency.
As per claim 21, neither Thanner nor Portlan disclose the method of claim 1 wherein the test sequence targets a connectivity of the NOC;
However, Gangasani discloses the test sequence targets a connectivity of the NOC (Fig. 1, [0025], [0026], test sequence (i.e. tests) transmitted to test controller);
Therefore it would have been obvious to the one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate teaching of Gangasani’s built-in self test (BIST) diagnostic system into Thanner’s Built-in-self test system and Portlan’s remote testing capabilities because one of the ordinary skill in the art would have been motivated to improve fault detection and provide high fault coverage.
Claims 22-24 are rejected under 35 U.S.C. 103 as being unpatentable over Thanner and Engel et al. (US 2007/0093924, referred herein after Engel).
As per claim 22, Thanner does not disclose the method of claim 1 wherein the recording includes an identification number for the automotive subsystem;
However, Engel disclose recording includes an identification number for the automotive subsystem (Fig. 7, [0042], electric stability system defect identified);
Therefore it would have been obvious to the one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate teaching of Engel’s diagnosis interface into Thanner’s Built-in-self test system because one of the ordinary skill in the art would have been motivated to analyze a technical system using interface that is helpful in diagnosing motor vehicles.
As per claim 23, Thanner does not disclose the method of claim 1 wherein the recording includes an identification of the one or more logic components.
However, Engel disclose recording includes an identification of the one or more logic components (Fig. 7, [0042], airbag defect identified);
Therefore it would have been obvious to the one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate teaching of Engel’s diagnosis interface into Thanner’s Built-in-self test system because one of the ordinary skill in the art would have been motivated to analyze a technical system using interface that is helpful in diagnosing motor vehicles.
As per claim 24, Thanner does not disclose the method of claim 1 wherein the recording includes a motor vehicle identification.
However, Engel disclose recording includes a motor vehicle identification (Fig. 7, [0042], vehicle VIN presented on dashboard);
Therefore it would have been obvious to the one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate teaching of Engel’s diagnosis interface into Thanner’s Built-in-self test system because one of the ordinary skill in the art would have been motivated to analyze a technical system using interface that is helpful in diagnosing motor vehicles.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. See form 892.
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/KAMINI B PATEL/ Primary Examiner, Art Unit 2114