DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 11/20/2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the Examiner.
Specification
The abstract of the disclosure is objected to because it is too long and contains additional material (see following extract from MPEP):
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A corrected abstract of the disclosure is required and must be presented on a separate sheet, apart from any other text. See MPEP § 608.01(b).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3 and 5-6 are rejected under 35 U.S.C. 103 as being unpatentable over IDS doc He et al. (US 2021/367358; “He”) in view of Jo et al. (US 2024/0196517; “Jo”).
Claim 1: He discloses (fig. 2 below) “A multiband patch antenna (title, dual-band) comprising:
a first antenna (M2) comprising a first through-hole-feed (122) (the feed pin is placed in a hole in the antenna, as shown in fig. 2, and is therefore a through-hole feed);
a second antenna (M3) comprising a second through-hole-feed (117);
a first pin (¶33, feed pin 136);
an antenna printed circuit board (PCB) (upper layers of layers of 300) comprising a first antenna feed point (feed point where end of first pin is connected to M5, near 159);
interposer PCB layers (lower layers of 300. For example, the PCB layer M9/E9 is an intermediate layer in the package that provides electrical connections between multiple components, that is, between the first and second antennas and the electronic components on the main board. It is therefore considered to be an interposer); and
a main PCB (main board 12),
wherein the first antenna (M2) and the second antenna (M3) are mounted on top of each other and on top of the antenna PCB (see fig. 2),
each of the first (M2) and the second (M3) antenna having an electrical connection with the antenna PCB (via metal layers M - see fig. 2),
wherein the first pin (136) is mechanically and electrically connected to at least one of the first (122) and the second (117) through-hole feeds (the first pin 136 is a feed pin and is therefore mechanically and electrically connected to at least the first through-hole feed 122) and to the first antenna feed point (near 159) of the antenna PCB, and
wherein the interposer PCB layers (M9/E9) are mounted between the antenna PCB (any of layer of 300) and the main PCB (12) and is mechanically and electrically connected to the antenna PCB (upper layers of 300) and to the main PCB (12) (via BGA balls 14)”.
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He does not explicitly disclose an interposer PCB.
Jo teaches (fig. 4 below) an interposer PCB (¶91, “The interposer 200 may have a structure including a plurality of layers. For example, the interposer 200 may include a plurality of insulation parts including an insulating material. For example, the insulating material may include preimpregnated materials (PPG) (PREPREG), and copper clad laminates may be disposed between the insulating materials.”). The interposer PCB (200) is disposed between a second board (¶190) and a first PCB board (150) (¶81, “main circuit board”) for electrical and mechanical connection therebetween (¶6).
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It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to apply the teachings of Jo to the antenna of He, wherein the interposer is an interposer PCB. The motivation to do so is to allow the first and second boards to be electrically coupled to each other while forming a shield area surrounded by the interposer (¶4 of Jo).
Claim 2: the modified He discloses the multiband patch antenna according to claim 1.
The modified He teaches wherein respective sizes of the antenna PCB, the interposer PCB and the main PCB are matched (see fig. 2 of He, which shows that all the layers of the PCB are of the same width, and Jo teaches ¶82, “In various embodiments, the second board 190 may have various sizes. For example, the second board 190 may have the same size as that of the first board 150, may have a size that is smaller than that of the first board 150, or may have a size that is larger than that of the first board 150. The second board 190 may have a shape corresponding to the shape of the interposer 200. The shapes of the first board 150 and the second board 190, which are illustrated in the drawings, are merely an example, and the boards may have various shapes”).
He does not explicitly disclose “wherein the main PCB comprises multiple electronic components for handling signals received via the first and/or the second antenna, and wherein a height of the interposer PCB is higher than a height of a highest electronic component of the components of the main PCB”.
Jo teaches (fig. 4) wherein the main PCB (150) comprises multiple electronic components (¶83, “the first electric element 152 may include a processor (e.g., a processor 1720 of FIG. 17)”) for handling signals received via the first and/or the second antenna (¶184, “The auxiliary processor 1723 may control at least some of functions or states related to at least one component (e.g., the display device 1760, the sensor module 1776, or the communication module 1790) among the components of the electronic device 1701, instead of the main processor 1721 while the main processor 1721 is in an inactive (e.g., sleep) state, or together with the main processor 1721 while the main processor 1721 is in an active state (e.g., executing an application).”; and ¶198, “the communication module 1790 may include a wireless communication module 1792 (e.g., a cellular communication module, a short-range wireless communication module, or a global navigation satellite system (GNSS) communication module)”), and (fig. 4) wherein a height of the interposer PCB (200) is higher than a height of a highest electronic component of the components (¶83, “first electric element 152”) of the main PCB (¶81, “a main circuit board (e.g., the first board 150)”).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to apply the teachings of Jo to the antenna of He in view of Jo, wherein the main PCB comprises multiple electronic components for handling signals received via the first and/or the second antenna, and wherein a height of the interposer PCB is higher than a height of a highest electronic component of the components of the main PCB. The motivation to do so is to provide a shielding space for electronic components that may be vulnerable to noise (¶83 of Jo).
Claim 3: the modified He discloses the multiband patch antenna according to claim 1.
The modified He discloses “a first connection between the antenna PCB and the interposer PCB (fig. 4 of Jo, 200); and a second connection between the interposer PCB and the main PCB (fig. 2 of He, the layers of 300 are connected; fig. 4 of Jo, 200 is connected to main board 150)”.
Jo teaches that the antenna PCB and the interposer PCB, and the interposer PCB and the main PCB are connected using a hot bar process, or using a lead connection (¶81). One of ordinary skill in the art would recognize that PCBs can be connected by using other known methods such as gluing (as evidenced by Miyake et al. in US 6,449,836).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to modify the antenna of He in view of Jo, wherein the first connection is a gluing connection; and the second connection is a gluing connection. Such a connection is the use of a known technique yielding predictable results. A motivation for gluing the PCBs instead of using a hot bar process is to not subject the PCBs to high temperatures.
Claim 5: the modified He teaches the multiband patch antenna according to claim 1.
He does not disclose “wherein the interposer PCB has a recess having a center which coincides with a center of the interposer PCB and wherein a size of the recess is adapted to accommodate all electronic components of the main PCB”.
Jo teaches (fig. 4) an interposer PCB (200) having a recess (space 209). As the recess is defined by the shape of the interposer, the recess of the interposer PCB has a center which coincides with a center of the interposer PCB.
Although Jo does not explicitly teach that the size of the recess is adapted to accommodate all electronic components of the main PCB, Jo teaches (¶77) “the interposer 200 may be provided in various shapes. For example, the interposer 200 may be provided in a polygonal shape. The interposer 200 may be provided in a ring shape that surrounds the shielding space 209. A shape of the interposer 200 disclosed in the disclosure is not limited to those illustrated in the drawings.” Jo also teaches that the interposer 200 may function as a shielding member (¶77) by defining a shielding space 209 that includes electric elements that require shielding (¶83). One of ordinary skill in the art would recognize that any, or all, electronic components of a main board that require shielding could be located within the shielding space such that a separate shielding is not required (¶85) by increasing the size and/or shape of the interposer (¶77).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to apply the teachings of Jo to the antenna of He in view of Jo, wherein the interposer PCB has a recess having a center which coincides with a center of the interposer PCB and wherein a size of the recess is adapted to accommodate all electronic components of the main PCB. Doing so allows for all of the electronic components to be shielded using an existing component without the need for a separate shield (¶85 of Jo).
Claim 6: the modified He discloses the multiband patch antenna according to claim 1.
He discloses wherein the first antenna feed point (near 159) of the antenna PCB is located at or near a center of the antenna PCB (see dashed line of fig. 2).
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over IDS doc He et al. (US 2021/367358; “He”) in view of Jo et al. (US 2024/0196517; “Jo”), and further in view of Carper et al. (US 2024/0332800; “Carper”).
Claim 4: the modified He teaches the multiband patch antenna according to claim 1.
He discloses “wherein each of the first antenna (M2) and the second antenna (M3) is a polarized patch antenna, wherein the first antenna is configured to operate in one frequency band, and wherein the second antenna is configured to operate in a different frequency band than the first antenna (title, “dual-band cross-polarized 5G mm-wave phased array antenna”)”.
He does not disclose “wherein each of the first antenna and the second antenna is a circularly polarized patch antenna, wherein the first antenna is configured to operate in one Global Navigation Satellite System (GNSS) frequency band, and wherein the second antenna is configured to operate in a different GNSS frequency band than the first antenna”.
Carper teaches a dual-band stacked patch antenna including a first patch configured to receive global navigation satellite system (GNSS) signals (¶1, “The present disclosure relates to an antenna for receiving radio signals from a Global Navigation Satellite System (GNSS”) at a first frequency band, a second patch configured to receive GNSS signals at a second frequency band (abstract, “A dual-band stacked patch antenna includes a first patch antenna arrangement coupled to and stacked on a substrate, the first patch antenna arrangement being configured to receive right hand circularly polarized signals in a first frequency band and a second patch antenna arrangement coupled to and stacked on the first patch antenna arrangement, the second patch antenna arrangement being configured to receive right hand circularly polarized signals in a second frequency band”).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to apply the teachings of Carper to the antenna of He in view of Jo, wherein each of the first antenna and the second antenna is a circularly polarized patch antenna, wherein the first antenna is configured to operate in one Global Navigation Satellite System (GNSS) frequency band, and wherein the second antenna is configured to operate in a different GNSS frequency band than the first antenna. The motivation to do so is to provide antenna communication from satellites in desired bandwidths (¶1 of Carper).
Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over IDS doc He et al. (US 2021/367358; “He”) in view of Jo et al. (US 2024/0196517; “Jo”), and further in view of Raappana et al. (US 2011/0181476; “Raa”).
Claim 11: the modified He teaches the multiband patch antenna according to claim 1.
He discloses (fig. 2) “further comprising a second pin (132), wherein the second antenna (M3) comprises a third through-hole feed (112) and the antenna PCB (upper layers of 300) comprises a second antenna feed point (near 157), wherein the first pin (136) extends through the first through-hole feed (122) of the first antenna (M2), the second through-hole feed (117) of the second antenna (M3) and is connected to the first antenna feed point (159) of the antenna PCB (upper layers of 300), wherein the first pin (136) is electrically and mechanically connected to the first through-hole feed (122), wherein the second pin (132) reaches through the third through-hole feed (112) of the second antenna (M3) and is connected to the second antenna feed point (157) of the antenna PCB (upper layers of 300), and wherein the second pin (132) is electrically and mechanically connected to the third through-hole feed (112) (the second pin 132 is a feed pin and is therefore mechanically and electrically connected to the third through-hole feed 122, as seen in fig. 2)”.
He does not disclose “the first pin is soldered to the first antenna feed point” and “the second pin is soldered to the second antenna feed point”.
Raa teaches (fig. 2A) a patch antenna element having a pin (210) that serves as a feed conductor (¶91). The pin (210) comprises a solderable copper, or tin bronze material (¶96) and can therefore be soldered to feed points.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to apply the teachings of Raa to the antenna of He in view of Jo, wherein the first pin is soldered to the first antenna feed point and the second pin is soldered to the second antenna feed point. Doing so provides a highly reliable electrical connection and prevents signal loss in the connection.
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over IDS doc He et al. (US 2021/367358; “He”) in view of Jo et al. (US 2024/0196517; “Jo”), and further in view of IDS doc Kamgaing et al. (US 2018/0332151; “Kam”).
Claim 14: the modified He teaches the multiband patch antenna according to claim 1.
He does not disclose “wherein the interposer PCB comprises a plurality of vias placed along its edges, said plurality of vias forming a part of a Faraday cage”.
Kam teaches (fig. 6 below) an antenna unit (692) having antennas (652-656) in an antenna PCB (upper portion of PCB 650). The antenna PCB (upper portion of 650) is connected to an interposer (lower portion of PCB 650) comprising a plurality of vias (conductive connections 670-672) which can be a ground plane for RF shielding (e.g., a Faraday cage) (¶61).
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It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to apply the teachings of Kam to the antenna of He in view of Jo, wherein the interposer PCB comprises a plurality of vias placed along its edges, said plurality of vias forming a part of a Faraday cage. Doing so provides an opportunity for shielding using in-substrate vias (e.g., in board vias) which is more cost-effective (¶19 of Kam).
Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over IDS doc He et al. (US 2021/367358; “He”) in view of Jo et al. (US 2024/0196517; “Jo”), and further in view of Chiu (US 5,832,596).
Claim 15: He discloses (fig. 2) “a method for manufacturing a multiband patch antenna (10) comprising:
receiving an antenna component having an antenna printed circuit board (PCB) (upper layers of 300), a second antenna (M3) and a first antenna (M2) mounted on top of each other in a stacked arrangement;
providing an interposer PCB layers (lower layers of 300);
providing a main PCB (main board 12);
providing a base component by connecting the interposer PCB layers to the top of the main PCB (connected via soldering pads 15 and BGA balls 14);
providing the multiband patch antenna by connecting a base component (main board 12 and interposer PCB layers) to the antenna component (upper layers of PCB and first M2 and second M3 antennas)”.
He does not explicitly disclose “an interposer PCB;
populating the main PCB and applying a solder paste to the main PCB;
applying at least two glue dots to a surface of the interposer PCB;
providing a base component by soldering and gluing the interposer PCB on top of the main PCB (12);
applying solder paste to the interposer PCB of the base component;
applying at least two glue dots to the antenna component; and
providing the multiband patch antenna by soldering and gluing the base component to the antenna component”.
Jo teaches (fig. 4) “an interposer PCB (200);
populating the main PCB (electric elements 152 on main board 150, which is a PCB) and applying a solder to the main PCB (¶90);
providing a base component by soldering the interposer PCB (200) on top of the main PCB (150) (¶90, “the conductive pad included on the second surface 202 may be coupled to the conductive area of the first board 150 through soldering.”); and
applying solder to the interposer PCB (¶89) of the base component (200, 150)”.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to apply the teachings of Jo to the method of He, wherein the interposer is an interposer PCB, populating the main PCB and applying a solder to the main PCB; providing a base component by soldering the interposer PCB on top of the main PCB; and applying solder to the interposer PCB of the base component. The motivation to do so is to allow the first and second boards to be electrically and mechanically coupled to each other while forming a shield area surrounded by the interposer (¶4 of Jo).
Jo does not teach applying a solder paste to the main PCB; applying at least two glue dots to a surface of the interposer PCB; providing a base component by soldering and gluing; applying solder paste to the interposer PCB; applying at least two glue dots to the antenna component; and providing the multiband patch antenna by soldering and gluing the base component to the antenna component.
Chiu teaches a method of forming a package using adhesive and a soldering paste (col. 4, lines 13-15) for aligning and connecting pieces of the package. Chiu also teaches that adhesive can be used to glue boards together, but that adhesive only needs to be applied in areas where electrical (wire) bonding will occur (col. 4, lines 1-6). Therefore, a person having ordinary skill in the art would recognize that a glue dot could be applied to each of the four wire bonds (406-408) shown in fig. 4.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to apply the teachings of Chiu to the method of He in view of Jo, to include the steps of applying a solder paste to the main PCB; applying at least two glue dots to a surface of the interposer PCB; providing a base component by soldering and gluing; applying solder paste to the interposer PCB; applying at least two glue dots to the antenna component; and providing the multiband patch antenna by soldering and gluing the base component to the antenna component. Using soldering an gluing provides a robust method of connecting boards and an adhesive and solder paste can be used during the electrical connection alignment process.
Allowable Subject Matter
Claims 7-10 and 12-13 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 7, He discloses “wherein the first pin (136) extends through the first through-hole feed (122) of the first antenna (M2) and the second through-hole feed (117) of the second antenna (M3), such that the first (M2) and the second (M3) antenna are connected to each other mechanically and electrically”. He does not teach, or suggest, “wherein the first pin (136) is soldered to the first antenna feed point (159) of the antenna PCB on a surface of the antenna PCB that faces the main PCB (12), and wherein the main PCB has an area, which is free from electronic components, said area being arranged in correspondence with the first antenna feed point of the antenna PCB”.
Regarding claim 8, He does not teach, or suggest, wherein the antenna PCB comprises a first antenna radio-frequency (RF) pad having an electrical connection to the first antenna feed point, wherein the first antenna RF pad is arranged on a surface of the antenna PCB which faces the main PCB and extends to an edge of the antenna PCB.
Claims 9-10 are objected to due to their dependency on claim 8.
Regarding claim 12, He does not teach, or suggest, wherein the antenna PCB comprises a first antenna RF pad and a second antenna RF pad, wherein the first antenna RF pad extends to an edge of the antenna PCB and is electrically connected to the first antenna feed point, wherein the second antenna RF pad extends to an edge of the antenna PCB and is electrically connected to the second antenna feed point, and wherein the first antenna RF pad and the second antenna RF pad are arranged on a surface of the antenna PCB which faces the main PCB.
Claim 13 is objected to due to its dependency on claim 12.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANNA N HAMADYK whose telephone number is (703)756-1672. The examiner can normally be reached 7:30 am - 5:00 pm.
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/ANNA N HAMADYK/Examiner, Art Unit 2845
/DIMARY S LOPEZ CRUZ/Supervisory Patent Examiner, Art Unit 2845
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