DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claims 18-24 objected to under 37 CFR 1.75 as being a substantial duplicate of claims 10-16. It is assumed Applicant intended claims 18-24 to depend from claim 17, rather than claim 9.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-30 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1, 3, 7, 8, 10, 12, 19, 17, and 19 of U.S. Patent No. 12,166,578. Although the claims at issue are not identical, they are not patentably distinct from each other because the claims of the aforementioned patent teach at least the features of the present claims.
Claims 1-30 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1, 3, 5, 8, 10, 12, 15, 17, 19, and 21 of U.S. Patent No. 11,296,823. Although the claims at issue are not identical, they are not patentably distinct from each other because the claims of the aforementioned patent teach at least the features of the present claims.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 5, 13, 21, and 29 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being incomplete for omitting essential elements, such omission amounting to a gap between the elements. See MPEP § 2172.01.
Claim 5 recites, “assigning a location to each encoded bit based on a formula.” The omitted elements are: the formula. It is unclear what formula Applicant intends for assigning a location. There will always exist a formula that can be used to describe location assignment because such an action can inherently be described in pseudocode according to the laws of mathematics, so therefore this omitted essential element further causes the claim to not be further limiting.
Claims 13, 21, and 29 are similarly rejected.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-3, 5, 8-11, 13, 16-19, 21, 24-27, and 29 is/are rejected under 35 U.S.C. 102a1 as being anticipated by Li et al (US Pat. Pub. 2009/0180495; hereinafter referred to as Li).
As per claims 1, 9, 17, 25: Li teaches a method, apparatus, and non-transitory computer-readable medium for wireless communications, comprising:
a memory in communication with a processor (Fig. 1) configured for:
encoding a code block using a Low Density Parity Check (LDPC) code (Fig. 1, 109) to generate a stream of encoded bits including systematic bits and parity bits arranged with the systematic bits followed by the parity bits (paragraph 16, Equation 4 and paragraph 49, Equation 6);
mapping each bit in the stream of encoded bits sequentially to a most significant bit (Fig. 2, systematic bits are mapped starting with MSBs; paragraph 62) available across two or more modulation symbols (Fig. 2, each column pair is a modulation symbol as explained in paragraph 54; see also paragraph 50); and
transmitting the two or more modulation symbols (Fig. 1, 101 and 106).
As per claims 2, 10, 18, 26: Li further teaches the method, apparatus, and medium above, wherein systematic bits are located in a most significant bit of each of the two or more modulation symbols (Fig. 2, systematic bits in MSB positions).
As per claims 3, 11, 19, 27: Li further teaches the method, apparatus, and medium above, wherein parity bits are located in a least significant bit of each of the two or more modulation symbols (Fig. 2, parity bits in LSB positions).
As per claims 5, 13, 21, 29: Li further teaches the method, apparatus, and medium above, wherein mapping each bit in the stream of encoded bits sequentially to a most significant bit available across two or more modulation symbols comprises assigning a location to each encoded bit based on a formula (paragraphs 59-61).
As per claims 8, 16, 24: Li teaches the method, apparatus, and medium above, wherein mapping each bit in the stream of encoded bits sequentially to a most significant bit available across two or more modulation symbols comprises:
selecting a first symbol of the two or more modulation symbols that has a bit location that is in a most significant position that is available among the two or more modulation symbols (Fig. 2, first row of the first column; paragraph 54), and
selecting a location of a next encoded bit a most significant bit location that is available within the selected symbol (Fig. 2, first row of the second column; paragraph 54).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 4, 7, 12, 15, 20, 23, and 28 is/are rejected under pre-AIA 35 U.S.C. 103(a) as being unpatentable over Li in view of Jeong et al (US Pat. Pub. 2012/0051460; hereinafter referred to as Jeong).
As per claims 4, 12, 20, and 28: Li teaches the apparatus and method above. Not explicitly disclosed is wherein the encoded bits are arranged with the systematic bits followed by the parity bits based on a mapping table. However, Jeong in an analogous art teaches a bit mapper (Fig. 5, 515) that arranges bits of an encoded codeword based on a mapping table (paragraph 51).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date to use the transmitter of Jeong in the system of Li. This modification would have been obvious to one of ordinary skill in the art at the time of filing because it could have equivalently been used to perform the transmission functions disclosed by Li.
As per claims 7, 15, 23: Li teaches the apparatus and method above. Not explicitly disclosed is wherein mapping each bit in the stream of encoded bits sequentially to a most significant bit available across two or more modulation symbols is performed in a bit level interleaving operation. However, Jeong in an analogous art teaches a transmitter comprising a bit interleaver (Fig. 5, 513; Fig. 6, 611).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date to perform the mapping of Li in a bit level interleaving operation. This modification would have been obvious for one of ordinary skill in the art at the time of filing because doing so would have minimized error rate in modulating the codeword (paragraph 76).
Claims 6, 14, 22, 30 is/are rejected under pre-AIA 35 U.S.C. 103(a) as being unpatentable over Li in view of Yano et al (US Pat. Pub. 2009/0290544; hereinafter referred to as Yano).
As per claims 6, 14, 22, 30: Li teaches the apparatus and method above. Not explicitly disclosed is wherein the systematic bits and the parity bits are arranged in an order based on an encoding scheme of the LDPC code. However, Yano in an analogous art teaches an irregular encoding LDPC scheme arranged in an order based on column degree (paragraph 50).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date to arrange the bits of Li based on an encoding scheme of the LDPC code. This modification would have been obvious for one of ordinary skill in the art at the time of filing because performance gains increase with column weights, as taught by Li in paragraph 76.
Claim(s) 1-3, 9-11, 17-19, and 25-27 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shimizu et al (US Pat. 8,000,403; hereinafter referred to as Shimizu) in view of Myung et al (US Pat. Pub. 2010/0162073; hereinafter referred to as Myung).
As per claims 1, 9, 17, 25: Shimizu teaches a method, apparatus, and non-transitory computer-readable medium for wireless communications, comprising:
encoding a code block using a ECC code (Fig. 2, 150) to generate a stream of encoded bits including systematic bits and parity bits arranged with the systematic bits followed by the parity bits (col. 5, lines 12-14);
mapping each bit in the stream of encoded bits sequentially to a most significant bit available across two or more modulation symbols (Fig. 3: encoded bits mapped to MSB across the three symbols shown); and
transmitting the two or more modulation symbols (Fig. 1, 10 and 250).
Not explicitly disclosed is the ECC code being a Low Density Parity Check (LDPC) code. However, Myung in an analogous art teaches a LDPC code (paragraph 10).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date to use a LDPC code as the ECC code of Shimizu. This modification would have been obvious for one of ordinary skill in the art at the time of filing because it was a well-known ECC code (paragraph 10).
As per claims 2, 10, 18, 26: Shimizu further teaches the method, apparatus, and medium above, wherein systematic bits are located in a most significant bit of each of the two or more modulation symbols (Fig. 3, systematic bits S1 and S2 in MSB positions).
As per claims 3, 11, 19, 27: Shimizu further teaches the method, apparatus, and medium above, wherein parity bits are located in a least significant bit of each of the two or more modulation symbols (Fig. 3, parity bits P11 and P12 in LSB positions).
Claims 4, 12, 20, 28 is/are rejected under pre-AIA 35 U.S.C. 103(a) as being unpatentable over Shimizu in view of Myung in view of Jeong et al (US Pat. Pub. 2012/0051460; hereinafter referred to as Jeong).
As per claims 4, 12, 20, 28: Shimizu et al teach the apparatus and method above. Not explicitly disclosed is wherein the encoded bits are arranged with the systematic bits followed by the parity bits based on a mapping table. However, Jeong in an analogous art teaches a bit mapper (Fig. 5, 515) that arranges bits of an encoded codeword based on a mapping table (paragraph 51).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date to use a mapping table in the bit mapper 415 of Myung. This modification would have been obvious to one of ordinary skill in the art at the time of filing because it was a known way of facilitating the operation of the bit mapper as taught by Jeong.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to STEVE N NGUYEN whose telephone number is (571)272-7214. The examiner can normally be reached M-F 9-5.
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/STEVE N NGUYEN/Primary Examiner, Art Unit 2111