DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 4/7/2026 has been entered.
Response to Amendment
The amendment filed 4/7/2026 does not place the application in condition for allowance.
The previous art rejections are revised to incorporate new claim limitations.
New analysis follows.
Claim Rejections - 35 USC § 102
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claim(s) 1-5 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US 2015/0137606 to Adest (of record).
Regarding claims 1-5, Adest teaches a power conversion system (Figs. 8C, 9) comprising
A first conversion device (305a or 905a of the Figs., ¶0043, 0044, 0082, 0088, 0093), including a first input end (coincident with 614, 616 of Fig. 6, ¶0063-0065), a first conversion circuit (illustrated within 305 of Fig. 6), a first output end (coincident with 610, 612), and a first control unit (606 of Fig. 6, 311 of Fig. 8C, 900 of Fig. 9; ¶0063-0068; also see Fig. 7, ¶0069-0084), wherein the first input end is electrically coupled to a first power source (101a, ¶0037, 0039), and the first conversion circuit is electrically coupled to the first input end, the first output end and the first control unit
A second conversion device (305b or 905b of the Figs.), including a second input end (coincident with 614, 616 of Fig. 6), a second conversion circuit (illustrated within 305 of Fig. 6), a second output end (coincident with 610, 612), and a second control unit (606 of Fig. 6, 311 of Fig. 8C, 900 of Fig. 9), wherein the second input end is electrically coupled to a second power source (101b), and the second conversion circuit is electrically coupled to the second input end, the second output end and the second control unit
A maximum power point tracking (MPPT) circuit (107 of Fig. 9, ¶0089, 0094, 0095), connected in series with the first output end and the second output end and configured to determine (the scope of the term “determine” is at least inclusive of synonyms like “measure”, “set”, or “fix”; the instant reasoning leans towards “set” or “fix”, but a skilled artisan would not disqualify other interpretations) a photovoltaic current according to the first power source (101a) and the second power source (101b) (the MPPT circuit “locks on” to a particular current, as described in Fig. 8D, ¶0089, 0090)
Wherein the first control unit is configured to output a first control signal (¶0044, 0065, 0070, 0072 describes pulse width modulation; ¶0049 describes duty cycle) to adjust the first output voltage of the first conversion circuit (305a) becoming a first local maximum voltage (¶0088: “The MPPT loop in converter 305 locks the input voltage and current from each solar panel 101a-101d to its optimal power point (i.e., to converge on the maximum power point).”; ¶0092, especially: “Control circuit 311 may be configured to set (step 803) the input power received at the input terminals 614/616 to a maximum power for a predetermined output voltage point or voltage range or at a predetermined output current point or current range.”, “maximum power point tracking circuit 107, if present, may stably track (step 805) the voltage and/or current point or range. When a maximum is reached (decision block 807), MPPT tracking circuit 107 locks (step 809) onto the power point (e.g., the "predetermined point" in FIG. 8D)”), and the second control unit is configured to output a second control signal to adjust a second output voltage of the second conversion circuit (305b) becoming a second local maximum voltage, and the power conversion system provides a maximum power (¶0092: “Control circuit 311 may be configured to set (step 803) the input power received at the input terminals 614/616 to a maximum power for a predetermined output voltage point or voltage range or at a predetermined output current point or current range.”).
Per claim 2, Adest teaches the limitations of claim 1. The first output voltage is not equal to the second output voltage in an embodiment (¶0098).
Per claim 3, Adest teaches the limitations of claim 1. The first control signal and the second control signal are Pulse Width Modulation (PWM) signals (Ibid.).
Per claims 4 and 5, Adest teaches the limitations of claim 1. The first control unit (305a) is configured to adjust the first control signal to change the first output voltage, and the second control unit (305b) is configured to adjust the second control signal to adjust the second output voltage (Ibid.).
The first control unit (305a) is configured to adjust a duty cycle or frequency of the first control signal, and the second control unit is configured to adjust a duty cycle or frequency of the second control signal (Ibid.).
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claim(s) 6 and 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Adest as applied to claim 5 above.
Regarding claims 6 and 7, Adest teaches the limitations of claim 5. Adest teaches that each of the first control unit (305a) and the second control unit (305b) is configured to adjust the parameters of the respective first and second control signal in a first or second direction (“perturb” or “perturb and observe” in the cited text) in order to achieve optimized power (¶0065, 0097, 0098). While the reference does not explicitly recite that each of the respective control circuits are configured to function in the claimed way, it would have been obvious as of the effective filing date of the claimed invention for a person having ordinary skill in the art that Adest’s control circuits could be configured as such in order to optimize output power.
Response to Arguments
Applicant’s arguments with respect to claim(s)1-7 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
The rejections above rely upon a reference previously made of record. However, the reasoning relies upon a different series of embodiments which illustrates the function of the MPPT circuit in determining (interpreted as synonymous with setting or fixing) a current which flows through all of the power sources connected to the device or in the system.
The examiner encourages Applicant to schedule an interview prior to submission of an official response to discuss the distinct limitations of their invention.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Ryan S Cannon whose telephone number is (571)270-7186. The examiner can normally be reached M-F, 8:30am-5:30pm PST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jeffrey Barton can be reached at (571) 272-1307. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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Ryan S. Cannon
Primary Examiner
Art Unit 1726
/RYAN S CANNON/Primary Examiner, Art Unit 1726
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