Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
2. Applicant's arguments filed 02/12/2026 have been fully considered but they are not persuasive.
On pages 11-12 of the amendment, Applicant argued that Bross fails to teach or suggest that step 6 of replacing parameter sets with the replacement parameter sets is performed prior to the step 5 of removing from outBitstream all SEI NAL units that contain scalable nesting SEI messages with sn_subpic_flag equal to 0.
While Applicant arguments are understood, under U.S. patent law, rearranging or changing the order of process steps is generally considered prima facie obvious if the steps are already known and used in the prior art, see, In re Burhans, 154 F.2d 690, 69 USPQ 330 (CCPA 1946), which held that selecting any order of performing known steps is obvious; also see In re Gibson, 39 F.2d 975, 5 USPQ 230 (CCPA 1930) (Selection of any order of mixing ingredients is prima facie obvious) and Ex parte Rubin, 128 USPQ 440 (Bd. App. 1959), which held that reversing the order of the prior art process steps is obvious; see MPEP 2144.04 (IV)(C). Therefore, it would have been obvious for one having skill in the art to reverse the order of the prior art process steps (5) and (6) since the steps are already known and used in the prior art.
Double Patenting
3. The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
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4. Claims 1-6, 11-14, 16-17 and 19-20 rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1, 3-7, 9-11, 13-1 and 17-20 of U.S. Patent No. 12,184,899. Although the claims at issue are not identical, they are not patentably distinct from each other because the difference between the claims of this application and the patented claims is that Applicant has identified the flag in the patented claims as “sn_subpic_flag.”
It would have been obvious to one of ordinary skill in the art at the time the invention was made to add some limitations because one of ordinary skill in the art would have realized that adding some limitations in the claims is an obvious expedient since the remaining elements perform the same functions as before. In re Karlson, 136 USPQ 184 (CCPA 1963).
Claim Rejections - 35 USC § 103
5. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
6. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
7. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
8. Claim(s) 1-6, 8 and 11-12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Bross et al. “Versatile Video Coding (Draft 10)” JVET-S2001-vH, cited in IDS, hereinafter “Bross”.
As per claim 1, Bross discloses a method of processing video data comprising:
performing a conversion between a video and a bitstream of the video (such as encoding or decoding process that transform a video into a bitstream and vice versa, see section “Encoding process, decoding process, and use of VUI parameters and SEI messages” on page 1 and page 5, definitions under (3.48) and (3.52)),
wherein the bitstream conforms to an order of a sub-bitstream extraction process (page 474, see lines 7-8 from section “C.7 Subpicture sub-bitstream extraction process”, It is a requirement of bitstream conformance for the input bitstream that any output sub-bitstream that satisfies all of the following conditions shall be a conforming bitstream) that is defined by a rule that specifies the order of the sub-picture sub-bitstream extraction process (page 474, line 30 from section “C.7 Subpicture sub-bitstream extraction process”, The output sub-bitstream outBitstream is derived by the following order steps) comprises replacing parameter sets with replacement parameter sets (page 475, lines 1-3, step (6) from section “C.7 Subpicture sub-bitstream extraction process”, replace all parameter sets with the replacement parameter sets) prior to removing, from an output bitstream, supplemental enhancement information (SEI) network abstraction layer (NAL) units that contain scalable nesting SEI messages with sn_subpic_flag equal to 0 (page 474, step (5) from section “C.7 Subpicture sub-bitstream extraction process”, remove from outBitstream all SEI NAL units that contain scalable nesting SEI messages with sn_subpic_flag equal to 0).
While Bross teaches step (5) is prior to step (6), under U.S. patent law, rearranging or changing the order of process steps is generally considered prima facie obvious if the steps are already known and used in the prior art, see, In re Burhans, 154 F.2d 690, 69 USPQ 330 (CCPA 1946), which held that selecting any order of performing known steps is obvious; also see In re Gibson, 39 F.2d 975, 5 USPQ 230 (CCPA 1930) (Selection of any order of mixing ingredients is prima facie obvious) and Ex parte Rubin, 128 USPQ 440 (Bd. App. 1959), which held that reversing the order of the prior art process steps is obvious; see MPEP 2144.04 (IV)(C).
Therefore, it would have been obvious for one having skill in the art before the effective filing date of the claimed invention to reverse the order of the prior art process steps (5) and (6) from section “C.7 Subpicture sub-bitstream extraction process” since the steps are already known and used in the prior art.
As per claim 2, Bross discloses wherein the bitstream conforms to an order of a general sub-bitstream extraction process (see section “C.6 General sub-bitstream extraction process” on page 473) that is defined by a rule that specifies that the general sub-bitstream extraction process excludes an operation that removes all SEI NAL units, which satisfy a condition, from the output bitstream (page 473, step (9) under “C.6 General sub-bitstream extraction process”, Remove from outBitstream all SEI NAL units that contain a scalable nesting SEI message that has sn_ols_flag equal to 0 and there is no value in the list NestingLayerId equal to a value in the list LayerIdInOls[ targetOlsIdx ]).
As per claim 3, Bross discloses wherein the condition specifies that the SEI NAL unit comprises a scalable nesting SEI message comprising (a) a flag that is equal to zero and (b) there is no value in a first list of a first identifier equal to a value in a second list of a second identifier (page 473, step (9) under “C.6 General sub-bitstream extraction process”, Remove from outBitstream all SEI NAL units that contain a scalable nesting SEI message that has (a) sn_ols_flag equal to 0 and (b) there is no value in the list NestingLayerId equal to a value in the list LayerIdInOls[ targetOlsIdx ]).
As per claim 4, Bross discloses wherein the flag indicates whether a scalable-nested SEI message applies to a specific output layer set (see the definition of “sn_ols_flag” on page 494, sn_ols_flag equal to 1 specifies that the scalable-nested SEI messages apply to specific OLSs. sn_ols_flag equal to 0 specifies that the scalable-nested SEI messages apply to specific layers), wherein the first identifier is a nesting layer identifier (i.e., NestingLayerId, page 473, step (9) under “C.6 General sub-bitstream extraction process”), and wherein the second identifier is a layer identifier of a layer in an output layer set (i.e., LayerIdInOls[ targetOlsIdx ], page 473, step (9) under “C.6 General sub-bitstream extraction process”).
As per claim 5, Bross discloses wherein the flag is a sn_ols_flag (page 473, step (9) under “C.6 General sub-bitstream extraction process”, Remove from outBitstream all SEI NAL units that contain a scalable nesting SEI message that has sn_ols_flag equal to 0 and there is no value in the list NestingLayerId equal to a value in the list LayerIdInOls[ targetOlsIdx ]).
As per claim 6, Bross discloses wherein the first identifier is a NestingLayerId and the second identifier is a LayerIdInOls[targetOlsIdx] (page 473, step (9) under “C.6 General sub-bitstream extraction process”, Remove from outBitstream all SEI NAL units that contain a scalable nesting SEI message that has sn_ols_flag equal to 0 and there is no value in the list NestingLayerId equal to a value in the list LayerIdInOls[ targetOlsIdx ]).
As per claim 8, Bross discloses wherein the SEI NAL units are removed from the output bitstream due to at least one video coding layer (VCL) NAL unit being removed from the output bitstream (last two lines on page 474, step 5, When at least one VCL NAL unit has been removed by step 2, remove from outBitstream all SEI NAL units that contain scalable nesting SEI messages with sn_subpic_flag equal to 0).
As per claim 11, Bross discloses wherein the conversion comprises decoding the video from the bitstream (decoding process taught in section “Encoding process, decoding process, and use of VUI parameters and SEI messages” on page 1 and page 5, definition under (3.48)).
As per claim 12, Bross discloses wherein the conversion comprises encoding the video into the bitstream (encoding process taught in section “Encoding process, decoding process, and use of VUI parameters and SEI messages” on page 1 and page 5, definition under (3.52)).
9. Claim(s) 13-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Bross et al. “Versatile Video Coding (Draft 10)” JVET-S2001-vH in view of WANG (US 2014/0098894).
As per claims 13, arguments analogous to those applied for claim 1 are applicable for claim 13.
However, Bross does not explicitly disclose a processor and a non-transitory memory with instructions thereon, wherein the instructions upon execution by the processor, cause the processor to perform the claimed method.
In the same field of endeavor, WANG discloses a processor and a non-transitory memory with instructions thereon, wherein the instructions upon execution by the processor, cause the processor to perform a claimed method (paragraphs 0180-0181).
One of ordinary skill in the art, before the effective filing date of the claimed invention, would have been motivated to use the processor and memory of WANG to perform the encoding/decoding method of Bross, as known in the art, such a combination represents a mere combination of prior art elements, according to known methods, to yield a predictable result. This rationale applies to all combinations of Bross and WANG used in this Office Action unless otherwise noted.
As per claim 14, arguments analogous to those applied for claims 2-6 are applicable for claim 14.
As per claim 15, arguments analogous to those applied for claim 8 are applicable for claim 15.
As per claim 16, arguments analogous to those applied for claim 13 are applicable for claim 16.
As per claim 17, arguments analogous to those applied for claims 2-6 are applicable for claim 17.
As per claim 18, arguments analogous to those applied for claim 8 are applicable for claim 18.
As per claim 19, arguments analogous to those applied for claim 1 are applicable for claim 19; in addition, WANG discloses storing the bitstream (paragraph 0047).
As per claim 20, arguments analogous to those applied for claims 2-6 and 8 are appliable for claim 20.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOHAMMED JEBARI whose telephone number is (571)270-7945. The examiner can normally be reached M-F: 09:00am-06:00pm.
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/MOHAMMED JEBARI/Primary Examiner, Art Unit 2482