Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
This office action is in response to a continuation application filed in which claims 18-37 of the instant application are pending and ready for examination as of the preliminary amendment filed on 05/19/2025.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory obviousness-type double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the conflicting application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement.
Effective January 1, 1994, a registered attorney or agent of record may sign a terminal disclaimer. A terminal disclaimer signed by the assignee must fully comply with 37 CFR 3.73(b).
Claims 18, 24, 26-27, 33, and 35 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-14 of U.S. Patent No. 12,200,263 in view of Ramasubramonian (US 2015/0103884).
As to claim 18, claims 1 and 9 of U.S. Patent No. 12,200,263 teaches a method of encoding, comprising: generating a decoded picture buffer (DPB) syntax structure; and encoding the DPB syntax structure into a bitstream, wherein the bitstream comprises a video parameter set (VPS) and a sequence parameter set (SPS), wherein when the DPB syntax structure is comprised in the VPS, output layer sets (OLSs) to which the DPB syntax structure applies are specified by the VPS, and when the DPB syntax structure is comprised in the SPS, an OLS to which the DPB syntax structure applies comprises only one layer (see claims 1 and 9 of U.S. Patent No. 12,200,263).
Claims 1 and 9 of U.S. Patent No. 12,200,263 does not teach wherein the DPB syntax structure provides a DPB size, a maximum picture reorder number, and maximum latency information. However, Ramasubramonian teaches a DPB syntax structure that provides a DPB size, a maximum picture reorder number, and maximum latency information (see [0111]-[0139] and [0165]-[0181]). In Ramasubramonian’s disclosure, signaling syntax elements that indicate the maximum number of reorder pictures and the maximum latency for each layer in each output layer set may be redundant, potentially causing wastage of computing resources and/or network bandwidth. Therefore, signaling sub-DPB parameters for each layer in an output layer set may be redundant, as different values for sub-DPB parameters may not be possible. As such, it may be redundant to send reorder and/or latency information for each layer in an output layer set. To mitigate or eliminate inefficiencies and other potential issues caused by such redundancy of signaled data, video encoder and/or video decoder may implement one or more of the techniques described herein. Video encoder may be configured to signal one set of sub-DPB parameters for each output layer set corresponding to an operation point. The single set of sub-DPB parameters signaled for each output layer set is then used by video decoder for every respective layer in each output layer set. In this way, signaling efficiency is increased, as redundant signaling of sub-DPB parameters is avoided. In addition, the values of the sub-DPB parameters may be harmonized across all layers of an output layer set. For the output layer set of each operation point, video encoder may be configured to generate and signal, in the VPS, only one value (i.e., a single value) of a syntax element indicative of the maximum number of reorder pictures and only one value (i.e., a single value) a syntax element indicative of the maximum latency. That is, for each operation point relating to a particular VPS, video encoder generates one maximum number of reorder pictures syntax element and one maximum latency syntax element. Accordingly, the total number of reorder pictures syntax elements and maximum latency syntax elements in each VPS is dependent on the number of operation points defined for the video bitstream. As such, fewer instances of reorder pictures syntax elements and maximum latency syntax elements are singled compared to previous proposals to HEVC where the reorder pictures syntax elements and maximum latency syntax elements are signaled for each output layer set, each layer in the output layer set, and for each temporal sub-layer within each layer. The syntax element indicative of the maximum number of reorder pictures and the syntax element indicative of the maximum latency may be signaled in a DPB size table and may be transmitted in a VPS ([0111]-[0114]).
As such, it would have been obvious to any person of ordinary skill in the art before the effective filing date of the invention to combine the teachings in Ramasubramonian’s disclosure with the subject matter disclosed in claims 1 and 9 of U.S. Patent No. 12,200,263 to arrive at the claimed DPB syntax structure of the instant application providing a DPB size, a maximum picture reorder number, and maximum latency information in order to provide more flexibility and adaptability among the various coding techniques disclosed and implemented to be used in HEVC multi-layer video coding, resulting in overall improved performance for the HEVC video codecs.
As to claim 27, claims 1 and 9 of U.S. Patent No. 12,200,263 teaches a method of decoding, comprising: receiving a bitstream comprising a decoded picture buffer (DPB) syntax structure; and decoding the DPB syntax structure from the bitstream, wherein the bitstream comprises a video parameter set (VPS) and a sequence parameter set (SPS), wherein when the DPB syntax structure is comprised in the VPS, output layer sets (OLSs) to which the DPB syntax structure applies are specified by the VPS, and when the DPB syntax structure is comprised in the SPS, an OLS to which the DPB syntax structure applies comprises only one layer (see claims 1 and 9 of U.S. Patent No. 12,200,263).
Claims 1 and 9 of U.S. Patent No. 12,200,263 does not teach wherein the DPB syntax structure provides a DPB size, a maximum picture reorder number, and maximum latency information. However, Ramasubramonian teaches a DPB syntax structure that provides a DPB size, a maximum picture reorder number, and maximum latency information (see [0111]-[0139] and [0165]-[0181]). In Ramasubramonian’s disclosure, signaling syntax elements that indicate the maximum number of reorder pictures and the maximum latency for each layer in each output layer set may be redundant, potentially causing wastage of computing resources and/or network bandwidth. Therefore, signaling sub-DPB parameters for each layer in an output layer set may be redundant, as different values for sub-DPB parameters may not be possible. As such, it may be redundant to send reorder and/or latency information for each layer in an output layer set. To mitigate or eliminate inefficiencies and other potential issues caused by such redundancy of signaled data, video encoder and/or video decoder may implement one or more of the techniques described herein. Video encoder may be configured to signal one set of sub-DPB parameters for each output layer set corresponding to an operation point. The single set of sub-DPB parameters signaled for each output layer set is then used by video decoder for every respective layer in each output layer set. In this way, signaling efficiency is increased, as redundant signaling of sub-DPB parameters is avoided. In addition, the values of the sub-DPB parameters may be harmonized across all layers of an output layer set. For the output layer set of each operation point, video encoder may be configured to generate and signal, in the VPS, only one value (i.e., a single value) of a syntax element indicative of the maximum number of reorder pictures and only one value (i.e., a single value) a syntax element indicative of the maximum latency. That is, for each operation point relating to a particular VPS, video encoder generates one maximum number of reorder pictures syntax element and one maximum latency syntax element. Accordingly, the total number of reorder pictures syntax elements and maximum latency syntax elements in each VPS is dependent on the number of operation points defined for the video bitstream. As such, fewer instances of reorder pictures syntax elements and maximum latency syntax elements are singled compared to previous proposals to HEVC where the reorder pictures syntax elements and maximum latency syntax elements are signaled for each output layer set, each layer in the output layer set, and for each temporal sub-layer within each layer. The syntax element indicative of the maximum number of reorder pictures and the syntax element indicative of the maximum latency may be signaled in a DPB size table and may be transmitted in a VPS ([0111]-[0114]).
As such, it would have been obvious to any person of ordinary skill in the art before the effective filing date of the invention to combine the teachings in Ramasubramonian’s disclosure with the subject matter disclosed in claims 1 and 9 of U.S. Patent No. 12,200,263 to arrive at the claimed DPB syntax structure of the instant application providing a DPB size, a maximum picture reorder number, and maximum latency information in order to provide more flexibility and adaptability among the various coding techniques disclosed and implemented to be used in HEVC multi-layer video coding, resulting in overall improved performance for the HEVC video codecs.
As to claim 35, the aforementioned claim is rejected similarly as claim 18.
As to claims 24 and 33, claims 2-4 and 10-11 of U.S. Patent No. 12,200,263 discloses wherein the DPB syntax structure is designated dpb_parameters (see claims 2-4 and 10-11 of U.S. Patent No. 12,200,263).
As to claim 26, claims 6, 8, and 14 of U.S. Patent No. 12,200,263 discloses storing the bitstream (see claims 6, 8, and 14 of U.S. Patent No. 12,200,263).
Claims 18, 26-27, and 35 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-12 of U.S. Patent No. 12,096,034 in view of Ramasubramonian.
As to claim 18, claims 1 and 8 of U.S. Patent No. 12,096,034 teaches a method of encoding, comprising: generating a decoded picture buffer (DPB) syntax structure; and encoding the DPB syntax structure into a bitstream, wherein the bitstream comprises a video parameter set (VPS) and a sequence parameter set (SPS), wherein when the DPB syntax structure is comprised in the VPS, output layer sets (OLSs) to which the DPB syntax structure applies are specified by the VPS, and when the DPB syntax structure is comprised in the SPS, an OLS to which the DPB syntax structure applies comprises only one layer (see claims 1 and 8 of U.S. Patent No. 12,096,034).
Claims 1 and 8 of U.S. Patent No. 12,096,034 does not teach wherein the DPB syntax structure provides a DPB size, a maximum picture reorder number, and maximum latency information. However, Ramasubramonian teaches a DPB syntax structure that provides a DPB size, a maximum picture reorder number, and maximum latency information (see [0111]-[0139] and [0165]-[0181]). In Ramasubramonian’s disclosure, signaling syntax elements that indicate the maximum number of reorder pictures and the maximum latency for each layer in each output layer set may be redundant, potentially causing wastage of computing resources and/or network bandwidth. Therefore, signaling sub-DPB parameters for each layer in an output layer set may be redundant, as different values for sub-DPB parameters may not be possible. As such, it may be redundant to send reorder and/or latency information for each layer in an output layer set. To mitigate or eliminate inefficiencies and other potential issues caused by such redundancy of signaled data, video encoder and/or video decoder may implement one or more of the techniques described herein. Video encoder may be configured to signal one set of sub-DPB parameters for each output layer set corresponding to an operation point. The single set of sub-DPB parameters signaled for each output layer set is then used by video decoder for every respective layer in each output layer set. In this way, signaling efficiency is increased, as redundant signaling of sub-DPB parameters is avoided. In addition, the values of the sub-DPB parameters may be harmonized across all layers of an output layer set. For the output layer set of each operation point, video encoder may be configured to generate and signal, in the VPS, only one value (i.e., a single value) of a syntax element indicative of the maximum number of reorder pictures and only one value (i.e., a single value) a syntax element indicative of the maximum latency. That is, for each operation point relating to a particular VPS, video encoder generates one maximum number of reorder pictures syntax element and one maximum latency syntax element. Accordingly, the total number of reorder pictures syntax elements and maximum latency syntax elements in each VPS is dependent on the number of operation points defined for the video bitstream. As such, fewer instances of reorder pictures syntax elements and maximum latency syntax elements are singled compared to previous proposals to HEVC where the reorder pictures syntax elements and maximum latency syntax elements are signaled for each output layer set, each layer in the output layer set, and for each temporal sub-layer within each layer. The syntax element indicative of the maximum number of reorder pictures and the syntax element indicative of the maximum latency may be signaled in a DPB size table and may be transmitted in a VPS ([0111]-[0114]).
As such, it would have been obvious to any person of ordinary skill in the art before the effective filing date of the invention to combine the teachings in Ramasubramonian’s disclosure with the subject matter disclosed in claims 1 and 8 of U.S. Patent No. 12,096,034 to arrive at the claimed DPB syntax structure of the instant application providing a DPB size, a maximum picture reorder number, and maximum latency information in order to provide more flexibility and adaptability among the various coding techniques disclosed and implemented to be used in HEVC multi-layer video coding, resulting in overall improved performance for the HEVC video codecs.
As to claim 27, claims 1 and 8 of U.S. Patent No. 12,096,034 teaches a method of decoding, comprising: receiving a bitstream comprising a decoded picture buffer (DPB) syntax structure; and decoding the DPB syntax structure from the bitstream, wherein the bitstream comprises a video parameter set (VPS) and a sequence parameter set (SPS), wherein when the DPB syntax structure is comprised in the VPS, output layer sets (OLSs) to which the DPB syntax structure applies are specified by the VPS, and when the DPB syntax structure is comprised in the SPS, an OLS to which the DPB syntax structure applies comprises only one layer (see claims 1 and 8 of U.S. Patent No. 12,096,034).
Claims 1 and 8 of U.S. Patent No. 12,096,034 does not teach wherein the DPB syntax structure provides a DPB size, a maximum picture reorder number, and maximum latency information. However, Ramasubramonian teaches a DPB syntax structure that provides a DPB size, a maximum picture reorder number, and maximum latency information (see [0111]-[0139] and [0165]-[0181]). In Ramasubramonian’s disclosure, signaling syntax elements that indicate the maximum number of reorder pictures and the maximum latency for each layer in each output layer set may be redundant, potentially causing wastage of computing resources and/or network bandwidth. Therefore, signaling sub-DPB parameters for each layer in an output layer set may be redundant, as different values for sub-DPB parameters may not be possible. As such, it may be redundant to send reorder and/or latency information for each layer in an output layer set. To mitigate or eliminate inefficiencies and other potential issues caused by such redundancy of signaled data, video encoder and/or video decoder may implement one or more of the techniques described herein. Video encoder may be configured to signal one set of sub-DPB parameters for each output layer set corresponding to an operation point. The single set of sub-DPB parameters signaled for each output layer set is then used by video decoder for every respective layer in each output layer set. In this way, signaling efficiency is increased, as redundant signaling of sub-DPB parameters is avoided. In addition, the values of the sub-DPB parameters may be harmonized across all layers of an output layer set. For the output layer set of each operation point, video encoder may be configured to generate and signal, in the VPS, only one value (i.e., a single value) of a syntax element indicative of the maximum number of reorder pictures and only one value (i.e., a single value) a syntax element indicative of the maximum latency. That is, for each operation point relating to a particular VPS, video encoder generates one maximum number of reorder pictures syntax element and one maximum latency syntax element. Accordingly, the total number of reorder pictures syntax elements and maximum latency syntax elements in each VPS is dependent on the number of operation points defined for the video bitstream. As such, fewer instances of reorder pictures syntax elements and maximum latency syntax elements are singled compared to previous proposals to HEVC where the reorder pictures syntax elements and maximum latency syntax elements are signaled for each output layer set, each layer in the output layer set, and for each temporal sub-layer within each layer. The syntax element indicative of the maximum number of reorder pictures and the syntax element indicative of the maximum latency may be signaled in a DPB size table and may be transmitted in a VPS ([0111]-[0114]).
As such, it would have been obvious to any person of ordinary skill in the art before the effective filing date of the invention to combine the teachings in Ramasubramonian’s disclosure with the subject matter disclosed in claims 1 and 8 of U.S. Patent No. 12,096,034 to arrive at the claimed DPB syntax structure of the instant application providing a DPB size, a maximum picture reorder number, and maximum latency information in order to provide more flexibility and adaptability among the various coding techniques disclosed and implemented to be used in HEVC multi-layer video coding, resulting in overall improved performance for the HEVC video codecs.
As to claim 35, the aforementioned claim is rejected similarly as claim 18.
As to claim 26, claims 7 and 12 of U.S. Patent No. 12,096,034 discloses storing the bitstream (see claims 7 and 12 of U.S. Patent No. 12,096,034).
Allowable Subject Matter
The closest prior art made of record in regards to applicant’s claimed invention is as follows:
Wang (US 2015/0373361) discloses systems and methods for encoding a decoding video data. The method for decoding video data can include receiving a bitstream having a plurality of layers of video data. The plurality of layers of video data can include a base layer and a video parameter set (VPS). The VPS can indicate a plurality of output layer sets (OLS) and profile, tier, and level (PTL) information for each OLS of the plurality of OLSs, including the 0.sup.th OLS. The method for decoding can also include selecting an OLS from the one or more layers as a target OLS, and decoding the target OLS based on PTL information signaled in the VPS (abstract).
Wang-II (US 2015/0373346) discloses devices and methods for processing video data. The method can include extracting an output operation point from received video data. If the output operation point corresponds to one of an entire bitstream and a temporal subset of the entire bitstream with only the base layer as output, the method can include performing a first bitstream conformance test. If the output operation point corresponds to one of a layer set specified by a base video parameter set (VPS) of an active VPS and a temporal subset of the layer set with only the base layer to be output, the method can include performing a second bitstream conformance test. If the output operation point corresponds to one of an output layer set (OLS) specified by a VPS extension of the active VPS and a temporal subset of the OLS, the method can include performing a third bitstream conformance test (abstract).
Tsukuba (US 2017/0019673) discloses an image decoding device and an image decoding method in which hierarchy coding data obtained by hierarchically coding an image is decoded. According to an aspect of the present invention, in an output layer set, decoding processing of a non-output and non-reference layer is omitted, and thus a processing amount and a memory size required for decoding the non-output and non-reference layer can be reduced (abstract and [0001]).
Tsukuba-II (US 2017/0006300) discloses an image decoding apparatus that decodes hierarchically coded data where images are hierarchically coded, and to an image coding apparatus that generates hierarchically coded data by hierarchically coding images. In a conventional art, an output layer set having no output layer is sometimes defined. Consequently, even if the decoder decodes a bit stream to obtain each layer in the output layer set without the output layer, there is no picture to be outputted. There is a possibility that such coded data causes the decoder expecting an output to operate unexpectedly. Output layer sets having the same configuration may be defined. Consequently, the amount of code pertaining to the output layer sets defined in an overlapping manner is redundant. According to an aspect of the present invention, specification of a bit stream conformance pertaining to the output layer set prevents occurrence of an output layer set without an output layer and a redundant output layer set (abstract and [0002]).
Choi (US 2021/0092426) discloses a method, computer program, and computer system for signaling output layer sets in a coded video stream. Video data having multiple layers is received. One or more syntax elements are identified. The syntax elements specify one or more output layer sets corresponding to output layers from among the multiple layers of the received video data. The one or more output layers corresponding to the specified output layer sets are decoded and displayed (abstract).
Ramasubramonian (US 2015/0103884) discloses a DPB syntax structure that provides a DPB size, a maximum picture reorder number, and maximum latency information (see [0111]-[0139] and [0165]-[0181]).
The closest prior art of record, considered individually or in combination, fails to teach or reasonably suggest all the claimed features of claims 18, 27, and 35, structurally and functionally interconnected with other limitations in the manner as cited in the claims and dependent claims.
The independent claims are particularly interpreted based on [0143]-[0145], [0223], [0251], [0255], and [0259] of applicant’s specification and FIG. 7 of applicant’s drawings.
Claims 19-23, 25, 28-32, 34, and 36-37 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
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/ZHIHAN ZHOU/Primary Examiner, Art Unit 2482