DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This Office Action is responsive to communication(s) filed on 11/22/2024. Claims 1-20 have been examined and are pending in this application.
Information Disclosure Statement
The information disclosure statement (IDS) was submitted on 11/26/2024. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2 and 16-19 are rejected under 35 U.S.C. 103 as being unpatentable over Klughart US 2014/0310441 (“Klughart”) in view of Srivastava US 2018/0189222 (“Srivastava”).
As per independent claim 1, Klughart teaches A hub device (“Primary Master/Secondary Slave daisy-chain PTDDC [Pass-Thru Disk Drive Controller] string as generally illustrated in FIG. 61 (6100).” Para 0457), comprising:
a upstream-facing port coupled to a host device and receiving specific data from the host device (“the master drive (6114) is located closest to the host (6111) in the PTDDC string.” Para 0457 and FIG. 61);
a first downstream-facing port coupled to a first storage device (“the master drive (6114)” para 0457 and FIG. 61);
a second downstream-facing port coupled to a second storage device (“downstream slave disk drive (6115).” Para 0457 and FIG. 61);
wherein: in a mirror mode, the control circuit copies data in the first storage device to the second storage device (“For situations in which the slave drive (6115) is … initially mirrored by the master disk (6114)… data must be copied from the master disk drive (6114) to the downstream slave disk drive (6115).” Para 0457 and FIG. 61) or a memory.
Klughart discloses all of the claim limitations from above, but does not explicitly teach “a control chip, comprising: a first transceiver interface coupled to the upstream-facing port; a second transceiver interface coupled to the first downstream-facing port; a third transceiver interface coupled to the second downstream-facing port; and a control circuit coupled to the first, second, and third transceiver interfaces”.
However, in an analogous art in the same field of endeavor, Srivastava teaches a control chip (“host/device repeater 130” para 0029 and FIG. 1A), comprising: a first transceiver interface coupled to the upstream-facing port (“Host/device repeater 130 … includes very high speed serial bus transceiver port 142,” para 0029 and FIG. 1A);
a second transceiver interface coupled to the first downstream-facing port (“Host/device repeater 130 … USB serial bus ports 144 (144A, 144B, . . . 144N),” para 0029 and FIG. 1A);
a third transceiver interface coupled to the second downstream-facing port (“Host/device repeater 130 … USB serial bus ports 144 (144A, 144B, . . . 144N),” para 0029 and FIG. 1A);
a control circuit coupled to the first, second, and third transceiver interfaces (“Host/device repeater 130 … includes … repeater lane controller 140,” para 0029 and FIG. 1A).
Given the teaching of Srivastava, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to further modify the scope of the invention of Klughart with “a control chip, comprising: a first transceiver interface coupled to the upstream-facing port; a second transceiver interface coupled to the first downstream-facing port; a third transceiver interface coupled to the second downstream-facing port; and a control circuit coupled to the first, second, and third transceiver interfaces”. The motivation would be that the invention may provide for reduced pin counts and associated costs in systems, para 0027 of Srivastava.
As per dependent claim 2, Klughart in combination with Srivastava discloses the device of claim 1. Klughart may not explicitly disclose, but Srivastava teaches wherein the memory is independent of the control chip (“System 700 includes processor 705 and system memory 710” para 0070 and FIG. 7).
The same motivation that was utilized for combining Klughart and Srivastava as set forth in claim 1 is equally applicable to claim 2.
As per independent claim 16, this claim is rejected based on arguments provided above for similar rejected independent claim 1.
As per dependent claim 17, Klughart in combination with Srivastava discloses the system of claim 16. Klughart teaches wherein the connection port and the upstream-facing port are local area network (LAN) connection ports, and the host device is an access point and coupled to an internet (“The microcontroller (3112) executes machine instructions from a boot ROM (3113) that may be loaded over an Ethernet/Internet connection.” Para 0383).
As per dependent claim 18, Klughart in combination with Srivastava discloses the system of claim 17. Klughart teaches wherein the first storage device is a first flash, and the second storage device is a second flash (“FIG. 45 illustrates an exemplary asymmetric access RAID-1 storage array utilizing SSDs and a conventional SATA hard drive and depicts asymmetric simultaneous WRITE operations to the drives in the asymmetric RAID-1 pairing” para 0108).
As per dependent claim 19, Klughart in combination with Srivastava discloses the system of claim 18. Klughart teaches further comprising: an electronic device coupled to the internet and connected to the hub device via the host device (“The microcontroller (3112) executes machine instructions from a boot ROM (3113) that may be loaded over an Ethernet/Internet connection.” Para 0383).
Allowable Subject Matter
Claims 3-15 and 20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Reasons for Allowance
The following is an examiner’s statement of reasons for allowance.
After careful considerations, examination and search of the claimed invention, the closest prior art of record does not teach or anticipate the claimed feature of dependent claim 3 “wherein: the control circuit detects whether a trigger event occurs, in response to the trigger event occurring, the control circuit enters the mirror mode, in response to the trigger event not occurring, the control circuit enters a hub mode” in combination with the overall claimed limitations when interpreted in light of the specification.
Klughart and Srivastava are believed to be the closest prior art for dependent claim 3. However, Klughart alone or in any combination with Srivastava does not teach “wherein: the control circuit detects whether a trigger event occurs, in response to the trigger event occurring, the control circuit enters the mirror mode, in response to the trigger event not occurring, the control circuit enters a hub mode”. Therefore, claim 3 is patentable.
Claims 4-14 directly or indirectly depend from claim 3 and these claims are allowable by virtue of their dependency.
After careful considerations, examination and search of the claimed invention, the closest prior art of record does not teach or anticipate the claimed feature of dependent claim 15 “wherein: in the mirror mode: in response to the host device selecting the second storage device as a target memory, the control circuit copies data in the first storage device to the second storage device, in response to the host device selecting the memory as the target memory, the control circuit copies the data in the first storage device to the memory” in combination with the overall claimed limitations when interpreted in light of the specification.
Klughart and Srivastava are believed to be the closest prior art for dependent claim 15. However, Klughart alone or in any combination with Srivastava does not teach “wherein: in the mirror mode: in response to the host device selecting the second storage device as a target memory, the control circuit copies data in the first storage device to the second storage device, in response to the host device selecting the memory as the target memory, the control circuit copies the data in the first storage device to the memory”. Therefore, claim 15 is patentable.
Dependent claim 20 includes similar language as dependent claim 15 and this claim is patentable for the same reason.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ZUBAIR AHMED whose telephone number is (571)272-1655. The examiner can normally be reached 7:30AM - 5:00PM EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, HOSAIN T. ALAM can be reached at (571) 272-3978. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ZUBAIR AHMED/Examiner, Art Unit 2132
/HOSAIN T ALAM/Supervisory Patent Examiner, Art Unit 2132