Office Action Predictor
Last updated: April 16, 2026
Application No. 18/956,425

Memory Access Method and Related Device

Non-Final OA §102§103
Filed
Nov 22, 2024
Examiner
BENNER, JANE WEI
Art Unit
2139
Tech Center
2100 — Computer Architecture & Software
Assignee
Huawei Technologies Co., LTD.
OA Round
1 (Non-Final)
84%
Grant Probability
Favorable
1-2
OA Rounds
2y 6m
To Grant
91%
With Interview

Examiner Intelligence

Grants 84% — above average
84%
Career Allow Rate
249 granted / 298 resolved
+28.6% vs TC avg
Moderate +7% lift
Without
With
+7.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
15 currently pending
Career history
313
Total Applications
across all art units

Statute-Specific Performance

§101
2.6%
-37.4% vs TC avg
§103
49.3%
+9.3% vs TC avg
§102
18.0%
-22.0% vs TC avg
§112
23.0%
-17.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 298 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. Claim Objections Claim 11 is objected to because of the following informalities: the claim should be amended to recite --determining the first mapping relationship further comprises whether a first data size of first access data corresponding to the sender virtual address or a second data size of second access data corresponding to the receiver virtual address is greater than a preset threshold--. Appropriate correction is required. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-2, 7-8. 14-15 and 20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Zhao et al. (WO 2016/101288 A1) hereinafter Zhao et al. Regarding claim 1, Zhao et al. teaches a method implemented by a receiver (a first computing device with a first processing node and first memory node Page 8, Lines 11-14) and comprising: receiving, from a sender (from a second processing node of a second computing device), a memory access message comprising a sender virtual address of the sender and a receiver virtual address of the receiver (second compute device encapsulates an RDMA copy operation message, where the RDMA copy operation message carries the first node identifier, first storage identifier (i.e., receiver virtual address) and second storage identifier used to indicate a memory address of data for the RDMA write operation in the second memory node (i.e., sender virtual address) Page 2, Lines 34-37 and Page 8, Lines 15-20); and accessing a first memory of the sender based on a sender physical address of the sender (second storage identifier includes a second virtual address configured to identify a virtual address of the data and determining, in conjunction with the second virtual address, the physics of the data for the RDMA write operation in the second memory node Page 8, Lines 4-11), a receiver physical address of the receiver (the first storage identifier includes a first virtual address for receiving the RDMA write operation Page 8, Lines 39-42), a first mapping relationship mapping the sender virtual address to the sender physical address (see above), and a second mapping relationship mapping the receiver virtual address to the receiver physical address (determining, in conjunction with the first virtual address, a physics of a storage unit of the first memory node for receiving an RDMA write operation address Page 8, Line 44 to Page 9, Line 1). Regarding claim 2, Zhao et al. teaches all of the features with respect to claim 1, as outlined above. Zhao et al. further teaches wherein accessing the first memory comprises fetching data corresponding to the sender virtual address into the receiver virtual address (the RDMA copy operation copies data from the second processing node into the identified first storage node Page 8, Lines 11-27). Regarding claim 7, Zhao et al. teaches all of the features with respect to claim 1, as outlined above. Zhao et al. teaches further comprising determining the second mapping relationship (determining, in conjunction with the first virtual address, a physics of a storage unit of the first memory node for receiving an RDMA write operation address Page 8, Line 44 to Page 9, Line 1). Claims 8 and 14 are rejected under 35 USC 102(a)(1) for the same reasons as claim 1, as outlined above. Regarding claim 15, Zhao et al. teaches all of the features with respect to claim 14, as outlined above. Zhao et al. further teaches wherein the one or more processors are further configured to execute the program code to cause the receiver to access the first memory by fetching data corresponding to the sender virtual address into the receiver virtual address (the RDMA copy operation copies data from the second processing node into the identified first storage node Page 8, Lines 11-27). Claim 20 is rejected under 35 USC 103 for the same reasons as claim 7, as outlined above. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 3 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Zhao et al. in view of Tanimoto (US 2015/0220481 A1) hereinafter Tanimoto. Regarding claim 3, Zhao et al. teaches all of the features with respect to claim 1, as outlined above. Zhao et al. does not appear to explicitly teach, however, Tanimoto teaches further comprising allocating, after receiving the memory access message, when the receiver virtual address is in a page fault state, and when access data make up an entire page, a new page in a second memory of the receiver for writing the access data (the RDMA module determines whether a page has been allocated, and if not, the RDMA module notifies the OS that a page fault has occur and in response to the occurrence of the page fault, the OS registers the association information Paragraph [0105]). The disclosures of Zhao et al. and Tanimoto, hereinafter ZT, are analogous art to the claimed invention because they are in the same field of endeavor of RDMA operations and/or mapping relationships. Therefore, it would have been obvious to one of ordinary skill in the art, having the teachings of ZT before the effective filing date of the invention, to modify the teachings of Zhao et al. by including allocating, after receiving the memory access message, when the receiver virtual address is in a page fault state, and when access data make up an entire page, a new page in a second memory of the receiver for writing the access data, as taught by Tanimoto. One of ordinary skill in the art would have been motivated to allocate a new page when the address is in a page fault state in order to resolve the page fault and allow the data transmission to be performed. Regarding claim 16, Zhao et al. teaches all of the features with respect to claim 15, as outlined above. Zhao et al. does not appear to explicitly teach, however, Tanimoto teaches wherein the one or more processors are further configured to execute the program code to cause the receiver to allocate, after receiving the memory access message, when the receiver virtual address is in a page fault state, and when access data make up an entire page, a new page in a second memory of the receiver for writing the access data (the RDMA module determines whether a page has been allocated, and if not, the RDMA module notifies the OS that a page fault has occur and in response to the occurrence of the page fault, the OS registers the association information Paragraph [0105]). The disclosures of Zhao et al. and Tanimoto, hereinafter ZT, are analogous art to the claimed invention because they are in the same field of endeavor of RDMA operations and/or mapping relationships. Therefore, it would have been obvious to one of ordinary skill in the art, having the teachings of ZT before the effective filing date of the invention, to modify the teachings of Zhao et al. by including allocating, after receiving the memory access message, when the receiver virtual address is in a page fault state, and when access data make up an entire page, a new page in a second memory of the receiver for writing the access data, as taught by Tanimoto. One of ordinary skill in the art would have been motivated to allocate a new page when the address is in a page fault state in order to resolve the page fault and allow the data transmission to be performed. Claim(s) 4 and 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Zhao et al. in view of Kliteynik et al. (US 2016/0294983 A1) hereinafter Kliteynik et al. Regarding claim 4, Zhao et al. teaches all of the features with respect to claim 1, as outlined above. Zhao et al. does not appear to explicitly teach, however, Lentini teaches wherein accessing the first memory comprises writing access data corresponding to the receiver virtual address into the sender virtual address (the RDMA request could be a swapping operation, that is, in addition to a faulted page being swapped in (i.e., writing data from a sender VA to a receiver VA), a block swap operation is performed where a page is swapped out and the write request packets specify the address in remote allocation to where the data is to be written Paragraphs [0032]-[0036]). The disclosures of Zhao et al. and Kliteynik et al., hereinafter ZK, are analogous art to the claimed invention because they are in the same field of endeavor of RDMA operations and/or mapping relationships. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of ZK before them, to modify the teachings of Zhao et al. to include the teachings of Kliteynik et al. since both ZK teach mapping relationships between a receiver and sender. Therefore it is applying a known technique (the write operation is a swapping operation where a chosen page is swapped out to remote storage [0032]-[0036]) to a known device (using mapping relationships of a receiver and sender during RDMA operations of Zhao et al.) ready for improvement to yield predictable results (a chosen page, such as an LRU page, is swapped out to the sender VA [0032]-[0036]), KSR, MPEP 2143. Claim 17 is rejected under 35 USC 103 for the same reasons as claim 14, as outlined above. Claim(s) 5-6, 9-10 and 18-19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Zhao et al. in view of Zou et al. (US 2012/0233248 A1) hereinafter Zou et al. Regarding claim 5, Zhao et al. teaches all of the features with respect to claim 1, as outlined above. Zhao et al. does not appear to explicitly teach, however, Zou et al. teaches further comprising unbinding, after accessing the first memory, the second mapping relationship (a receiving server correctly executes the script and the load balancer deletes the connection mapping relationship to the server list, namely, releasing all resources corresponding to the connection mapping relationship Paragraph [0047]). The disclosures of Zhao et al. and Zou et al., hereinafter ZZ, are analogous art to the claimed invention because they are in the same field of endeavor of RDMA operations and/or mapping relationships. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of ZZ before them, to modify the teachings of Zhao et al. to include the teachings of Zou et al. since both ZZ teach mapping relationships between a receiver and sender. Therefore it is applying a known technique (deleting the connection relationship between a requester and server performing the execution [0047] of Zou et al.) to a known device (using mapping relationships of a receiver and sender during RDMA operations of Zhao et al.) ready for improvement to yield predictable results (the mapping relationship between two entities are deleted of Zou et al.), KSR, MPEP 2143. Regarding claim 6, ZZ teaches all of the features with respect to claim 5, as outlined above. Zou et al. teaches further comprising sending, after accessing the first memory, an access complete message to the sender to prompt the sender to unbind the first mapping relationship (the receiving server capable of executing the script returns a response message indicating successful execution, and after receiving such message, the balance forwards the message to the request end according to the mapping relationship information to delete the connection mapping relationship Paragraph [0047]). Regarding claim 9, Zhao et al. teaches all of the features with respect to claim 8, as outlined above. Zhao et al. does not appear to explicitly teach, however, Zou et al. teaches further comprising receiving, after sending the memory access message, an access complete message from the receiver (the receiving server capable of executing the script returns a response message indicating successful execution, and after receiving such message, the balance forwards the message to the request end according to the mapping relationship information to delete the connection mapping relationship Paragraph [0047]). The disclosures of Zhao et al. and Zou et al., hereinafter ZZ, are analogous art to the claimed invention because they are in the same field of endeavor of RDMA operations and/or mapping relationships. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of ZZ before them, to modify the teachings of Zhao et al. to include the teachings of Zou et al. since both ZZ teach mapping relationships between a receiver and sender. Therefore it is applying a known technique (deleting the connection relationship between a requester and server performing the execution [0047] of Zou et al.) to a known device (using mapping relationships of a receiver and sender during RDMA operations of Zhao et al.) ready for improvement to yield predictable results (the mapping relationship between two entities are deleted of Zou et al.), KSR, MPEP 2143. Regarding claim 10, ZZ teaches all of the features with respect to claim 9, as outlined above. Zou et al. teaches further comprising unbinding the first mapping relationship in response to the access complete message (a receiving server correctly executes the script and the load balancer deletes the connection mapping relationship to the server list, namely, releasing all resources corresponding to the connection mapping relationship Paragraph [0047]). Claim 18 is rejected under 35 USC 103 for the same reasons as claim 5, as outlined above. Claim 19 is rejected under 35 USC 103 for the same reasons as claim 6, as outlined above. Claim(s) 11-13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Zhao et al. in view of Sugumar et al. (US 2010/0232448 A1) hereinafter Sugumar et al. Regarding claim 11, ZS teaches all of the features with respect to claim 8, as outlined above. Zhao et al. does not appear to explicitly teach, however, Sugumar et al. teaches further comprising determining the first mapping relationship whether a first data size of first access data corresponding to the sender virtual address or a second data size of second access data corresponding to the receiver virtual address is greater than a preset threshold (when a requesting node requests data and the request size is less than a threshold, the HWT performs an RDMA write to the buffer up to a provided size Paragraph [0145]). The disclosures of Zhao et al. and Sugumar et al., hereinafter ZS, are analogous art to the claimed invention because they are in the same field of endeavor of RDMA operations and/or mapping relationships. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of ZS before them, to modify the teachings of Zhao et al. to include the teachings of Sugumar et al. since both ZS teach mapping relationships between a receiver and sender. Therefore it is applying a known technique (comparing requested data size of a receiver to a threshold [0145] of Sugumar et al.) to a known device (using mapping relationships of a receiver and sender during RDMA operations of Zhao et al.) ready for improvement to yield predictable results (a data size of the receiver is compared to a threshold Paragraph [0145]), KSR, MPEP 2143. Regarding claim 12, ZS teaches all of the features with respect to claim 11, as outlined above. Sugumar et al. teaches further comprising determining the first mapping relationship when the first data size or the second data size is greater than the preset threshold (when the request arrives and the request size is greater than a threshold, then the software completes the request Paragraphs [0142], [0146]. It further is noted that this claim limitation recites contingent language and is not required by the claim under the broadest reasonable interpretation). Regarding claim 13, Zhao et al. teaches all of the features with respect to claim 11, as outlined above. Sugumar et al. teaches further comprising copying the first access data to a send buffer of the sender when a data size of the access data is not greater than the preset threshold (when a requesting node requests data and the request size is less than a threshold, the HWT performs an RDMA write to the buffer up to a provided size Paragraph [0145]. It further is noted that this claim limitation recites contingent language and is not required by the claim under the broadest reasonable interpretation). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JANE W BENNER whose telephone number is (571)270-0067. The examiner can normally be reached Mon - Thurs (8 AM - 5 PM). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, REGINALD BRAGDON can be reached at (571) 272-4204. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. JANE W. BENNER Primary Examiner Art Unit 2131 /JANE W BENNER/Primary Examiner, Art Unit 2139
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Prosecution Timeline

Nov 22, 2024
Application Filed
Dec 26, 2025
Non-Final Rejection — §102, §103
Mar 13, 2026
Response Filed

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
84%
Grant Probability
91%
With Interview (+7.1%)
2y 6m
Median Time to Grant
Low
PTA Risk
Based on 298 resolved cases by this examiner. Grant probability derived from career allow rate.

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