DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Ma et al. (USPN 8,717,835).
Examiner’s Markup of Fig. 5 of Ma et al.
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With respect to claim 1, Ma et al. discloses, in Figs. 1, 2, 5, 6 and 10, a clock generating circuit (Fig. 1, details discloses in Figs. 2, 5, 6 and 10) comprising:
a buffer circuit (at least two of 234/244 of 230 and 240 of Fig. 2 within 134 of Fig. 1. See at least two of 512 of 510 and 520 of Fig. 5, i.e., I1 and I2 of Examiner’s markup which disclose the details of 234/230) configured to non-invert an input clock signal (one of CLKBUF/CLKFB and/or at least one of the inputs of 234(0 to S)/244(0 to S), e.g., I1 and I2 of Examiner’s markup produce an non-inverted DOUT that is a buffered version of DIN) to generate an output clock signal (at least one of the outputs of 234(0 to S)/244(0 to S));
a voltage control circuit (250/260 of Fig. 2 further details disclosed in Figs. 9 and/or 10) configured to detect a voltage level change of a power voltage (see Col. 7 lines 25-34 and Col. 10 lines 10-18 and 34-38) and configured to generate a first control voltage (BIASN of Fig. 9/10) and a second control voltage (BIASP of Fig. 9/10); and
an first tri-state inverter (at least one of the inverters of 516 which are the details of each 234/244 of Fig. 2, see First and second Tri-state Inverter, T1 and T2 of Examiner’s markup. Furthermore, further details of the construction of each 516 and each 520 disclosed in Fig. 6, i.e., 610 with 630 and 620 is equivalent to each 516. As can be seen in Fig. 6 T1 and T2 are tri-state inverters connected in operative in the same fashion as Applicant’s tri-state inverter of Fig. 4) configured to invert the output clock signal (T1 inverts DOUT, e.g., the output clock signal) based on the first control voltage (BIASN suppled to each 516), and the second control voltage (BIASP supplied to each 516) to generate a feedback signal (e.g., output of T2), and to provide the feedback signal to the input clock signal (T2 provides the feedback signal to the input clock, e.g., DIN).
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claim 1 rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of U.S. Patent No. 12,189,416 (‘416 hereinafter) in view of Ma et al. (USPN 8,717,835).
Claim 1 is substantially similar to that of claim 1 of ‘416, however claim 1 of the instant application requires less functional limitations such as “the first control voltage and the second control voltage having varying voltage levels according to the detected voltage level change”, “using a single inversion stage” and the like. It would have been obvious to remove such functional limitations and/or elements for providing such functionality from the circuit of claim 1 of ‘416, since it has been held that omission of an element and its function in a combination where the remaining elements perform the same functions as before involves only routine skill in the art. In re Karlson, 136 USPQ 184. One would have been motivated to do so for the purposes of simplifying circuit construction.
Claim 1 further differs from claim 1 of ‘416 since claim 1 of the instant invention requires a “tri-state inverter” that essentially provides the operations of the “compensating circuit” of claim 1 of ‘416, wherein ‘416 does not require the “tri-state inverter”. However, it would have been obvious to one of ordinary skill in the art to use a tri-state inverter to provide the inversion and operation of the “compensating circuit”. This is further evidenced by Ma et al. which discloses the circuitry of claim 1 (see above rejection under 35 USC section 102). It would have been obvious to use a tri-state inverter to provide the recited operation of the ‘compensating circuit” of claim 1 of ‘416, as evidenced by Ma et al., for the purpose of having a specific circuit that is capable of providing the claimed operations and having a circuit element that provides for power supply voltage correction.
Allowable Subject Matter
Claims 2-4 and 8-10 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 4-7 are allowed.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Thomas J. Hiltunen whose telephone number is (571)272-5525. The examiner can normally be reached 9:00AM-5:30PM EST M-F.
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/THOMAS J. HILTUNEN/Primary Examiner, Art Unit 2849