DETAILED ACTION
Notice of Pre-AIA or AIA Status
1. The present application is being examined under the pre-AIA first to invent provisions.
Status of Claims
2. Claims 1-20 are presented for examination.
Abstract
3. The abstract of the disclosure is acceptable for examination purposes.
Oath Declaration
4. The Oath complies with all the requirements set forth in MPEP 602 and therefore is accepted.
Drawings
5. The drawings received on 11/22/2024 are acceptable for examination purposes.
Information Disclosure Statement
6. The references listed in the information disclosure statement (IDS) submitted on 11/22/2024 have been considered. The submission complies with the provisions of 37 CFR 1.97. Form PTO- 1449 is signed and attached hereto.
Drawings
7. The drawings are objected to because figures 1-23 should be designated by a legend such as “Prior Art” since the figures have been described in the background of the applicant’s application.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 103
The following is a quotation of pre-AIA 35 U.S.C. 103(a) which forms the basis for all obviousness rejections set forth in this Office action:
(a) A patent may not be obtained though the invention is not identically disclosed or described as set forth in section 102, if the differences between the subject matter sought to be patented and the prior art are such that the subject matter as a whole would have been obvious at the time the invention was made to a person having ordinary skill in the art to which said subject matter pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under pre-AIA 35 U.S.C. 103(a) are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
8. Claim 1-9 and 11-19 is/are rejected under pre-AIA 35 U.S.C. 103(a) as being unpatentable over Whetsel (US 2008/0250287 A1) in view of Halstvedt et al. (US 2009/0249136 A1).
As per claim 1:
Whetsel substantially teaches or discloses a device comprising (see Fig. 50, merged architecture 4904) : a test clock (TCK) input (see Fig. 50, TCK input); a test mode select (TMS) input (see Fig. 50, TMS input); a test data in (TDI) input (see Fig. 50, TDI input); a test data out (TDO) output (see Fig. 50, TDO output); an instruction register (see Fig. 50, instruction register 314) coupled to the TDI input and to the TDO output (see Fig. 50, the instruction register 314 coupled to the TDI input and to the TDO output); a command circuit (see Fig. 50, TAP 318 [Examiner note: since no specific feature of the command circuit to be performed, the TAP 318 can be function and perform similar manner of the command circuit since it receives same inputs of TCK and TMS]) coupled to the TCK input and to the TMS input (see Fig. 50, TAP 318 coupled to the TCK input and to the TMS input); a first routing circuit (see Fig. 50, gating circuit 5004 [Examiner note: since no specific feature of the first routing circuit that to be performed, it would have been obvious to one of ordinary skill in the art that the gating circuit 5004 can function and perform similar manner of the first routing circuit since is coupled to the instruction register 404 and to the command circuit [TAP 318])) coupled to the instruction register (see Fig. 50, instruction register 314) and to the command circuit (see Fig. 50, TAP 318); and a first data register (see Fig. 50 data register 1).
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Whetsel does not explicitly teach the first data register coupled to the first routing circuit.
However, Halstvedt in analogous art teaches the first data register (see Fig. 4, data register 412) coupled to the first routing circuit (see Fig. 4, control logic 406 [Examiner note: since no specific feature of the first routing circuit that to be performed, it would have been obvious to one of ordinary skill in the art that the control logic 406 can function and perform similar manner of the first routing circuit since is coupled to the instruction register 404 and to the command circuit [JTAG TAP controller 128]).
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Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the invention, to modify the communication system of Whetsel with the teachings of Halstvedt by including the first data register coupled to the first routing circuit.
This modification would have been obvious to one of ordinary skill in the art, before the effective filing date of the invention, because one of ordinary skill in the art would have recognized the first data register coupled to the first routing circuit would have improved the test system performance.
As per claim 2:
Whetsel teaches that a second routing circuit (see Fig. 54, gating 308) coupled to the instruction register (see Fig. 54 instruction register 314) and to the command circuit (see Fig. 54, TAP 318); and a second data register (see Fig. 54, data registers 1202) coupled to the second routing circuit (see Fig. 54, gating 308).
As per claim 3:
Whetsel teaches that a state machine coupled to the TCK input, the TMS input (see Fig. 51, gating 308), and the command circuit (see Fig. 51, TAP 318).
As per claim 4:
Whetsel teaches that wherein the state machine (see Fig. 51, gating 308) is coupled to the instruction register (see Fig. 51, instruction register 314).
Whetsel does not explicitly teach that the state machine coupled to the first routing circuit.
However, Halstvedt in analogous art teaches the state machine (see Fig. 4, size register 408) coupled to the first routing circuit (see Fig. 4, control circuit 406 controller128).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the invention, to modify the communication system of Whetsel with the teachings of Halstvedt by including the state machine coupled to the first routing circuit.
This modification would have been obvious to one of ordinary skill in the art, before the effective filing date of the invention, because one of ordinary skill in the art would have recognized the state machine coupled to the first routing circuit. would have improved the test system performance.
As per claim 11:
Whetsel substantially teaches or discloses a system comprising: a daisy chain of devices including (see Fig. 50) a first device (see Fig. 50, architecture 4904) and a second device (see Fig. 50, merged test interface 4906); a clock input coupled to the first device and to the second device (see Fig. 50); a test clock (TCK) input coupled to the first device and to the second device (see Fig. 50, TCK input); a test mode select (TMS) input coupled to the first device and to the second device (see Fig. 50, TMS input); wherein the first device includes (see Fig. 50, architecture 4904): an instruction register (see Fig. 50, instruction register 314) a command circuit coupled to the TCK input and to the TMS input (see Fig. 50, TAP 318 [Examiner note: since no specific feature of the command circuit to be performed, the TAP 318 can be function and perform similar manner of the command circuit since it receives same inputs of TCK and TMS]); a first routing circuit coupled to the instruction register and to the command circuit (see Fig. 50, gating circuit 5004 [Examiner note: since no specific feature of the first routing circuit that to be performed, it would have been obvious to one of ordinary skill in the art that the gating circuit 5004 can function and perform similar manner of the first routing circuit since is coupled to the instruction register 404 and to the command circuit [TAP 318]); and a first data register (see Fig. 50 data register 1).
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Whetsel does not explicitly teach the first data register coupled to the first routing circuit.
However, Halstvedt in analogous art teaches the first data register (see Fig. 4, data register 412) coupled to the first routing circuit (see Fig. 4, control logic 406 [Examiner note: since no specific feature of the first routing circuit that to be performed, it would have been obvious to one of ordinary skill in the art that the control logic 406 can function and perform similar manner of the first routing circuit since is coupled to the instruction register 404 and to the command circuit [JTAG TAP controller 128]).
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Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the invention, to modify the communication system of Whetsel with the teachings of Halstvedt by including the first data register coupled to the first routing circuit.
This modification would have been obvious to one of ordinary skill in the art, before the effective filing date of the invention, because one of ordinary skill in the art would have recognized the first data register coupled to the first routing circuit would have improved the test system performance.
As per claim 12:
Whetsel teaches that wherein the first device includes a test data out (TDO) output (see Fig. 50 TDO) coupled to the instruction register (see Fig. 50, instruction register 308) and wherein the second device (see Fig. 50, merged test interface 4906) includes a test data in (TDI) input (see Fig. 50 TDI input) coupled to the TDO output of the first device (see Fig. 50 TDO).
As per claim 13:
Whetsel teaches that wherein the first device includes (see Fig. 54): a second routing circuit (see Fig. 54, gating 308) coupled to the instruction register (see Fig. 54 instruction register 314) and to the command circuit (see Fig. 54, TAP 318); and a second data register (see Fig. 54, data registers 1202) coupled to the second routing circuit (see Fig. 54, gating 308).
As per claim 14:
Whetsel teaches that wherein the first device includes a state machine input coupled to the TCK input (see Fig. 51, gating 308), the TMS input, and the command circuit (see Fig. 51, TAP 318).
As per claim 15:
Whetsel teaches that wherein the state machine (see Fig. 51, gating 308) is coupled to the instruction register and to the first routing circuit (see Fig. 51, instruction register 314).
9. Claim 10 and 20 is/are rejected under pre-AIA 35 U.S.C. 103(a) as being unpatentable over Whetsel (US 2008/0250287 A1) in view of Halstvedt et al. (US 2009/0249136 A1) in further view of Benedix et al. (US 20040151037 A1) “herein after as Benedix.”
As per claims 10 and 20:
Whetsel-Halstvedt as combined does not teaches a test compression architecture including the first data register.
However, Benedix in analogous art teaches a test compression architecture including the first data register (see paragraph [0023], herein the test data compression circuit contains a plurality of test data compression circuit modules which each have a test data register for storing a test data sequence read from the memory cell array via a data line in the test data bus).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the invention, to modify the communication system of Whetsel-Halstvedt as combined with the teachings of Benedix by including the test compression architecture including the first data register.
This modification would have been obvious to one of ordinary skill in the art, before the effective filing date of the invention, because one of ordinary skill in the art would have recognized the test compression architecture including the first data register would have improved the data relibilty of the test system.
Allowable Subject Matter
10. Claims 5-9 and 16-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Examiner Notes
11. When amending the claims, applicants are respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention.
Prior Art
12. The prior art of record, considered pertinent to the applicant’s disclosure, is listed in the attached PTO-892 form.
Conclusion
13. Any inquiry concerning this communication or earlier communications from the examiner should be directed to OSMAN ALSHACK whose telephone number is (571)272-2069. The examiner can normally be reached on MON-FRI 8:30 AM-5:00 PM EST, also please fax interview request to (571) 273- 2069. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, ALBERT DECADY can be reached on 5712723819. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/OSMAN M ALSHACK/ Examiner, Art Unit 2112