DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1–8, 11, 13, 14, and 20 are rejected on the ground of nonstatutory double patenting as being unpatentable over Claims 1, 5, 6, 10–12, 15, 17, and 18 of U.S. Patent No. 12,197,057. Although the claims at issue are not identical, they are not patentably distinct from each other because the pending claims are generally broader, but would have been obvious in view of, the patented claims, as in the following claims correspondence table.
Pending Claim
Corresponding Patented Claim
1
1, 15
2
5
3
6
4
1, 15
5
10, 18
6
11
7
20
8
12
11
15
13
15
14
17
20
1, 15
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
Determining the scope and contents of the prior art.
Ascertaining the differences between the prior art and the claims at issue.
Resolving the level of ordinary skill in the pertinent art.
Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1–20 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Application Publication No. 2016/0231604 to Lin et al.
Regarding Claim 1, Lin discloses (e.g., at least Fig. 7 and its description) an integrated display module, comprising: a liquid crystal assembly 700 comprising: a first substrate 310; a second substrate 560; and a liquid crystal material 550 disposed between the first and second substrates, the second substrate comprising an array of pixel elements 565, each pixel element comprising a pixel electrode (where Lin does not explicitly disclose that the pixels include pixel electrodes; however, such would have been obvious as a matter of design choice, and where pixels in liquid crystal and other displays generally include pixels to control the display properties of the individual pixel, such that including a pixel electrode for each pixel element would have been obvious and yielded predictable results, absent evidence of criticality or otherwise unobvious results from the claim feature); backplane circuitry comprising pixel circuitry (e.g., paragraphs [0023] and [0036], “semiconductor wafer 560 is an integrated circuit (IC) driver chip that electrically connects to individual pixels of pixel array 565”), the pixel circuitry being at least one of disposed or integrated into the second substrate (paragraph [0023]), the pixel circuitry being electrically coupled to at least one of the pixel electrodes (paragraph [0023]); and display driver circuitry electrically coupled to the pixel circuitry (paragraphs [0023] and [0036]), the display driver circuitry being at least one of disposed or integrated into the second substrate (paragraphs [0023] and [0036]).
Regarding Claim 2, Lin would have rendered obvious wherein the second substrate is a silicon substrate (paragraph [0023], formed of silicon).
Regarding Claim 3, Lin would have rendered obvious wherein the pixel circuitry comprises a pixel circuit that is coupled to each of the pixel electrodes (paragraph [0023], “electrically connects to individual pixels of pixel array”).
Regarding Claim 4, Lin would have rendered obvious a printed circuit board 702 coupled to the liquid crystal assembly, backplane circuitry, and display driver circuitry (e.g., paragraphs [0027]–[0028]).
Regarding Claim 5, Lin would have rendered obvious a molded portion encapsulating power management circuitry on the printed circuit board (where Lin appears silent regarding additional features; however, the combination of familiar elements according to known methods is likely to be obvious when it does no more than yield predictable results, such as in this case, where power management circuitry would function to manage power to the circuits with the molded portion encapsulating it for protection).
Regarding Claim 6, Lin would have rendered obvious wherein the molded portion is made from an insulating material (where forming a material covering conductive components to be insulating would have been obvious, yielding the predictable results of preventing crosstalk or other electrical interference, absent evidence of criticality or otherwise unobvious results from the claim features).
Regarding Claim 7, Lin would have rendered obvious wherein: the second substrate is coupled to a first side of the printed circuit board (Fig. 7); and the molded portion is at least one of coupled to or formed on a second and opposite side of the printed circuit board (e.g., Fig. 7).
Regarding Claim 8, Lin would have rendered obvious wherein the display driver circuitry drives operation of the pixel elements via the pixel circuitry (paragraph [0023], “electrically connects to individual pixels of pixel array”; paragraph [0028]).
Regarding Claim 9, Lin would have rendered obvious wherein the printed circuit board includes a second connector that electrically couples to a first connector of an electrical interface to a host device external to the integrated display module (e.g., paragraph [0002], panel may be part of various consumer electronics including display; Figs. 8–10 showing various connector configurations).
Regarding Claim 10, Lin would have rendered obvious wherein the electrical interface electrically couples an external power source to power management circuitry on the printed circuit board via the first connector and second connector (e.g., paragraph [0002], panel may be part of various consumer electronics including display, which generally include a power source; Figs. 8–10 showing various connector configurations).
Regarding Claim 11, Lin would have rendered obvious (e.g., at least Fig. 7 and its description) a system (e.g., paragraph [0002] teaches the display as part of various consumer electronics, forming the system) comprising: a host device (e.g., various consumer electronics); and an integrated display module 700 coupled to the host device, the integrated display module comprising: a liquid crystal assembly 700 comprising: a first substrate 310; a second substrate 560; and a liquid crystal material 550 disposed between the first and second substrates, the second substrate comprising an array of pixel elements 565, each pixel element comprising a pixel electrode (where Lin does not explicitly disclose that the pixels include pixel electrodes; however, such would have been obvious as a matter of design choice, and where pixels in liquid crystal and other displays generally include pixels to control the display properties of the individual pixel, such that including a pixel electrode for each pixel element would have been obvious and yielded predictable results, absent evidence of criticality or otherwise unobvious results from the claim feature); backplane circuitry comprising pixel circuitry (e.g., paragraphs [0023] and [0036], “semiconductor wafer 560 is an integrated circuit (IC) driver chip that electrically connects to individual pixels of pixel array 565”), the pixel circuitry being at least one of disposed or integrated into the second substrate (paragraph [0023]), the pixel circuitry being electrically coupled to at least one of the pixel electrodes (paragraph [0023]); display driver circuitry electrically coupled to the pixel circuitry (paragraphs [0023] and [0036]), the display driver circuitry being at least one of disposed or integrated into the second substrate (paragraphs [0023] and [0036]); a printed circuit board 702 coupled to the liquid crystal assembly, backplane circuitry, and display driver circuitry (e.g., paragraphs [0027]–[0028]); and an electrical interface between the integrated display module and the host device, the electrical interface being coupled to the printed circuit board (e.g., Figs. 8–10 and their descriptions show various connector/interface configurations).
Regarding Claim 12, Lin would have rendered obvious wherein the second substrate is a silicon substrate (paragraph [0023], formed of silicon).
Regarding Claim 13, Lin would have rendered obvious wherein the pixel circuitry comprises a pixel circuit that is coupled to each of the pixel electrodes (paragraph [0023], “electrically connects to individual pixels of pixel array”).
Regarding Claim 14, Lin would have rendered obvious wherein the electrical interface is fixedly coupled to the printed circuit board (Figs. 7–10).
Regarding Claim 15, Lin would have rendered obvious wherein the printed circuit board includes a second connector that electrically couples to a first connector of the electrical interface (e.g., Figs. 8–10 and their descriptions show various connector/interface configurations).
Regarding Claim 16, Lin would have rendered obvious a power source, wherein the electrical interface electrically couples the power source to power management circuitry on the printed circuit board (e.g., paragraph [0002], panel may be part of various consumer electronics including display, which generally include a power source and power management circuitry, which would function as expected to provide and manage power to the device; Figs. 8–10 showing various connector configurations).
Regarding Claim 17, Lin would have rendered obvious a molded portion encapsulating the power management circuitry (where Lin appears silent regarding additional features; however, the combination of familiar elements according to known methods is likely to be obvious when it does no more than yield predictable results, such as in this case, where power management circuitry would function to manage power to the circuits with the molded portion encapsulating it for protection).
Regarding Claim 18, Lin would have rendered obvious wherein the molded portion is made from an insulating material (where forming a material covering conductive components to be insulating would have been obvious, yielding the predictable results of preventing crosstalk or other electrical interference, absent evidence of criticality or otherwise unobvious results from the claim features).
Regarding Claim 19, Lin would have rendered obvious wherein: the second substrate is coupled to a first side of the printed circuit board (Fig. 7); and the molded portion is at least one of coupled to or formed on a second and opposite side of the printed circuit board (Fig. 7).
Regarding Claim 20, Lin would have rendered obvious (e.g., at least Fig. 7 and its description) an integrated display module, comprising: a liquid crystal assembly 700 comprising: a first substrate 310; a second substrate 560; and a liquid crystal material 550 disposed between the first and second substrates, the second substrate comprising: image-forming means (e.g., pixel elements 565); and means for receiving signals to drive the image-forming means (e.g., paragraphs [0023] and [0036], “semiconductor wafer 560 is an integrated circuit (IC) driver chip that electrically connects to individual pixels of pixel array 565”); circuit means for routing the signals to the image-forming means (paragraphs [0023] and [0036], “semiconductor wafer 560 is an integrated circuit (IC) driver chip that electrically connects to individual pixels of pixel array 565”), the circuit means being at least one of disposed or integrated into the second substrate (paragraphs [0023] and [0036], “semiconductor wafer 560 is an integrated circuit (IC) driver chip that electrically connects to individual pixels of pixel array 565”); and driver means for providing the signals to the circuit means, the driver means being at least one of disposed or integrated into the second substrate (e.g., paragraphs [0023] and [0036]).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to RYAN CROCKETT whose telephone number is (571)270-3183. The examiner can normally be reached M-F 8am to 5pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Michael Caley can be reached at 571-272-2286. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/RYAN CROCKETT/Primary Examiner, Art Unit 2871
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