Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
2. It would be of great assistance to the office if all incoming papers pertaining to a filed application carried the following items:
i. Application number (checked for accuracy, including series code and serial no.).
ii. Group art unit number (copied from most recent Office communication).
iii. Filing date.
iv. Name of the examiner who prepared the most recent Office action.
v. Title of invention.
vi. Confirmation number (See MPEP § 503).
3. The Examiner has pointed out particular references contained in the prior art of record within the body of this action for the convenience of the Applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages, paragraph and figures may apply. Applicant, in preparing the response, should consider fully the entire reference as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner.
4. Claim interpretation: When multiple limitations are connected with “OR”, one of the limitations doesn’t have any patentable weight since both of the limitations are optional.
CLAIM OBJECTION
5. Claim 9 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Interpreting the claims in light of the specification, examiner finds the claimed invention is patentably distinct from the prior art of record. The prior art does not expressly teach or render obvious the invention as recited in the claim 9. Claims 10-11 are also objected since they depend upon claim 9.
Claim Rejection- 35 USC § 103
6. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 2, 5, 6, 7 and 8 are rejected under 35 U.S.C. 103 as being unpatentable over Gunzelmann et al (Pub No. 2007/0200743) and further in view of Petrovic (Pub No. 2011/0299441).
Regarding claim 1, Gunzelmann et al discloses an apparatus for digital-to-analog conversion (Fig. 4 & 6), comprising: a first multiplexer comprising a first input coupled to a first data input of the apparatus and a second input coupled to a second data input of the apparatus (Fig. 4: a multiplexer-403 with a first input & a second connected to in put apparatus) & (Para. 73: I & Q signals to multiple circuit); a first digital-to-analog converter (DAC) having an input coupled to an output of the first multiplexer (Fig. 4 & 6: DAC-601 input coupled to an output of the multiplexer-403 in the processor-407) & (Para. 69-73); and a first set of switches coupled output of the first (Fig. 6: implicit switched-603/605 & Fig. 7: Switches connected to the DAC & Para. 12 & 18 & 73).
Gunzelmann et al does not explicitly disclose a set of switches coupled between the DAC and a respective one of a first set of load circuits.
In a similar field of endeavor, Petrovic discloses a set of switches coupled between the DAC and a respective one of a first set of load circuits (Fig. 4: switches-S1/S3 between -DAC-434 to the load circuits) & (Para. 45).
Therefore, it would have been obvious to one of the ordinary skilled in the art before the effective filing date of the invention to use the antenna switching system of Petrovic’s disclosure with the simultaneously digital analog conversion system, as taught by Gunzelmann. Doing so would have resulted in effectively converting and switching digital signals for proper wireless transmission to increase the coverage by improving the link quality.
Regarding claim 2, Gunzelmann et al discloses the first set of load circuits comprises a set of baseband filters (Fig. 6: Filter 607/609 & Para. 4 & 75: Baseband signals).
Regarding claim 5, Gunzelmann et al discloses the first DAC (Para. 80: DAC converter). Examiner taking official notice that DAC can comprises a current-steering DAC. Using a current-steering DAC would result in converting digital current signals to analog signal for proper signal conversion in the RF signal processor.
Regarding claim 6, Gunzelmann et al discloses the first multiplexer is configured to provide, to the input of the first DAC, first data from the first data input of the apparatus during a first phase (Fig. 4: a multiplexer-403 with a first input & a second connected to in put apparatus) & (Para. 73: I & Q signals) and the first DAC is configured to generate a first analog signal based on the first data during the first phase, the first analog signal being provided to a first load circuit of the first set of load circuits via a first switch of the first set of switches (Para. 73: Digital to analog convert for I & Q signals & Para. 66: set of switches) & (Fig. 4 & 6).
Regarding claim 7, Gunzelmann et al discloses the first multiplexer is configured to provide, to the input of the first DAC, second data from the second data input of the apparatus during a second phase; and the first DAC is configured to generate a second analog signal based on the second data during the second phase, the second analog signal being provided to a second load circuit of the first set of load circuits via a second switch of the first set of switches (Fig. 4 & 6: MUX 403 provide data from I input for clock 2fs in the first phase and data from Q input in the 2nd phase and output to DAC 601. Filter 607 & 609 to load circuit. Circuit 603/605 read as switching circuit).
Regarding claim 8, Gunzelmann et al is silent regarding : a second multiplexer comprising a first input coupled to a third data input of the apparatus and a second input coupled to a fourth data input of the apparatus; a second DAC having an input coupled to an output of the second multiplexer; and a second set of load circuits; and a second set of switches coupled between an output of the second DAC and a respective one of the second set of load circuits.
Petrovic discloses a second multiplexer comprising a first input coupled to a third data input of the apparatus and a second input coupled to a fourth data input of the apparatus (Fig. 5: 2nd MUX input SY); a second DAC having an input coupled to an output of the second multiplexer (Fig. 5: 2ND DAC-540 connected to the MUX); and a second set of load circuits (Fig. 2 & 5: RF load); and a second set of switches coupled between an output of the second DAC and a respective one of the second set of load circuits (Fig. 5: switch in the MUX/ DeMUX).
Therefore, it would have been obvious to one of the ordinary skilled in the art before the effective filing date of the invention to use the antenna switching system of Petrovic’s disclosure with the simultaneously digital analog conversion system, as taught by Gunzelmann. Doing so would have resulted in effectively converting and switching digital signals for proper wireless transmission to increase the coverage by improving the link quality.
Claims 3 & 4 are rejected under 35 U.S.C. 103 as being unpatentable over Gunzelmann et al (Pub No. 2007/0200743), in view of Petrovic (Pub No. 2011/0299441) and further in view of Summers (Pub No. 2019/0028124).
Regarding claim 3, Gunzelmann is silent regarding comprising a set of shunt paths, each of the set of shunt paths being coupled between a reference potential node and a respective input of the set of baseband filters.
Summers discloses comprising a set of shunt paths, each of the set of shunt paths being coupled between a reference potential node (Para. 53: Shunt path with reference potential node) and a respective input of the set of baseband filters (Para. 60: baseband signal filter).
Therefore, it would have been obvious to one of the ordinary skilled in the art before the effective filing date of the invention to use the signal filtering system to produce better quality signals for the RF circuitry.
Regarding claim 4, Gunzelmann is silent regarding input signals of the set of baseband filters comprise return-to-zero (RZ) signals.
Summers discloses input signals of the set of baseband filters comprise return-to-zero (RZ) signals (Para. 55: Zero/ Low IF frequency signals).
Therefore, it would have been obvious to one of the ordinary skilled in the art before the effective filing date of the invention to use the RF signal processor produce huigher quality signals for the RF circuitry.
Claim 12 is/ are rejected under 35 U.S.C. 103 as being unpatentable over Gunzelmann et al (Pub No. 2007/0200743), in view of Petrovic (Pub No. 2011/0299441) and further in view of Yeo et al (Pub No. 2019/0222205).
Regarding claim 12, Gunzelmann et al discloses the first data input comprises an in-phase (I) data input; the third data input comprises a quadrature (Q) data input (Fig. 6: I & Q input).
Gunzelmann et al is silent regarding the second data input comprises an I with 45° phase shift (I45) data input; and the fourth data input comprises a Q with 45° phase shift (Q45) data input.
Yeo et al discloses the second data input comprises an I with 45° phase shift (I45) data input; and the fourth data input comprises a Q with 45° phase shift (Q45) data input (Para. 83: Phase shifting 45 or 135 degree for I & Q signals) & (Para. 89).
Therefore, it would have been obvious to one of the ordinary skilled in the art before the effective filing date of the invention to use the phase shifting system to shift the signal phase for the wireless system.
Claims 13-16 are rejected under 35 U.S.C. 103 as being unpatentable over Gunzelmann et al (Pub No. 2007/0200743) and further in view of Chakraborty et al (Pub No. 2024/0162921).
Regarding claim 13, Gunzelmann et al discloses a method for digital-to-analog conversion, comprising: providing, via a first multiplexer, first input data and second input data to an input of a first digital-to-analog converter (DAC) during a first phase and a second phase, respectively (Para. 31: Multiplexing D/A signals & 7-8: D/A convert first input and 2nd input during in-phase (I)-1st and quadrature (Q)-2nd phase); generating, via the first DAC, a first analog signal and a second analog signal based on the first input data and the second input data during the first phase and the second phase, respectively (Para. 30-31: Converting multiple digital signals to multiple analog signals in multiple phase).
Gunzelmann et al does not explicitly disclose providing the first analog signal and the second analog signal to a first load circuit and a second load circuit during the first phase and the second phase, respectively.
In a similar field of endeavor, Chakraborty discloses providing the first analog signal and the second analog signal to a first load circuit and a second load circuit during the first phase and the second phase, respectively (Fig. 1-2 & Para. 40: digital to analog convert signals and multiple phase signals & Para. 55: Load stage 150).
Therefore, it would have been obvious to one of the ordinary skilled in the art before the effective filing date of the invention to use radio frequency signal generator of Chakraborty’s disclosure with the simultaneously digital analog conversion system, as taught by Gunzelmann. Doing so would have resulted in effectively adjusting digital signals for proper wireless transmission and calibrate signals to reduce power uses in the system.
Regarding claim 14, Gunzelmann et al discloses the first set of load circuits comprises a set of baseband filters (Fig. 6: Filter 607/609 & Para. 4 & 75: Baseband signals).
Regarding claim 15, Gunzelmann et al discloses the first analog signal and the second analog signal are provided to the first baseband filter and the second baseband filter via a first switch and second switch, respectively (Fig. 6: Filter 607/609 with indirect switches 603/605 & Para. 4 & 75: Baseband signals).
Regarding claim 16, Gunzelmann et al discloses coupling, to a reference potential node, an input of the first baseband filter and an input of the second baseband filter during the second phase and the first phase, respectively (Fig. I & Q signal processing) & (Para. 35-38).
Claim 17 is/ are rejected under 35 U.S.C. 103 as being unpatentable over Gunzelmann et al (Pub No. 2007/0200743), in view of Chakraborty et al (Pub No. 2024/0162921) and further in view of Summers (Pub No. 2019/0028124).
Regarding claim 17, Gunzelmann is silent regarding input signals of the set of baseband filters comprise return-to-zero (RZ) signals.
Summers discloses input signals of the set of baseband filters comprise return-to-zero (RZ) signals (Para. 55: Zero/ Low IF frequency signals).
Therefore, it would have been obvious to one of the ordinary skilled in the art before the effective filing date of the invention to use the RF signal processor produce huigher quality signals for the RF circuitry.
Claim 18 is/ are rejected under 35 U.S.C. 103 as being unpatentable over Gunzelmann et al (Pub No. 2007/0200743), in view of Chakraborty et al (Pub No. 2024/0162921) and further in view of Petrovic (Pub No. 2011/0299441).
Regarding claim 18, Gunzelmann is silent regarding via a second multiplexer, third input data and fourth input data to an input of a second DAC during the first phase and the second phase, respectively; generating, via the second DAC, a third analog signal and a fourth analog signal based on the third input data and the fourth input data during the first phase and the second phase, respectively; and providing the third analog signal and the fourth analog signal to a third load circuit and a fourth load circuit during the first phase and the second phase, respectively.
Chakraborty et al discloses via a second multiplexer, third input data and fourth input data to an input of a second DAC during the first phase and the second phase, respectively (Fig. 5: multiple MUX 538 & DAC-540); generating, via the second DAC, a third analog signal and a fourth analog signal based on the third input data and the fourth input data during the first phase and the second phase (Fig. 5 & Para. 6: in-phase and quadrature components), and providing the third analog signal and the fourth analog signal to a third load circuit and a fourth load circuit during the first phase and the second phase, respectively (Fig. 5: Providing signals to load) & (Para. 26 & 36 & 42).
Therefore, it would have been obvious to one of the ordinary skilled in the art before the effective filing date of the invention to use radio frequency signal generator of Chakraborty’s disclosure with the simultaneously digital analog conversion system, as taught by Gunzelmann. Doing so would have resulted in effectively adjusting digital signals for proper wireless transmission and calibrate signals to reduce power uses in the system.
Claim 19 is/ are rejected under 35 U.S.C. 103 as being unpatentable over Gunzelmann et al (Pub No. 2007/0200743), Chakraborty et al (Pub No. 2024/0162921), in view of Petrovic (Pub No. 2011/0299441) and further in view of Yeo et al (Pub No. 2019/0222205).
Regarding claim 19, Gunzelmann et al discloses the first data input comprises an in-phase (I) data input; the third data input comprises a quadrature (Q) data input (Fig. 6: I & Q input).
Gunzelmann et al is silent regarding the second data input comprises an I with 45° phase shift (I45) data input; and the fourth data input comprises a Q with 45° phase shift (Q45) data input.
Yeo et al discloses the second data input comprises an I with 45° phase shift (I45) data input; and the fourth data input comprises a Q with 45° phase shift (Q45) data input (Para. 83: Phase shifting 45 or 135 degree for I & Q signals) & (Para. 89).
Therefore, it would have been obvious to one of the ordinary skilled in the art before the effective filing date of the invention to use the phase shifting system to shift the signal phase for the wireless system.
Claims 20 are rejected under 35 U.S.C. 103 as being unpatentable over Gunzelmann et al (Pub No. 2007/0200743), in view of Petrovic (Pub No. 2011/0299441) and further in view of Chakraborty et al (Pub No. 2024/0162921).
Regarding claim 20, Gunzelmann et al discloses a transmitter comprising: a digital-to-analog converter (DAC) circuit (Fig. 4 & 6) comprising: a multiplexer comprising a first input coupled to a first data input of the DAC circuit a second input coupled to a second data input of the DAC circuit (Fig. 4: a multiplexer-403 with a first input & 2nd input to DAC); and a DAC having an input coupled to an output of the multiplexer (Fig. 4 & 6: DAC-601 input coupled to an output of the multiplexer-403 in the processor-407) & (Para. 69-73); and a first set of switches coupled output of the first (Fig. 6: implicit switched-603/605 & Fig. 7: Switches connected to the DAC & Para. 12 & 18 & 73).
Gunzelmann et al does not explicitly disclose a set of switches coupled between the DAC and a respective one of a first set of load circuits and a set of mixers coupled to respective outputs of the set of baseband filters.
In a similar field of endeavor, Petrovic discloses a set of switches coupled between the DAC and a respective one of a first set of load circuits (Fig. 4: switches-S1/S3 between -DAC-434 to the load circuits) & (Para. 45).
Therefore, it would have been obvious to one of the ordinary skilled in the art before the effective filing date of the invention to use the antenna switching system of Petrovic’s disclosure with the digital analog signal processing system system, as taught by Gunzelmann. Doing so would have resulted in effectively converting and switching digital signals for proper wireless transmission to increase the coverage by improving the link budget with beamforming.
Chakraborty discloses a set of baseband filters and a set of mixers coupled to respective outputs of the set of baseband filters (Fig. 1: Mixer-140 coupled to respective outputs of the set of baseband filters-131/132).
Therefore, it would have been obvious to one of the ordinary skilled in the art before the effective filing date of the invention to use the mixers with baseband signal processor to process RF signals properly for data communication.
Another Prior Art
7. The prior art made of record and not relied upon is considered pertinent to applicant’s disclosure. Another prior art, SUN et al (2019/0089314) discloses power amplifier configured to amplify an input signal having a frequency to produce a radio frequency (RF) output signal at an output and a harmonic tuning circuit coupled between a power supply and the power amplifier output. The circuitry includes DAC, signals mixer and power load. The circuit process phase (I) or quadrature (Q) baseband signals.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MD K TALUKDER whose telephone number is (571)270-3222. The examiner can normally be reached Mon-Thur from 10 am to 6 pm.
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/MD K TALUKDER/ Primary Examiner, Art Unit 2648
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