Prosecution Insights
Last updated: April 19, 2026
Application No. 18/957,233

QUANTUM CIRCUITS WITH REDUCED T GATE COUNT

Non-Final OA §103
Filed
Nov 22, 2024
Examiner
ALHWAMDEH, KAREEM FUAD
Art Unit
2112
Tech Center
2100 — Computer Architecture & Software
Assignee
Google LLC
OA Round
1 (Non-Final)
Grant Probability
Favorable
1-2
OA Rounds
3y 2m
To Grant

Examiner Intelligence

Grants only 0% of cases
0%
Career Allow Rate
0 granted / 0 resolved
-55.0% vs TC avg
Minimal +0% lift
Without
With
+0.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 2m
Avg Prosecution
12 currently pending
Career history
12
Total Applications
across all art units

Statute-Specific Performance

§103
83.9%
+43.9% vs TC avg
§102
6.5%
-33.5% vs TC avg
§112
3.2%
-36.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 0 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) [ 21-36 ] are rejected under 35 U.S.C. 103 as being unpatentable over [ Eastin (US 8957699) hereinafter "Eastin", in view of Fuechsle et al. (US 20160125311), hereinafter "Fuechsle"]. As per claim 21, Eastin significantly teaches the method comprising: performing at least one Toffoli gate on two control qubits in a two-dimensional array and a target qubit in the two-dimensional array, comprising (This state can be used with the set of Clifford gates to provide a Toffoli gate, which is sufficient for universal quantum computing. [Eastin PP 0023]): storing a logical-AND of the two control qubits in a state of an ancilla qubit, wherein storing the logical AND of the two control qubits comprises applying multiple T gates to the ancilla qubit (after the parity check, the first qubit 13 , the second qubit 14 , and the unmeasured target qubit 15 represent a high-fidelity Toffoli state. [Eastin PP 0023], Each quantum circuit component further comprises at least one rotation gate configured to provide a rotation around an axis of the Bloch sphere using at least one Clifford gate and at least one single qubit magic state stored in the third set of qubits. In one implementation, each rotation gate provides one of a rotation of π/4 radians around the Y-axis and a rotation of negative π/4 radians around the Y-axis to at least one of the second set of qubits 15 and 16 . [Eastin PP 0022]); applying a CNOT quantum logic gate between (i) the ancilla qubit storing the logical- AND of the two control qubits, and (ii) a target qubit, the ancilla qubit acting as a control qubit for the CNOT quantum logic gate (In other words, one of the at least one CNOT gates is controlled by a first qubit 15 of the second set of qubits and targets another qubit 16 of the second set of qubits. [Eastin PP 0024]); and un-computing the logical-AND of the two control qubits, wherein un-computing the logical-AND of the two control qubits comprises applying multiple T gates to the ancilla qubit (a seventh CNOT gate 92 targets the fourth qubit and is controlled by the third qubit. [Eastin PP 0034], Each Y-rotation gate 66 and 68 rotates its respective qubit by negative π/4 radians. [Eastin PP 0033]). Eastin does not explicitly teach “A method for performing an error-corrected quantum computation using a surface code”. However, Fuechsle, in an analogous art, teaches A method for performing an error-corrected quantum computation using a surface code (Surface code repetitions of operations between data and ancilla qubits form the basis of stabiliser measurements in well-defined geometrical patterns across the matrix. [Fuechsle PP 0109], The architecture allows performing the operations required in surface code syndrome extraction and high-level error corrected logical operations with operational errors falling below the appropriate surface code threshold. [Fuechsle PP 0111]) Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the quantum computing device disclosed by Eastin to incorporate Fuechsle’s teachings of surface code quantum processor architecture, in order to improve scalable surface code for error corrected computation (The architecture allows performing the operations required in surface code syndrome extraction and high-level error corrected logical operations with operational errors falling below the appropriate surface code threshold. [Fuechsle PP 0111]). Applying these teachings would have been a predictable variation for someone of ordinary skill in the art to Eastin’s invention. As per claim 22, Eastin significantly teaches further comprising applying a controlled-S gate to the two control qubits after storing the logical-AND of the two control qubits in the state of the ancilla qubit (A set of universal quantum gates, as the phrase used herein, is any set of quantum gates to which any operation possible on a quantum computer can be reduced, that is, any other unitary operation can be approximated as a finite sequence of gates from the set. [Eastin PP 0016], A “magic state”, as used herein, is a quantum state which can be used with Clifford gates to provide arbitrary quantum operations and can be improved in fidelity by a circuit constructed from Clifford gates. [Eastin PP 0017]). As per claim 23, Eastin significantly teaches further comprising: replacing the state of the ancilla qubit storing the logical-AND of the two control qubits with an A state (A “magic state”, as used herein, is a quantum state which can be used with Clifford gates to provide arbitrary quantum operations and can be improved in fidelity by a circuit constructed from Clifford gates. [Eastin PP 0017]); and providing the ancilla qubit in the A state as a resource for one or more additional operations in the error-corrected quantum computation, wherein the one or more operations comprise performing a T gate (rotation gate configured to provide a rotation around an axis of the Bloch sphere using at least one Clifford gate and at least one single qubit magic state stored in the third set of qubits. In one implementation, each rotation gate provides one of a rotation of π/4 radians around the Y-axis and a rotation of negative π/4 radians around the Y-axis to at least one of the second set of qubits [Eastin PP 0022]). As per claim 24, Eastin significantly teaches wherein the one or more additional operations comprise a subsequent Toffoli quantum logic gate (This state can be used with the set of Clifford gates to provide a Toffoli gate, which is sufficient for universal quantum computing. [Eastin PP 0023]). As per claim 25, Eastin significantly teaches applying a T gate to the ancilla qubit (Each Y-rotation gate 66 and 68 rotates its respective qubit by negative π/4 radians. [Eastin PP 0033]); applying a CNOT gate between the ancilla qubit and a first one of the two control qubits (A first CNOT gate 62 targets the third qubit and is controlled by the second qubit. [Eastin PP 0031]); applying a Hermitian conjugate of a T gate to the ancilla qubit (Each Y-rotation gate 76 and 78 rotates its respective qubit by negative π/4 radians [Eastin PP 0032]); applying a CNOT gate between the ancilla qubit and a second one of the two control qubits (The sixth CNOT gate 84 targets the fourth qubit and is controlled by the first qubit. [Eastin PP 0033]); applying a T gate to the ancilla qubit (Each Y-rotation gate 66 and 68 then rotates its respective qubit by π/4 radians [Eastin PP 0031]); and applying a CNOT gate between the ancilla qubit and the first one of the two control qubits to leave the ancilla qubit in the A state (a seventh CNOT gate 92 targets the fourth qubit and is controlled by the third qubit. [Eastin PP 0034]). Eastin does not explicitly teach “wherein storing the computed logical-AND of the two control qubits with the A state comprises: applying a Hadamard gate to the ancilla qubit storing the logical-AND of the two control qubits;”. However, Fuechsle, in an analogous art, teaches wherein storing the computed logical-AND of the two control qubits with the A state comprises: applying a Hadamard gate to the ancilla qubit storing the logical-AND of the two control qubits (applying a Hadamard gate to the nuclear spin of the first donor atom [Fuechsle PP 0035]); Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the quantum computing device disclosed by Eastin to incorporate Fuechsle’s teachings of surface code quantum processor architecture, in order to improve scalable surface code for error corrected computation (The architecture allows performing the operations required in surface code syndrome extraction and high-level error corrected logical operations with operational errors falling below the appropriate surface code threshold. [Fuechsle PP 0111]). Applying these teachings would have been a predictable variation for someone of ordinary skill in the art to Eastin’s invention. As per claim 26, Eastin significantly teaches wherein storing the logical AND of the two control qubits comprises performing at least six T gates (The system also uses eight relatively low-fidelity H states, which includes the two H states initially stored in the third and fourth qubits 54 and 55 , as well as six additional states that are utilized to produce Y-rotations within the quantum circuit [Eastin PP 0029]). As per claim 27, Eastin significantly teaches wherein storing the logical-AND of the two control qubits in the state of the ancilla qubit comprises: applying a CNOT gate between the ancilla qubit in an A state and a first one of the two control qubits (A first CNOT gate 62 targets the third qubit and is controlled by the second qubit. [Eastin PP 0031]); applying a Hermitian conjugate of a T gate to the ancilla qubit (Each Y-rotation gate 76 and 78 rotates its respective qubit by negative π/4 radians [Eastin PP 0032]); applying a CNOT gate between the ancilla qubit and a second one of the two control qubits (The sixth CNOT gate 84 targets the fourth qubit and is controlled by the first qubit. [Eastin PP 0033]); applying a T gate to the ancilla qubit (Each Y-rotation gate 66 and 68 rotates its respective qubit by negative π/4 radians. [Eastin PP 0033]); applying a CNOT gate between the ancilla qubit and the first one of the two qubits (the second CNOT gate of the second quantum circuit targets the fourth qubit and is controlled by the second qubit. [Eastin PP 0026]); applying a Hermitian conjugate of a T gate to the ancilla qubit (The rotation gate is configured to provide a rotation of π/4 radians around the Y-axis [Eastin PP 0025]); Eastin does not explicitly teach “and applying a Hadamard gate to the ancilla qubit to store the logical AND of the two control qubits in the state of the ancilla qubit”. However, Fuechsle, in an analogous art, teaches and applying a Hadamard gate to the ancilla qubit to store the logical AND of the two control qubits in the state of the ancilla qubit (applying a Hadamard gate to the nuclear spin of the first donor atom [Fuechsle PP 0035]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the quantum computing device disclosed by Eastin to incorporate Fuechsle’s teachings of surface code quantum processor architecture, in order to improve scalable surface code for error corrected computation (The architecture allows performing the operations required in surface code syndrome extraction and high-level error corrected logical operations with operational errors falling below the appropriate surface code threshold. [Fuechsle PP 0111]). Applying these teachings would have been a predictable variation for someone of ordinary skill in the art to Eastin’s invention. As per claim 28, Eastin does not explicitly teach “further comprising applying a S gate to the ancilla qubit storing the logical-AND of the two control qubits”. However, Fuechsle, in an analogous art, teaches further comprising applying a S gate to the ancilla qubit storing the logical-AND of the two control qubits (allowing coherent rotation of the nuclear spin around a y axis by an angle θ=π/2; and allowing coherent rotation of the nuclear spin around a x axis by an angle θ=π; allowing coherent rotation of the nuclear spin around a y axis by an angle θ=−π/2. [Fuechsle PP 0035]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the quantum computing device disclosed by Eastin to incorporate Fuechsle’s teachings of surface code quantum processor architecture, in order to improve scalable surface code for error corrected computation (The architecture allows performing the operations required in surface code syndrome extraction and high-level error corrected logical operations with operational errors falling below the appropriate surface code threshold. [Fuechsle PP 0111]). Applying these teachings would have been a predictable variation for someone of ordinary skill in the art to Eastin’s invention. As per claim 29, Eastin significantly teaches performing at least one Toffoli gate on two control qubits in a two-dimensional array and a target qubit in the two-dimensional array, comprising (This state can be used with the set of Clifford gates to provide a Toffoli gate, which is sufficient for universal quantum computing. [Eastin PP 0023]): storing a logical-AND of the two control qubits in a state of an ancilla qubit, wherein storing the logical AND of the two control qubits comprises applying multiple T gates to the ancilla qubit (after the parity check, the first qubit 13 , the second qubit 14 , and the unmeasured target qubit 15 represent a high-fidelity Toffoli state. [Eastin PP 0023], Each quantum circuit component further comprises at least one rotation gate configured to provide a rotation around an axis of the Bloch sphere using at least one Clifford gate and at least one single qubit magic state stored in the third set of qubits. In one implementation, each rotation gate provides one of a rotation of π/4 radians around the Y-axis and a rotation of negative π/4 radians around the Y-axis to at least one of the second set of qubits 15 and 16 . [Eastin PP 0022]); applying a CNOT quantum logic gate between (i) the ancilla qubit storing the logical-AND of the two control qubits, and (ii) a target qubit, the ancilla qubit acting as a control qubit for the CNOT quantum logic gate (In other words, one of the at least one CNOT gates is controlled by a first qubit 15 of the second set of qubits and targets another qubit 16 of the second set of qubits. [Eastin PP 0024]); and un-computing the logical-AND of the two control qubits, wherein un- computing the logical-AND of the two control qubits comprises applying multiple T gates to the ancilla qubit (a seventh CNOT gate 92 targets the fourth qubit and is controlled by the third qubit. [Eastin PP 0034], Each Y-rotation gate 66 and 68 rotates its respective qubit by negative π/4 radians. [Eastin PP 0033]). Eastin does not explicitly teach “a quantum computing device comprising: a register of qubits comprising two control qubits, a first target qubit, and an ancilla qubit; a plurality of control lines coupled to the register of qubits; a plurality of control circuits coupled to the plurality of control lines; and one or more computer-readable devices, including therein instructions that, when executed by one or more processors, cause the quantum computing device to perform operations for performing an error- corrected quantum computation using a surface code, the operations comprising:”. However, Fuechsle, in an analogous art, teaches a quantum computing device comprising: a register of qubits comprising two control qubits, a first target qubit, and an ancilla qubit (A plurality of donor atoms are disposed in a two dimensional matrix arrangement in silicon. [Fuechsle PP 0129], Data qubit elements are encoded in a first set of the plurality of donor atoms and the remaining donor atoms are arranged to facilitate quantum error correction. [Fuechsle PP 0130]); a plurality of control lines coupled to the register of qubits (two sets of control members, provided in the form of elongated control lines 108 and 106 extend across the architecture. [Fuechsle PP 0138]); a plurality of control circuits coupled to the plurality of control lines (SETs 112 can be controlled, by applying electrical signals to control lines 206 to 209 , to load or unload electrons on each donor atom 104 in the architecture or control the spin orientation [Fuechsle PP 0140]); and one or more computer-readable devices, including therein instructions that, when executed by one or more processors, cause the quantum computing device to perform operations for performing an error- corrected quantum computation using a surface code, the operations comprising (Surface code repetitions of operations between data and ancilla qubits form the basis of stabiliser measurements in well-defined geometrical patterns across the matrix. [Fuechsle PP 0109], The architecture allows performing the operations required in surface code syndrome extraction and high-level error corrected logical operations with operational errors falling below the appropriate surface code threshold. [Fuechsle PP 0111]) Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the quantum computing device disclosed by Eastin to incorporate Fuechsle’s teachings of surface code quantum processor architecture, in order to improve scalable surface code for error corrected computation (The architecture allows performing the operations required in surface code syndrome extraction and high-level error corrected logical operations with operational errors falling below the appropriate surface code threshold. [Fuechsle PP 0111]). Applying these teachings would have been a predictable variation for someone of ordinary skill in the art to Eastin’s invention. As per claim 30, Eastin significantly teaches wherein the operations further comprise applying a controlled-S gate to the two control qubits after storing the logical-AND of Application the two control qubits in the state of the ancilla qubit (A set of universal quantum gates, as the phrase used herein, is any set of quantum gates to which any operation possible on a quantum computer can be reduced, that is, any other unitary operation can be approximated as a finite sequence of gates from the set. [Eastin PP 0016], A “magic state”, as used herein, is a quantum state which can be used with Clifford gates to provide arbitrary quantum operations and can be improved in fidelity by a circuit constructed from Clifford gates. [Eastin PP 0017]). As per claim 31, Eastin significantly teaches wherein the operations further comprise: replacing the state of the ancilla qubit storing the logical-AND of the two control qubits with an A state (A “magic state”, as used herein, is a quantum state which can be used with Clifford gates to provide arbitrary quantum operations and can be improved in fidelity by a circuit constructed from Clifford gates. [Eastin PP 0017]); and providing the ancilla qubit in the A state as a resource for one or more additional operations in the error-corrected quantum computation, wherein the one or more additional operations comprise performing a T gate (rotation gate configured to provide a rotation around an axis of the Bloch sphere using at least one Clifford gate and at least one single qubit magic state stored in the third set of qubits. In one implementation, each rotation gate provides one of a rotation of π/4 radians around the Y-axis and a rotation of negative π/4 radians around the Y-axis to at least one of the second set of qubits [Eastin PP 0022]). As per claim 32, Eastin significantly teaches wherein the one or more additional operations comprise a subsequent Toffoli quantum logic gate (This state can be used with the set of Clifford gates to provide a Toffoli gate, which is sufficient for universal quantum computing. [Eastin PP 0023]). As per claim 33, Eastin significantly teaches applying a T gate to the ancilla qubit (Each Y-rotation gate 66 and 68 rotates its respective qubit by negative π/4 radians. [Eastin PP 0033]); applying a CNOT gate between the ancilla qubit and a first one of the two control qubits (A first CNOT gate 62 targets the third qubit and is controlled by the second qubit. [Eastin PP 0031]); applying a Hermitian conjugate of a T gate to the ancilla qubit (Each Y-rotation gate 76 and 78 rotates its respective qubit by negative π/4 radians [Eastin PP 0032]); applying a CNOT gate between the ancilla qubit and a second one of the two control qubits (The sixth CNOT gate 84 targets the fourth qubit and is controlled by the first qubit. [Eastin PP 0033]); applying a T gate to the ancilla qubit (Each Y-rotation gate 66 and 68 then rotates its respective qubit by π/4 radians [Eastin PP 0031]); and applying a CNOT gate between the ancilla qubit and the first one of the two control qubits to leave the ancilla qubit in the A state (a seventh CNOT gate 92 targets the fourth qubit and is controlled by the third qubit. [Eastin PP 0034]). Eastin does not explicitly teach “wherein storing the computed logical-AND of the two control qubits with the A state comprises: applying a Hadamard gate to the ancilla qubit storing the logical-AND of the two control qubits;”. However, Fuechsle, in an analogous art, teaches wherein storing the computed logical-AND of the two control qubits with the A state comprises: applying a Hadamard gate to the ancilla qubit storing the logical-AND of the two control qubits (applying a Hadamard gate to the nuclear spin of the first donor atom [Fuechsle PP 0035]); Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the quantum computing device disclosed by Eastin to incorporate Fuechsle’s teachings of surface code quantum processor architecture, in order to improve scalable surface code for error corrected computation (The architecture allows performing the operations required in surface code syndrome extraction and high-level error corrected logical operations with operational errors falling below the appropriate surface code threshold. [Fuechsle PP 0111]). Applying these teachings would have been a predictable variation for someone of ordinary skill in the art to Eastin’s invention. As per claim 34, Eastin significantly teaches wherein storing the logical AND of the two control qubits comprises performing at least six T gates (The system also uses eight relatively low-fidelity H states, which includes the two H states initially stored in the third and fourth qubits 54 and 55 , as well as six additional states that are utilized to produce Y-rotations within the quantum circuit [Eastin PP 0029]). As per claim 35, Eastin significantly teaches wherein storing the logical-AND of the two control qubits in the state of the ancilla qubit comprises: applying a CNOT gate between the ancilla qubit in an A state and a first one of the two control qubits (A first CNOT gate 62 targets the third qubit and is controlled by the second qubit. [Eastin PP 0031]); applying a Hermitian conjugate of a T gate to the ancilla qubit (Each Y-rotation gate 76 and 78 rotates its respective qubit by negative π/4 radians [Eastin PP 0032]); applying a CNOT gate between the ancilla qubit and a second one of the two control qubits (The sixth CNOT gate 84 targets the fourth qubit and is controlled by the first qubit. [Eastin PP 0033]); applying a T gate to the ancilla qubit (Each Y-rotation gate 66 and 68 rotates its respective qubit by negative π/4 radians. [Eastin PP 0033]); applying a CNOT gate between the ancilla qubit and the first one of the two control qubits (the second CNOT gate of the second quantum circuit targets the fourth qubit and is controlled by the second qubit. [Eastin PP 0026]); applying a Hermitian conjugate of a T gate to the ancilla qubit (The rotation gate is configured to provide a rotation of π/4 radians around the Y-axis [Eastin PP 0025]); Eastin does not explicitly teach “applying a Hadamard gate to the ancilla qubit to store the logical AND of the two control qubits in the state of the ancilla qubit”. However, Fuechsle, in an analogous art, teaches applying a Hadamard gate to the ancilla qubit to store the logical AND of the two control qubits in the state of the ancilla qubit (applying a Hadamard gate to the nuclear spin of the first donor atom [Fuechsle PP 0035]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the quantum computing device disclosed by Eastin to incorporate Fuechsle’s teachings of surface code quantum processor architecture, in order to improve scalable surface code for error corrected computation (The architecture allows performing the operations required in surface code syndrome extraction and high-level error corrected logical operations with operational errors falling below the appropriate surface code threshold. [Fuechsle PP 0111]). Applying these teachings would have been a predictable variation for someone of ordinary skill in the art to Eastin’s invention. As per claim 36, Eastin does not explicitly teach “wherein the operations further comprise applying a S gate to the ancilla qubit storing the logical-AND of the two control qubits”. However, Fuechsle, in an analogous art, teaches wherein the operations further comprise applying a S gate to the ancilla qubit storing the logical-AND of the two control qubits (allowing coherent rotation of the nuclear spin around a y axis by an angle θ=π/2; and allowing coherent rotation of the nuclear spin around a x axis by an angle θ=π; allowing coherent rotation of the nuclear spin around a y axis by an angle θ=−π/2. [Fuechsle PP 0035]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the quantum computing device disclosed by Eastin to incorporate Fuechsle’s teachings of surface code quantum processor architecture, in order to improve scalable surface code for error corrected computation (The architecture allows performing the operations required in surface code syndrome extraction and high-level error corrected logical operations with operational errors falling below the appropriate surface code threshold. [Fuechsle PP 0111]). Applying these teachings would have been a predictable variation for someone of ordinary skill in the art to Eastin’s invention. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to KAREEM FUAD ALHWAMDEH whose telephone number is (571)272-5501. The examiner can normally be reached Mon-Fri 7:30-5:00. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Albert Decady can be reached at (571) 272-3819. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /KAREEM FUAD ALHWAMDEH/Examiner, Art Unit 2112 /ALBERT DECADY/Supervisory Patent Examiner, Art Unit 2112
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Prosecution Timeline

Nov 22, 2024
Application Filed
Mar 11, 2026
Non-Final Rejection — §103 (current)

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