DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1 – 20 are pending.
Specification
The disclosure is objected to because of the following informalities. Appropriate correction is required.
Page 1 priority claim should be amended to “This application is a continuation under 35 U.S.C. 120 of copending Application Serial No. 17/691,358 filed March 10, 2022, now U.S. Patent No. 12,182,031
Claim Objections
Claims 1 – 20 are objected to because of the following informalities. Appropriate correction is required.
Claim 1 should be amended to “identify a first primary page table entry and a location of the first primary page table entry within the first page table, and consecutive to identifying the first primary page table entry, calculate a location of a corresponding secondary page table entry in the second page table based on the location of the first primary page table entry in said first page table”. This is so that subsequent “the primary page table entry” is not unclear as to i) whether it is referring to the one here or the one in each primary page table entry and ii) which one of plural primary page table entries is being referred to.
Claim 13 is the computer implemented method claim corresponding to system claim 1, and is objected on the same grounds as claim 1.
Claim 2 should be amended to “wherein [[the]] a respective location of each secondary page table entry has a pre-determined relationship with [[the]] a respective location of the respective primary page table entry”. This is to correct lack on antecedence basis. In addition, these locations should be labeled differently to avoid confusion with location recited in claim 1.
Claim 14 is the computer implemented method claim corresponding to system claim 2, and is objected on the same grounds as claim 2.
Claim 3 should be amended to “wherein the address translation module is further configured to retrieve [[the]] each primary page table entry and [[the]] each secondary page table entry”. This is so that it is not unclear which one of plural primary/secondary page table entries is being referred to by the primary/secondary page table entry.
Claim 3 should be amended to “optionally wherein the address translation module further copies the first primary page table entry and the corresponding secondary page table entry retrieved into a cache”. This is to maintain proper antecedence to amendments in claim 1.
Claim 15 is the computer implemented method claim corresponding to system claim 3, and is objected on the same grounds as claim 3.
Claim 6 should be amended to “wherein the address translation module walks through the first page table to identify one of the primary page table [[entry]] entries comprising a mapping of a physical address to the virtual address, on the occurrence of the cache miss”. This is so that it is not clear which one of “each primary page table entry” is being referred to.
Claim 17 is the computer implemented method claim corresponding to system claim 6, and is objected on the same grounds as claim 6.
Claim 8 should be amended to “optionally wherein the address translation module is configured to calculate the location of the corresponding secondary page table entry by adding the pre-determined offset to the location of the first primary page table entry in the first page table”. This is to maintain consistency to claim 1 that associates corresponding secondary page table entry with primary page table entry (and not respective primary page table entry). Further amendment is made to maintain consistency to amendments to claim 1.
Claim 9 should be amended to “wherein the pre-determined offset is a predetermined fixed offset with each secondary page table entry [[is]] being stored in the physical memory at a fixed same offset from the respective primary page table entry”. This is a grammatical correction.
Claim 10 should be amended to “wherein the pre-determined offset is a predetermined variable offset with each secondary page table entry [[is]] stored in the physical memory at a different offset from the corresponding primary page table entry”. This is a grammatical correction.
Claim 19 should be amended to “consecutively calculating a location of a corresponding secondary page table entry in a second page table based on the location of the primary page table entry wherein the second page table comprises secondary page table entries each corresponds to a respective primary page table entry in the first page table”. This is so that first page table and second page table have correspondence (and not unrelated) through page table entries (see spec Fig. 5 and corresponding paragraphs). There is also no disclosure of calculating said second page table entry (in said second page) that does not have correspondence with respective primary page table entry in said first page table.
Claim 20 should be amended to recite limitations of claim 19 (instead of referring back to claim 19). This is so that it is not unclear as to whether claim 20 is an independent claim or a dependent claim of claim 19.
Claims, dependent upon above identified claims, are also objected on the same grounds as said above identified claims.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1, 3 – 7, 11 – 13, 15 – 17 and 19 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1 – 13 of U.S. Patent No. 12,182,031. Although the claims at issue are not identical, they are not patentably distinct from each other because the claims at issue are anticipated by said patent.
Instant Application
Patent 12,182,031
1. A computer system, comprising:
a physical memory having:
a first page table comprising primary page table entries, wherein each primary page table entry is configured to store a mapping of a virtual memory address to a physical memory address and auxiliary information, and
a second page table comprising secondary page table entries each storing at least one further auxiliary information, wherein each secondary page table entry corresponds to a respective primary page table entry in the first page table; and
an address translation module configured to, in response to receiving a request from a processor, identify a primary page table entry and a location of the primary page table entry within the first page table, and
consecutive to identifying the primary page table entry, calculate a location of a corresponding secondary page table entry in the second page table based on the location of the primary page table entry in said first page table.
6. A computer system, comprising:
a physical memory having
a first page table comprising primary page table entries, wherein each page table entry among the primary page table entries is configured to store a mapping of a virtual memory address to a physical memory address and auxiliary information, and
a second page table comprising secondary page table entries each storing at least one further auxiliary information, wherein each of the secondary page table entries corresponds to a respective primary page table entry in the first page table; and
an address translation module configured to, in response to receiving a request from a processor, identify both a primary page table entry and a location of the primary page table entry within the first page table and
consecutively identify a location of a corresponding secondary page table entry of the secondary page table entries by adding a predetermined offset to the location of the primary page table entry in said first page table.
13. A computer implemented method performed by an address translation unit in a computer system, the computer system comprising a physical memory including a first page table having primary page table entries and a second page table having secondary page table entries, each secondary page table entry corresponding to a respective primary page table entry in the first page table, the computer implemented method comprising:
receiving a request from a processor;
identifying a primary page table entry and a location of the primary page table entry within the first page table; and
consecutively calculating a location of a corresponding secondary page table entry in the second page table based on the location of the primary page table entry.
1. A computer implemented method performed by an address translation unit in a computer system, the computer system comprising a physical memory including a first page table having primary page table entries and a second page table having secondary page table entries, each of the secondary page table entries corresponding to a respective primary page table entry in the first page table, the computer implemented method comprising:
receiving a request from a processor;
walking through the first page table to identify both a primary page table entry and a location of the primary page table entry within the first page table; and
consecutively identifying a location of a corresponding secondary page table entry of the secondary page table entries, by adding a predetermined offset to the location of the primary page table entry.
19. A non-transitory computer readable storage medium having stored thereon computer readable code configured to when the code is run perform a method comprising:
receiving a request from a processor;
identifying a primary page table entry and a location of the primary page table entry within a first page table; and
consecutively calculating a location of a corresponding secondary page table entry in a second page table based on the location of the primary page table entry.
5. A non-transitory computer readable storage medium having stored thereon computer readable code configured to cause, when the code is run, a computer system comprising a physical memory including a first page table having primary page table entries and a second page table having secondary page table entries, each of the secondary page table entries corresponding to a respective primary page table entry in the first page table, to perform a method comprising:
receiving a request from a processor;
walking through the first page table to identify both a primary page table entry and a location of the primary page table entry within the first page table; and
consecutively identifying a location of a corresponding secondary page table entry of secondary page table entries in the second page table, by adding a predetermined offset to the location of the primary page table entry.
Claims 3 – 7 and 11 – 12 map to claims 7 – 13 of Patent 12,182,031.
Claims 15 – 17 map to claims 2 – 4 of Patent 12,182,031.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitations are as follows.
“an address translation module configured to, in response to receiving a request from a processor, walk through the first page table to identify a primary page table entry and consecutive to identifying the primary page table entry, calculate a location of a corresponding secondary page table entry in the second page table based on the location of the primary page table entry in said first page table” in claim 1
“wherein the address translation module is further configured to retrieve the primary page table entry and the secondary page table entry, optionally wherein the address translation module further copies the primary page table entry and the corresponding secondary page table entry retrieved into a cache” in claim 3
“wherein the address translation module on receiving a request, that is a virtual address, is configured to: search, in the cache, for valid address translation from the virtual address to a physical address; provide the physical address to the processor, on identifying the valid address translation for the virtual address in the cache; and invoke a cache miss, in the absence of the valid address translation in the cache, wherein the invoking of the cache miss is handled by the address translation module by using a page table walker or by raising a software exception handler” in claim 5
“wherein the address translation module walks through the first page table to identify the primary page table entry comprising a mapping of a physical address to the virtual address, on the occurrence of the cache miss” in claim 6
“A computer implemented method performed by an address translation unit in a computer system” and “the computer implemented method comprising: receiving a request from a processor; walking through the first page table to identify a primary page table entry; and consecutively calculating a location of a corresponding secondary page table entry in the second page table based on the location of the primary page table entry” in claim 13
“wherein the method further comprises retrieving the primary page table entry and the secondary page table entry” in claim 15
“wherein the method further comprises storing a plurality of address translations, each from a virtual memory address to a physical memory address in a cache and wherein the method further comprises, on receiving a request from the processor, where the request is a virtual address: searching, in the cache, for valid address translation from the virtual address to a physical address; providing the physical address to the processor, on identifying the valid address translation for the virtual address in the cache; and invoking a cache miss, in the absence of the valid address translation in the cache” in claim 16
“wherein the method comprising walking through the first page table to identify the primary page table entry comprising a mapping of a physical address to the virtual address, on the occurrence of the cache miss” in claim 17
“wherein the method further comprises consecutively identifying the corresponding secondary page table entry to identify at least one further auxiliary information” in claim 18
Because these claim limitations are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, they are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1, 5 – 6, 13 and 16 – 18 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
As noted supra, claims 1, 5 – 6, 13 and 16 – 18 recite limitations that invoke 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. In this instance, corresponding structure (of address translation module) refers to computer implemented means-plus function (see spec ¶[87] address translation module as software and spec ¶[138] software executed by processor). The claimed functions (outlined below), corresponding to said address translation module, are specialized computer functions that would require algorithms to be disclosed, in addition to the physical structure (in this instance processor) that would perform the algorithms. However, the specification does not provide sufficient details such that one of ordinary skill in the art would understand the algorithms that are used to perform the claimed functions. This renders the claims unclear as to the algorithms that are being referred to in the instant specification. Therefore, the claims are indefinite and are rejected under 35 U.S.C. 112(b) or pre-AIA 35 U.S.C. 112, second paragraph. For the purposes of examination, Examiner is interpreting the limitation to refer to MMU implementing the claimed function.
“walk through the first page table to identify a primary page table entry” in claim 1
“search, in the cache, for valid address translation from the virtual address to a physical address; provide the physical address to the processor, on identifying the valid address translation for the virtual address in the cache; and invoke a cache miss, in the absence of the valid address translation in the cache, wherein the invoking of the cache miss is handled by the address translation module by using a page table walker or by raising a software exception handler” in claim 5
“identify the primary page table entry comprising a mapping of a physical address to the virtual address, on the occurrence of the cache miss” in claim 6
“walking through the first page table to identify a primary page table entry” in claim 13
“searching, in the cache, for valid address translation from the virtual address to a physical address; providing the physical address to the processor, on identifying the valid address translation for the virtual address in the cache; and invoking a cache miss, in the absence of the valid address translation in the cache” in claim 16
“identify the primary page table entry comprising a mapping of a physical address to the virtual address, on the occurrence of the cache miss” in claim 17
“consecutively identifying the corresponding secondary page table entry to identify at least one further auxiliary information” in claim 18
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1, 5 – 6, 13 and 16 – 18 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Regarding claims 1, 5 – 6, 13 and 16 – 18, as described in 112(b) supra with respect to corresponding structure in the specification, the specification does not provide sufficient disclosure as to algorithms used to perform the claim functions. Therefore, the claims are also rejected under 35 U.S.C. §112(a) written description as failing to provide sufficient disclosure such that one of ordinary skill can reasonably conclude that Applicant had possession of the claimed invention.
Allowable Subject Matter
Claim 1 recites, at least, calculating location of secondary page table entry (in second page table) based on location of primary page table entry wherein said secondary page table entry corresponds to said primary page table entry. This subject matter is reflected in the following limitations of claim 1.
a second page table comprising secondary page table entries each storing at least one further auxiliary information, wherein each secondary page table entry corresponds to a respective primary page table entry in the first page table; and
an address translation module configured to, in response to receiving a request from a processor, identify a primary page table entry and a location of the primary page table entry within the first page table, and consecutive to identifying the primary page table entry, calculate a location of a corresponding secondary page table entry in the second page table based on the location of the primary page table entry in said first page table
Sharp (US 20140331023) teaches reading, at alternative location (location) (see Sharp ¶[73]), page table entry 162 (secondary page table entry) (in particular page table (second page table)) based on ID that is in a location (location) within page table entry 160 (primary page table) (see Sharp Fig. 2, ¶[74-75]) wherein said page table entry 160 is in particular page table (first page table) associated with first processing unit (see Sharp ¶[68]). Note that Sharp teaches that said alternative location is generically determined (i.e. based on) from said location in said page table entry 160 whereas claim 1 required that said alternative location be calculated from said location in said page table entry 160. In other word, Sharp teaches generic determination whereas claim 1 requires specific calculation. Therefore, claim 1 is allowable over Sharp.
Claim 13 is the computer-implemented method claim corresponding to system claim 1, and is allowable over prior art for the same reasons as claim 1.
Claim 19 recites the same allowable subject matter as claim 1, and is allowable over prior art for the same reasons as claim 1.
Claims, dependent upon independent claims 1, 13 or 19, are also allowable over prior art for the same reasons as said independent claims.
Additional Remarks
Kaplan (US 11954026) teaches page table 120 (first page table) include entries (primary page table entries) with pointers to extended page table 121 (second page table) that include entries (secondary page table entries) for extended attributes (further auxiliary information) (see Kaplan col 1 ln 44-47, also exemplary embodiment Fig. 5 and corresponding paragraphs). This is relevant to claims 1, 13 and 19.
In order to overcome §112(a) and §112(b) rejections due to 112(f) interpretation, Examiner suggests replacing “address translation module” with “memory management unit” (MMU) (see spec Fig. 1). MMU is a known term in the art to refer to memory controller and thus would have sufficient structure to avoid invoking 112(f).
Conclusion
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/CHIE YEW/ Primary Examiner, Art Unit 2139