DETAILED ACTION
This Office action is in response to the Preliminary amendment filed on March 06, 2025.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on March 05, 2026 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Drawings
The drawings were filed on November 25, 2024. These drawings are accepted by the Examiner.
Specification
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 40-44 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of U.S. Pat. No. 12,155,301 B2.
U.S. Pat. Application 18/959,526 claims:
U.S. Pat. No. 12,155,301 B2 claims:
40. A multi-level converter comprising: an M-level converter cell configured to transform an input voltage applied to an input terminal to an output voltage on an output terminal in response to control inputs; a controller coupled to the M-level converter cell, wherein the controller is configured to: monitor a node of the M-level converter cell; and generate the control inputs to the M-level converter cell in response to monitoring the node; and a sub-harmonic signal generator coupled to the controller, wherein the sub-harmonic signal generator is configured to selectively inject a sub-harmonic signal into a signal path of the controller.
41. The multi-level converter of claim 40, wherein the sub-harmonic signal generator is configured to inject the sub-harmonic signal when an average current through the output terminal is approximately zero amps.
1. A multi-level converter including: (a) an M-level converter cell including at least one fly capacitor and configured to transform an input voltage applied to an input terminal to an output voltage on an output terminal in response to control inputs; (b) a controller coupled to the M-level converter cell, the controller configured to monitor a node of the M-level converter cell and to generate the control inputs to the M-level converter cell in response to such monitoring; and (c) a sub-harmonic generator coupled to the controller and configured to selectively inject a sub-harmonic signal into a signal path of the controller; wherein the injected sub-harmonic signal induces a sub-harmonic ripple current at the output terminal of the M-level converter cell to facilitate balancing of charge across the at least one fly capacitor; and wherein the sub-harmonic signal generator is configured to inject the sub-harmonic signal when an average current through the output terminal is approximately zero amps.
Claims 42-44 depend directly or indirectly from a rejected claim and are, therefore, also rejected under Non-Statutory Double Patenting, at least for the same reasons set above.
Allowable Subject Matter
Claims 2-39 are allowed.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding to claim 2, the prior art of record fails to disclose or suggest “a controller defining charging cycles and discharging cycles for the M-level converter, the method comprising: adding an extra charging cycle near or at a zero-current crossing point after a discharging cycle; and adding an extra discharging cycle near or at a zero-current crossing point after a charging cycle” in combination with other limitations of the claim. Claims 3-20 depend directly or indirectly from claim 2 and are, therefore, also indicated as allowable at least for the same reasons set above.
Regarding to claim 21, the prior art of record fails to disclose or suggest “a controller coupled to the M-level converter cell, wherein the controller is configured to: monitor a node of the M-level converter cell; define charging cycles and discharging cycles for the M-level converter in response to monitoring the node; generate the control inputs to the M-level converter cell as a function of the defined charging cycles and the defined discharging cycles; add an extra charging cycle near or at a zero-current crossing point after a discharging cycle; and add an extra discharging cycle near or at a zero-current crossing point after a charging cycle” in combination with other limitations of the claim. Claims 22-39 depend directly or indirectly from claim 21 and are, therefore, also indicated as allowable at least for the same reasons set above.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to RAFAEL O. DE LEÓN DOMENECH whose telephone number is (571)270-0517. The examiner can normally be reached 8:00 a.m. -5:00 p.m..
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Hammond Crystal can be reached at (571) 270-1682. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/RAFAEL O DE LEON DOMENECH/Primary Examiner, Art Unit 2838