DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of Claims
Applicant's amendments filed on 5 August 2026 have been entered. Claim 1 has been amended. No claims have been canceled. No claims have been added. Claims 1-20 are still pending in this application, with claims 1, 16, and 20 being independent.
Response to Arguments
Applicant's arguments filed 5 August 2026 have been fully considered but they are not persuasive.
Applicant argues that:
(A) Venkatesh does not disclose (1) "performing, for a current render, a geometry processing phase comprising, for each region in the plurality of regions storing total coverage data to indicate which of the primitives which are present in the region totally cover the region."
Examiner notes that in fact, Venkatesh is cited as teaching the storing total coverage data, and that the Heggelund reference is cited as teaching the rest of the limitation, as is outlined below. That is, Venkatesh is cited as modifying the teachings of Heggelund to teach the storage aspect of the aforementioned limitation.
Applicant further argues that:
(B) Venkatesh also does not disclose (2) "after the geometry processing phase has completed for the current render, performing, for the current render, for each of the regions in the plurality of regions on a region-by-region basis, a rendering phase."
Paragraph 168 of Venkatesh states "The 3D pipeline will perform geometry processing for the 3D primitives. Once operations are complete, the resulting geometric objects are rasterized and the pixel engine colors the resulting pixels." However, this passage does not disclose completing the whole of a geometry phase for a current render before performing a rendering phase for the current render. Furthermore, it is not a disclosure of performing a rendering phase on a region-by-region basis, as is required by claim 1. This feature is also not disclosed in paragraph 208 cited by the Examiner
Examiner points to cited paragraph [0208], which states: “geometry stage 1522, the rasterization stage 1524 and the output merger stage 1526 are typically performed by the GPU 1520. The GPU 1520 may be integrated within the CPU 1510 or a discrete device coupled to the CPU 1510 via an interface technology, such as PCI Express (PCIe) or the like. The geometry stage 1522 is generally responsible for operations associated with continuous primitives (e.g., polygons) and their vertices. The rasterization stage 1524 involves, among other things, the creation of discrete fragments from the continuous primitives, determining the visibility of pixels, for example, in the case of overlapping primitives and computing color and other attributes of pixels. Earlier identification of an occluded pixel by way of EarlyZ, for example, allows fewer resources and processing to be invested on a pixel that will not ultimately be displayed. The output merger stage 1526 generally involves generation of the final rendered pixel color using, a combination of, among other things, pipeline state and the pixel data generated by the pixel shaders. As FIG. 15 is intended primarily to provide context for the rasterization stage 1524, for sake of brevity, the other stages have been summarized at a high-level,” noting that clearly said “rasterization stage 1524 involves, among other things, the creation of discrete fragments from the continuous primitives, determining the visibility of pixels, for example, in the case of overlapping primitives and computing color and other attributes of pixels” reads on the claimed limitation “for each of the regions in the plurality of regions on a region-by-region basis, a rendering phase”.
Thus, Examiner maintains the rejections for at least the above reasons.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-5, 7, 8, 10-16, and 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over Heggelund et al. (U.S. Pub. 2019/0188896), referred herein as Heggelund, in view of Venkatesh et al. (U.S. Pub. 2021/0097639), referred herein as Venkatesh.
Regarding claim 1, Heggelund discloses a method of rendering primitives in a graphics processing system which is configured to use a rendering space which is subdivided into a plurality of regions (para 35; para 38, lines 1-9), the method comprising: performing, for a current render, a geometry processing phase comprising, for each region in the plurality of regions: determining, for each of a plurality of primitives which are present in the region, whether the primitive totally covers the region (para 51); and performing, for the current render, for each of the regions in the plurality of regions on a region-by-region basis, a rendering phase for rendering primitives within the region using the total coverage data for the region (paras 69-73: patch buffer may be provided for one or more levels of the patch hierarchy (e.g. for each level except the highest level). The (and, e.g., each) buffer may be operated substantially in the manner of a FIFO, i.e. by selecting patches on a first-in-first-out basis…maintain at least a degree of the original primitive rasterisation order when processing plural primitives for the render output. This may, for example, be desirable or necessary for certain types of graphics processing in which primitive rasterisation order should be substantially maintained by the graphics processing system; Paragraph [0087]: a similar manner to a (fully covered) patch, one or more other signals or data structures may also be buffered in and/or output by the rasteriser, for example while maintaining an output order for those signals or data structures relative to an input order for those signals or data structures. For example, in a similar manner to a (fully covered) patch, those one or more other signals or data structures may be buffered (e.g. in the patch buffer(s) mentioned above) and/or may bypass the sample tester (e.g. via the bypass circuitry described above). These one or more other signals or data structures may, for example, indicate and/or describe one or more of: the beginning of a tile or frame (e.g. for synchronization purposes); the end of a tile or frame (e.g. for synchronization purposes); a (e.g. depth and/or stencil) buffer clear and/or pre-load instruction; and a full-tile or full-frame primitive (e.g. which represents a previously (partially) rendered version of the tile or frame (which may be referred to as a “frame shader”)), etc).
In Heggelund, when selectively processing the primitives, a determination is made as to whether primitives totally cover the region, thus it can be inferred that this necessitates “data to indicate total coverage of the region.” However, Heggelund does not explicitly discuss and storing total coverage data to indicate which of the primitives which are present in the region totally cover the region; and performing, for the current render, for each of the regions in the plurality of regions, a rendering phase; or after the geometry processing phase has completed for the current render, performing, for the current render, for each of the regions in the plurality of regions, a rendering phase.
Venkatesh teaches a method of rendering primitives in a graphics processing system, comprising storing total coverage data to indicate which of the primitives which are present in the region totally cover the region (para 204, lines 1-11); and performing, for the current render, for each of the regions in the plurality of regions, a rendering phase (fig 15; para 168, the last 6 lines; para 208), and using the retrieved primitive data and the total coverage data for the region to determine rendered values for the region (para 208, lines 8-19), a geometry and rendering phase to determine rendering values based on primitive coverage (para 208, lines 1-19), and further comprising primitive indication data for the region to indicate the determined plurality of primitives which are present in the region (para 204, lines 1-11); after the geometry processing phase has completed for the current render, performing, for the current render, for each of the regions in the plurality of regions, a rendering phase (fig 15; para 168, the last 6 lines; para 208). It would have been obvious to one of ordinary skill in the art to store data indicating total coverage of the region because as taught by Venkatesh, this helps to retain higher quality rendering output without sacrificing processing performance (see, for example, Venkatesh para 5 and para 33, lines 1-11). It would have been obvious to one of ordinary skill in the art to store data indicating total coverage of the region because as taught by Venkatesh, this helps to retain higher quality rendering output without sacrificing processing performance (see, for example, Venkatesh para 5 and para 33, lines 1-11).
Regarding claim 2, Heggelund in view of Venkatesh teaches the method of claim 1, Heggelund discloses wherein the geometry processing phase comprises, for each region in the plurality of regions, storing primitive indication data for the region to indicate the plurality of primitives which are present in the region (paras 69-73: patch buffer may be provided for one or more levels of the patch hierarchy (e.g. for each level except the highest level). The (and, e.g., each) buffer may be operated substantially in the manner of a FIFO, i.e. by selecting patches on a first-in-first-out basis…maintain at least a degree of the original primitive rasterisation order when processing plural primitives for the render output. This may, for example, be desirable or necessary for certain types of graphics processing in which primitive rasterisation order should be substantially maintained by the graphics processing system; Paragraph [0087]: a similar manner to a (fully covered) patch, one or more other signals or data structures may also be buffered in and/or output by the rasteriser, for example while maintaining an output order for those signals or data structures relative to an input order for those signals or data structures. For example, in a similar manner to a (fully covered) patch, those one or more other signals or data structures may be buffered (e.g. in the patch buffer(s) mentioned above) and/or may bypass the sample tester (e.g. via the bypass circuitry described above). These one or more other signals or data structures may, for example, indicate and/or describe one or more of: the beginning of a tile or frame (e.g. for synchronization purposes); the end of a tile or frame (e.g. for synchronization purposes); a (e.g. depth and/or stencil) buffer clear and/or pre-load instruction; and a full-tile or full-frame primitive (e.g. which represents a previously (partially) rendered version of the tile or frame (which may be referred to as a “frame shader”)), etc).
Regarding claim 3, Heggelund in view of Venkatesh teaches the method of claim 2, Venkatesh discloses wherein the rendering phase for rendering primitives within the region comprises, based on the primitive indication data for the region, retrieving primitive data for the primitives which are present in the region (para 208, lines 8-19); and using the retrieved primitive data and the total coverage data for the region to determine rendered values for the region (para 208, lines 8-19).
Regarding claim 4, Heggelund in view of Venkatesh teaches the method of claim 3, Heggelund discloses wherein the total coverage data indicates, for each of the primitives present in the region, whether that primitive totally covers the region and the method comprises, for primitives for which the total coverage data does not indicate total coverage of the region, determining which sample points within the region are covered by said primitives based on the retrieved primitive data (paras 48 and 51).
Regarding claim 5, Heggelund in view of Venkatesh teaches the method of claim 1, Heggelund discloses wherein the total coverage data indicates, for each of the primitives present in the region, whether that primitive totally covers the region and if the total coverage data indicates total coverage of the region for a particular primitive, then determining which sample points within the region are covered by the particular primitive is skipped during the rendering phase(para 64; para 66, lines 1-13; para 75; paras 83 and 85).
Regarding claim 7, Heggelund in view of Venkatesh teaches the method of claim 1, Heggelund discloses wherein said determining whether a primitive totally covers a region comprises determining whether the primitive covers every sample point in the region (paras 42 and 51; para 65).
Regarding claim 8, Heggelund in view of Venkatesh teaches the method of claim 1, Heggelund discloses wherein said determining whether a primitive totally covers a region comprises determining whether the primitive covers the entire area of the region (paras 49 and 51).
Regarding claim 10, Heggelund in view of Venkatesh teaches the method of claim 1, Heggelund discloses wherein said determining whether a primitive totally covers a region comprises: for each edge of the primitive: determining which of the corners of the region is most likely to be outside of the edge, and determining whether the determined corner is inside the edge (paras 48 and 51).
Regarding claim 11, Heggelund in view of Venkatesh teaches the method of claim 1, Heggelund discloses wherein the region is a tile of the rendering space (para 36).
Regarding claim 12, Heggelund in view of Venkatesh teaches the method of claim 1, Heggelund discloses wherein the region is a group of tiles of the rendering space (paras 38 and 87).
Regarding claim 13, Heggelund in view of Venkatesh teaches the method of claim 1, wherein the total coverage data for the region comprises, for each of the primitives which is present in the region, indicate whether the primitive totally covers of the region (Heggelund, paras 53 and 57; Venkatesh, para 204, lines 1-11).
Regarding claim 14, Heggelund in view of Venkatesh teaches the method of claim 1, Heggelund discloses wherein the rendered values represent: an image of a scene as viewed from a viewpoint; or a texture to be applied to a surface in a scene (paras 36 and 42).
Regarding claim 15, Heggelund in view of Venkatesh teaches the method of claim 1, Venkatesh discloses wherein the geometry processing phase is performed without performing rasterisation on primitives (para 64, lines 1-11 and the last 13 lines; para 168, the last 6 lines).
Regarding claim 16, the limitations of this claim substantially correspond to the limitations of claim 1; thus they are rejected on similar grounds.
Regarding claim 18, the limitations of this claim substantially correspond to the limitations of claim 7; thus they are rejected on similar grounds.
Regarding claim 19, the limitations of this claim substantially correspond to the limitations of claim 8; thus they are rejected on similar grounds.
Regarding claim 20, the limitations of this claim substantially correspond to the limitations of claim 1 (except for the medium and integrated circuit, which are taught by Heggelund, paras 123, 129, and 132; and Venkatesh, para 18 and para 43, lines 1-9); thus they are rejected on similar grounds.
Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Heggelund, in view of Venkatesh, and further in view of Boudier (U.S. Pub. 2017/0084078), referred herein as Boudier.
Regarding claim 9, Heggelund in view of Venkatesh teaches the method of claim 1, Heggelund discloses wherein said determining whether a primitive totally covers a region comprises: determining an axis-aligned bounding box of the primitive, wherein the primitive is triangular (paras 35 and 164; Venkatesh, para 78 and para 98, lines 1-5).
Heggelund in view of Venkatesh does not teach determining a size of the bounding box in both horizontal and vertical directions; and comparing the size of the bounding box in the horizontal direction (BBx) with a size of the region in the horizontal direction (Rx), and comparing the size of the bounding box in the vertical direction (BBy) with a size of the region in the vertical direction (Ry), wherein the region is rectangular; wherein the primitive is determined to not totally cover the region if any of the following conditions are satisfied: (i) BBx<Rx, (ii) BBy<Ry, or (iii) (BBx<2Rx) AND (BBy<2Ry).
Boudier teaches a method of rendering primitives in a graphics processing system using a rendering space divided into a plurality of regions, comprising a geometry phase and rendering phase (paras 40 and 41), and comprising determining a size of the bounding box in both horizontal and vertical directions; and comparing the size of the bounding box in the horizontal direction (BBx) with a size of the region in the horizontal direction (Rx), and comparing the size of the bounding box in the vertical direction (BBy) with a size of the region in the vertical direction (Ry), wherein the region is rectangular; wherein the primitive is determined to not totally cover the region if any of the following conditions are satisfied: (i) BBx<Rx, (ii) BBy<Ry, or (iii) (BBx<2Rx) AND (BBy<2Ry) (para 64, lines 1-14; para 66; para 67, lines 1-14). It would have been obvious to one of ordinary skill in the art to utilize such bounding boxes because as taught by Boudier, this helps reject primitives that do not cover samples, such that computations during rasterization can be reduced and primitive processing throughput can be improved (see, for example, Boudier, paras 23 and 24).
Claims 6 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Heggelund, in view of Venkatesh, and further in view of Kakarlapudi et al. (U.S. Patent Application Publication No. 2017/0330372), referred herein as Kakarlapudi.
Regarding claim 6, Heggelund in view of Venkatesh teaches the method of claim 1, wherein for each of the regions the primitive indication data for the region is stored, and wherein the total coverage data is stored for the region (Heggelund, paras 53 and 57; Venkatesh, para 204, lines 1-11).
Heggelund in view of Venkatesh does not explicitly teach storing this data in a control list.
Kakarlapudi teaches a method of rendering primitives in a graphics processing system using a rendering space divided into a plurality of regions, comprising a geometry phase and rendering phase (paras 21-23; paras 117 and 118), and further comprising storing primitive indication data in a control list for the region (paras 126 and 129; para 163). It would have been obvious to one of ordinary skill in the art to utilize control lists because as taught by Kakarlapudi, this helps reduce memory and processing loads without reducing output image quality (see, for example, Kakarlapudi, para 8, lines 1-6; paras 9 and 10; para 131).
Regarding claim 17, the limitations of this claim substantially correspond to the limitations of claim 6; thus they are rejected on similar grounds.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MATTHEW D SALVUCCI whose telephone number is (571)270-5748. The examiner can normally be reached M-F: 7:30-4:00PT.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, XIAO WU can be reached at (571) 272-7761. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/MATTHEW SALVUCCI/Primary Examiner, Art Unit 2613
Prosecution Insights