DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 3/23/2026 has been entered.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-16 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. USPN 12,190,792 B2 in view of Ka et al. (USPN 2017/0294502 A1) in view of Kwon et al. (USPN 2018/0083072 A1). Although the claims at issue are not identical, they are not patentably distinct from each other because it is clear that most of the elements of the application claims 1-16 are found in patent claims 1-20 (see chart below). The difference between the application claims 1-16 and the patent claims 1-20 is underlined below. Thus the invention of claims 1-20 of the patent is in effect a “species” of the “generic” invention of the application claims 1-16. It has been held that the generic invention is “anticipated” by the “species”. Further, the underlined differences are taught by the combination of Ka and Kwon. It would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to further modify the display device of USPN 12,190,792 B2 to include the details taught by Ka and Kwon. Ka teaches wherein each of the plurality of subpixels includes a driving transistor for driving a light-emitting device and including a gate electrode, first electrode and second electrode (see at least fig. 5: DT). It would have been obvious to modify Ka so that the first and second data lines correspond to the color-based subpixel groupings taught by Kwon, such that one of the adjacent detour data lines in the boundary area supplies green subpixels and another supplies non-green subpixels, because Kwon teaches that such grouping is suitable for high-resolution OLED displays and represents a known data-line-to-subpixel assignment. It further would have been obvious, as a matter of routine layout optimization within the boundary/detour area of Ka, to select the relative positioning of those adjacent data lines such that the data line supplying green subpixels is disposed closer to the hole area than the data line supplying non-green subpixels. Ka already teaches multiple adjacent detour routing paths around the hole area, and selecting which signal occupies which of the known adjacent paths amounts to choosing from a finite number of predictable layout alternatives. A person of ordinary skill in the art would have recognized that assigning the green-subpixel data line to the path closer to the hole area would have been an obvious design choice in view of the known importance of green subpixels in OLED/PenTile arrangements for luminance and resolution, and the known desire to optimize routing, signal integrity, and layout efficiency in constrained boundary regions surrounding hole areas. The combination of USPN 12,190,792 B2, Ka and Kwon therefore represent the use of prior art elements according to their established functions to achieve no more than predictable results.
Instant Application 18/960268
USPN 12,190,792 B2
1. A display device, comprising:
a display panel having an active area where a plurality of subpixels are disposed over a substrate;
at least one hole area surrounded by the active area;
a boundary area disposed between the at least one hole area and the active area;
a first data line disposed on the active area and the boundary area, and configured to supply a first data voltage to each of a first group of subpixels representing at least one first color among the plurality of subpixels, the first group of subpixels not including green subpixels; and
a second data line disposed on the active area and the boundary area, and configured to supply a second data voltage to each of a second group of subpixels representing a second color among the plurality of subpixels, the second group of subpixels including the green subpixels,
wherein a vertical distance between the second data line and the substrate is different from a vertical distance between the first data line and the substrate.
wherein each of the plurality of subpixels includes a driving transistor configured to drive a light-emitting device and including a gate electrode, a first electrode and a second electrode, and
wherein in the boundary area, the first and second data lines are disposed adjacent to each other, and the second data line supplying the second data voltage to each of the green subpixels is disposed closer to the at least one hole area than the first data line supplying the first data voltage to the first group of subpixels not including green subpixels.
1. A display device, comprising:
a display panel including a substrate on which an active area where a plurality of subpixels are disposed is defined;
at least one hole area surrounded by the active area;
a boundary area disposed between the at least one hole area and the active area;
at least one gate line to supply a scan signal or an emission signal to a first group of subpixels among the plurality of subpixels;
a first data line disposed on the active area and the boundary area, the first data line being configured to supply first data voltages to a second group of subpixels including at least one first color subpixel and at least one second color subpixel among the plurality of subpixels, the second group not including any green subpixels; and
a second data line disposed on the active area and the boundary area, the second data line being configured to supply a second data voltage to a third group of subpixels including at least one green subpixel different from the first and second color subpixels among the plurality of subpixels,
wherein in the boundary area, a vertical distance of the second data line from the substrate is different from a vertical distance of the first data line from the substrate, to reduce a load of the second data line to prevent a decrease of luminance in an area located around the at least one hole area.
See combination Ka et al. (US 2017/0294502 A1) in view of Kwon et al. (US 2018/0083072 A1) as outlined in rejection below
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1 and 5-14 are rejected under 35 U.S.C. 103 as being unpatentable over Ka et al. (USPN 2017/0294502 A1) in view of Kwon et al. (USPN 2018/0083072 A1)
As to claim 1, Ka teaches a display device, comprising:
a display panel having an active area where a plurality of subpixels are disposed over a substrate (see at least figs. 1-3: subpixels PX, display area AA, substrate 100; [0008] “a display apparatus includes a substrate including a display area … The display apparatus includes a plurality of pixel circuits disposed in the display area”);
at least one hole area surrounded by the active area (see at least figs. 1-2: hole area FA);
a boundary area disposed between the at least one hole area and the active area (see at least figs. 1-2: detour area WA);
a first data line disposed on the active area and the boundary area (see at least fig. 2: DL1);
a second data line disposed on the active area and the boundary area (see at least fig. 2: DL2);
wherein a vertical distance between the second data line and the substrate is different from a vertical distance between the first data line and the substrate (see at least figs. 2-4: note that data lines DL1 & DL2 become detour lines DT1 and DT2 respectively within the boundary area. The first data line DT1 is at a different vertical distance from the substrate 100 than the second data line DT2);
wherein each of the plurality of subpixels includes a driving transistor configured to drive a light-emitting device and including a gate electrode, a first electrode and a second electrode (see at least fig. 5: driving transistor DT driving OLED);
and wherein in the boundary area, the first and second data lines are disposed adjacent to each other (see at least fig. 2; detour lines DT1 and DT2 are routed side-by-side within the limited boundary/detour area WA surrounding the hole area FA, such that the lines are adjacent as a matter of layout).
Ka does not directly teach a first data line configured to supply a first data voltage to each of a first group of subpixels representing at least one first color among the plurality of subpixels, the first group of subpixels not including green subpixels; a second data line configured to supply a second data voltage to each of a second group of subpixels representing a second color among the plurality of subpixels, the second group of subpixels including the green subpixels; and wherein, in the boundary area, the second data line supplying the second data voltage to each of the green subpixels is disposed closer to the at least one hole area than the first data line supplying the first data voltage to the first group of subpixels not including green subpixels.
Kwon teaches a first data line configured to supply a first data voltage to each of a first group of subpixels representing at least one first color among the plurality of subpixels, the first group of subpixels not including green subpixels (see at least figs. 3A-3B; separate data lines are used to drive non-green subpixels such as red and blue);
a second data line configured to supply a second data voltage to each of a second group of subpixels representing a second color among the plurality of subpixels, the second group of subpixels including the green subpixels (see at least figs. 3A-3B and fig. 8; green subpixels are driven via a distinct data line DL2);
thereby teaching a known color-based data line grouping (e.g., PenTile-type arrangement) in which green subpixels are supplied by a data line separate from that supplying non-green subpixels.
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to modify Ka so that the first and second data lines correspond to the color-based subpixel groupings taught by Kwon, such that one of the adjacent detour data lines in the boundary area supplies green subpixels and another supplies non-green subpixels, because Kwon teaches that such grouping is suitable for high-resolution OLED displays and represents a known data-line-to-subpixel assignment. It further would have been obvious, as a matter of routine layout optimization within the boundary/detour area of Ka, to select the relative positioning of those adjacent data lines such that the data line supplying green subpixels is disposed closer to the hole area than the data line supplying non-green subpixels. Ka already teaches multiple adjacent detour routing paths around the hole area, and selecting which signal occupies which of the known adjacent paths amounts to choosing from a finite number of predictable layout alternatives. A person of ordinary skill in the art would have recognized that assigning the green-subpixel data line to the path closer to the hole area would have been an obvious design choice in view of the known importance of green subpixels in OLED/PenTile arrangements for luminance and resolution, and the known desire to optimize routing, signal integrity, and layout efficiency in constrained boundary regions surrounding hole areas. The combination of Ka and Kwon therefore represents the use of prior art elements according to their established functions to achieve no more than predictable results.
As to claim 9, Ka teaches a display device, comprising:
a display panel including a substrate on which an active area where a plurality of subpixels are disposed is defined (see at least figs. 1-3: subpixels PX, display area AA, substrate 100 and [0008] “a display apparatus includes a substrate including a display area … The display apparatus includes a plurality of pixel circuits disposed in the display area”);
at least one hole area surrounded by the active area (see at least figs. 1-2: hole area FA);
a boundary area disposed between the at least one hole area and the active area (see at least figs. 1-2: detour area WA);
at least one gate line supplying a scan signal or an emission signal to a first group of subpixels among the plurality of subpixels (see at least figs. 2-4: SL1/GW, and fig. 5: EM);
a first data line disposed on the active area and the boundary area (see at least figs. 2-4: DL1/DT1);
a second data line disposed on the active area and the boundary area (see at least figs. 2-4: DL2/DT2);
wherein in the boundary area, a vertical distance of the second data line from the substrate is different from a vertical distance of the first data line from the substrate, wherein each of data lines running through the boundary area is any one of the first data line and the second data line (see at least figs. 2-4 and note that data lines DL1 & DL2 become detour lines DT1 & DT2 respectively within the boundary area. The first data line DT1 is at a different vertical distance from the substrate 100 than second data line DT2);
wherein each of the plurality of subpixels includes a driving transistor configured to drive a light-emitting device and including a gate electrode, a first electrode and a second electrode (see at least fig. 5: driving transistor DT driving OLED);
and wherein in the boundary area, the first and second data lines are disposed adjacent to each other (see at least fig. 2; detour lines DT1 and DT2 are routed side-by-side within the limited boundary/detour area WA surrounding the hole area FA, such that the lines are adjacent as a matter of layout).
Ka does not directly teach a first data line configured to supply first data voltages to a second group of subpixels including at least one first color subpixel and at least one second color subpixel among the plurality of subpixels, the second group of subpixels not including green subpixels; a second data line configured to supply a second data voltage to a third group of subpixels including at least one third color subpixel different from the first and second color subpixels among the plurality of subpixels, the third group of subpixels including the green subpixels; and wherein in the boundary area, the second data line supplying the second data voltage to each of the green subpixels is disposed closer to the at least one hole area than the first data line supplying the first data voltage to the first group of subpixels not including green subpixels.
Kwon teaches a first data line configured to supply first data voltages to a second group of subpixels including at least one first color subpixel and at least one second color subpixel among the plurality of subpixels, the second group of subpixels not including green subpixels (see at least figs. 3A-3B; separate data lines are used to drive non-green subpixels such as red and blue);
a second data line configured to supply a second data voltage to a third group of subpixels including at least one third color subpixel different from the first and second color subpixels among the plurality of subpixels, the third group of subpixels including the green subpixels (see at least figs. 3A-3B and fig. 8; green subpixels are driven via a distinct data line DL2);
thereby teaching a color-based data line grouping in which green subpixels are driven by a data line separate from that driving non-green subpixels (e.g., PenTile-type arrangement).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to modify Ka so that the first and second data lines correspond to the color-based subpixel groupings taught by Kwon, such that one of the adjacent detour data lines in the boundary area supplies green subpixels and another supplies non-green subpixels, because Kwon teaches that such grouping is suitable for high-resolution OLED displays and represents a known data-line-to-subpixel assignment. It further would have been obvious, as a matter of routine layout optimization within the boundary/detour area of Ka, to select the relative positioning of those adjacent data lines such that the data line supplying green subpixels is disposed closer to the hole area than the data line supplying non-green subpixels. Ka already teaches multiple adjacent detour routing paths around the hole area, and selecting which signal occupies which of the known adjacent paths amounts to choosing from a finite number of predictable layout alternatives. A person of ordinary skill in the art would have recognized that assigning the green-subpixel data line to the path closer to the hole area would have been an obvious design choice in view of the known importance of green subpixels in OLED/PenTile arrangements for luminance and resolution, and the known desire to optimize routing, signal integrity, and layout efficiency in constrained boundary regions surrounding hole areas. The combination of Ka and Kwon therefore represents the use of prior art elements according to their established functions to achieve no more than predictable results.
As to claim 5, the combination of Ka and Kwon teach the display device of claim 1 (see above rejection), wherein the first group of the plurality of subpixels includes at least one first color subpixel and at least one second color subpixel, and wherein the second group of the plurality of subpixels includes at least one third color subpixel different from the first and second color subpixels (see Kwon at least figs. 3A-3B: note DL1, DL3 with R and B is the first group and DL2 with G is the second group).
As to claim 6, the combination of Ka and Kwon teach the display device of claim 5 (see above rejection), wherein a peak wavelength of light emitted by the third color subpixel is smaller than a peak wavelength of light emitted by the first color subpixel and greater than a peak wavelength of light emitted by the second color subpixels (see Kwon at least figs. 3A-3B: note DL1, DL3 with R and B is the first group and DL2 with G is the second group - note well known wavelengths are 630 nm for red, 532 nm for green, and 465 nm for blue light – therefore, G<R and G>B).
As to claim 7, the combination of Ka and Kwon teach the display device of claim 1 (see above rejection), wherein the first data line and the second data line are alternately arranged (see Ka at least fig. 2: DL1, DL2 and Kwon figs. 3A-3B: DL1, DL2).
As to claim 8, the combination of Ka and Kwon teach the display device of claim 7 (see above rejection), wherein the first group of the plurality of subpixels and the second group of the plurality of subpixels are alternately arranged (see Kwon at least figs. 3A-3B).
As to claim 10, the combination of Ka and Kwon teach the display device of claim 9 (see above rejection), wherein a peak wavelength of light emitted by the third color subpixel is smaller than a peak wavelength of light emitted by the first color subpixel and greater than a peak wavelength of light emitted by the second color subpixels (see Kwon at least figs. 3A-3B: note DL1, DL3 with R and B is the first group and DL2 with G is the second group - note well known wavelengths are 630 nm for red, 532 nm for green, and 465 nm for blue light – therefore, G<R and G>B).
As to claim 11, the combination of Ka and Kwon teach the display device of claim 9 (see above rejection), wherein the first data line and the second data line are alternately arranged (see Ka at least fig. 2: DL1, DL2 and Kwon figs. 3A-3B: DL1, DL2).
As to claim 12, the combination of Ka and Kwon teach the display device of claim 9 (see above rejection), wherein the second group of the plurality of subpixels and the third group of the plurality of subpixels are alternately arranged in an extending direction of the at least one gate line (see Ka at least figs. 2-5, [0064], [0073] “the scan line SL1 may include a line that extends in the second direction D2 in the display area AA, for example, at least one of the gate-writing line GW, the voltage-initializing line Vint, the gate-initializing line GI and the emission control line EM”, [0074]” and Kwon at least figs. 3A-3B).
As to claim 13, the combination of Ka and Kwon teach the display device of claim 12 (see above rejection), wherein the at least one first color subpixel and the at least one second color subpixel are alternately arranged in an extending direction of the first gate line (see Ka at least figs. 2-5, [0064], [0073] “the scan line SL1 may include a line that extends in the second direction D2 in the display area AA, for example, at least one of the gate-writing line GW, the voltage-initializing line Vint, the gate-initializing line GI and the emission control line EM”, [0074]” and Kwon at least figs. 3A-3B).
As to claim 14, the combination of Ka and Kwon teach the display device of claim 12 (see above rejection), wherein the at least one third color subpixel are arranged in a same column in an extending direction of a second gate line (see Ka at least figs. 2-5, [0064], [0073] “the scan line SL1 may include a line that extends in the second direction D2 in the display area AA, for example, at least one of the gate-writing line GW, the voltage-initializing line Vint, the gate-initializing line GI and the emission control line EM”, [0074]” and Kwon at least figs. 3A-3B).
Claims 2-4 and 15-16 are rejected under 35 U.S.C. 103 as being unpatentable over Ka et al. (USPN 2017/0294502 A1) in view of Kwon et al. (USPN 2018/0083072 A1), further in view of Jung et al. (USPN 2016/0351122 A1).
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As to claim 2, the combination of Ka and Kwon teach the display device of claim 1 (see above rejection).
Ka and Kwon do not directly teach the first through sixth transistor circuit arrangement with specific connections.
Jung teaches wherein each of the plurality of subpixels further includes:
a first transistor connected between the gate electrode and the second electrode of the driving transistor (see at least fig. 3: transistor T5 connected between node A (gate node of driving transistor DT) and node C (second electrode of DT));
a second transistor connected between the gate electrode of the driving transistor and an initialization voltage line (see at least fig. 3: transistor T6 connected to Vini (initialization voltage line) and coupled to the gate control node of the driving transistor through the pixel initialization path);
a third transistor connected between the first electrode of the driving transistor and one of the first and second data lines (see at least fig. 3: transistor T1 connects the data line (DL) to node B, which corresponds to the first electrode of the driving transistor DT);
a fourth transistor connected between a power voltage line and the first electrode of the driving transistor (see at least fig. 3: transistor T2/T4 connected to ELVDD (power voltage line) and supplying current to the driving transistor path including node B (first electrode side of DT));
a fifth transistor connected between the second electrode of the driving transistor and anode electrode of the light-emitting device (see at least fig. 3: node C (second electrode of DT) is coupled through switching transistor T3 to node D, which is the anode of the OLED); and
a sixth transistor connected between an initialization voltage line and the anode electrode (see at least fig. 3: transistor T6 is connected between Vini (initialization voltage line) and node D, which is the anode of the OLED).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to incorporate the pixel circuit configuration of Jung into the display device of Ka, as modified by Kwon, because Jung teaches a well-known OLED pixel circuit providing reliable initialization of the anode node and stable driving of the light-emitting device through a multi-transistor structure (see Jung, Fig. 3). Ka already discloses a display panel including OLED subpixels and driving transistors, and Kwon provides color-based data line grouping without modifying the internal pixel circuit operation. A person of ordinary skill in the art would have recognized that substituting or incorporating Jung’s pixel circuit into Ka’s display panel would predictably improve pixel initialization and driving stability, particularly in high-resolution OLED displays, while maintaining the overall operation of the display device. The combination therefore represents the use of known elements according to their established functions to yield no more than predictable results.
As to claim 3, the combination of Ka, Kwon and Jung teach the display device of claim 2 (see above rejection), further comprising: a first gate line disposed on the active area and extending to the boundary area, and supplying first EM signal to a third group of the plurality of subpixels; and a second gate line disposed on the active area and extending to the boundary area, and supplying second EM signal to the third group of the plurality of subpixels (see Ka at least figs. 2-4: SL1/GW becomes DT3 in the boundary area, fig. 5: EM and Jung at least fig. 3: EM(j)).
As to claim 4, the combination of Ka, Kwon and Jung teach the display device of claim 3 (see above rejection), wherein the fifth transistor is turned on in response to the first EM signal or the second EM signal from the first gate line or the second gate line (see Jung at least fig. 3: T3 and EM(j)).
As to claim 15, the combination of Ka and Kwon teach the display device of claim 9 (see above rejection).
Ka and Kwon do not do not directly teach the first through sixth transistor circuit arrangement with specific connections.
Jung teaches wherein each of the plurality of subpixels further includes:
a first transistor connected between the gate electrode and the second electrode of the driving transistor (see at least fig. 3: transistor T5 connected between node A (gate node of driving transistor DT) and node C (second electrode of DT));
a second transistor connected between the gate electrode of the driving transistor and an initialization voltage line (see at least fig. 3: transistor T6 connected to Vini (initialization voltage line) and coupled to the gate control node of the driving transistor through the pixel initialization path);
a third transistor connected between the first electrode of the driving transistor and one of the first and second data lines (see at least fig. 3: transistor T1 connects the data line (DL) to node B, which corresponds to the first electrode of the driving transistor DT);
a fourth transistor connected between a power voltage line and the first electrode of the driving transistor (see at least fig. 3: transistor T2/T4 connected to ELVDD (power voltage line) and supplying current to the driving transistor path including node B (first electrode side of DT));
a fifth transistor connected between the second electrode of the driving transistor and anode electrode of the light-emitting device (see at least fig. 3: node C (second electrode of DT) is coupled through switching transistor T3 to node D, which is the anode of the OLED); and
a sixth transistor connected between an initialization voltage line and the anode electrode (see at least fig. 3: transistor T6 is connected between Vini (initialization voltage line) and node D, which is the anode of the OLED).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to incorporate the pixel circuit configuration of Jung into the display device of Ka, as modified by Kwon, because Jung teaches a well-known OLED pixel circuit providing reliable initialization of the anode node and stable driving of the light-emitting device through a multi-transistor structure (see Jung, Fig. 3). Ka already discloses a display panel including OLED subpixels and driving transistors, and Kwon provides color-based data line grouping without modifying the internal pixel circuit operation. A person of ordinary skill in the art would have recognized that substituting or incorporating Jung’s pixel circuit into Ka’s display panel would predictably improve pixel initialization and driving stability, particularly in high-resolution OLED displays, while maintaining the overall operation of the display device. The combination therefore represents the use of known elements according to their established functions to yield no more than predictable results.
As to claim 16, the combination of Ka, Kwon and Jung teach the display device of claim 15 (see above rejection), wherein the fifth transistor is turned on in response to the emission signal from the at least one gate line (see Ka at least fig. 5: T5, EM; and Jung at least fig. 3: T3, EM(j)).
Response to Arguments
Applicant's arguments filed 3/23/2026 have been fully considered but they are not persuasive.
Applicant argues –
“Amended claim 1 now requires, via antecedent basis, that in the boundary area, the first and second data lines are disposed adjacent to each other, and the second data line supplying the second data voltage to each of the green subpixels is disposed closer to the at least one hole area than the first data line supplying the first data voltage to the first group of subpixels not including green subpixels.
The Office Action acknowledges that Ka does not directly teach a first data line configured to supply a data voltage to a first group of the plurality of subpixels and a second data line configured to supply the data voltage to a second group of the plurality of subpixels.
Further, the Office Action relies on Kwon to disclose the foregoing features of pending claim 1.
However, Ka and Kwon fail to teach the foregoing features of amended claim 1.
For example, Ka merely discloses data lines disposed in different layers, as shown in Ka's FIG. 3.
Further, Kwon and Jung do not even disclose at least one hole area as recited in amended claim 1 and do not overcome the deficiencies of Ka.
Accordingly, Applicant respectfully requests that the rejection of claim 1 under 35 U.S.C. 103 be withdrawn.
Further, amended independent claim 9 recites similar distinguishing features as claim 1 in a varying claim scope and is allowable for similar reasons.
Accordingly, Applicant respectfully requests that the rejection of claim under 35 U.S.C. § 103 be also withdrawn.
The various dependent claims are allowable at least based on their dependency from claims 1 and 9, and/or further in view of their own respective features.
Thus, reconsideration and withdrawal of the rejection are respectfully requested, and Applicant respectfully submits that the application should be in condition for allowance.”
Examiner disagrees –
Applicant’s argument that Ka merely discloses data lines disposed in different layers and does not teach the claimed positional relationship is not persuasive. Ka expressly teaches a hole area (FA), a boundary/detour area (WA), and multiple data lines (DT1, DT2) routed through that boundary area around the hole. As shown in Ka’s figures, these detour lines are routed side-by-side within the boundary area and are therefore adjacent. While Ka may not explicitly assign those lines to green and non-green subpixels, Kwon teaches such color-based data line groupings. Once Kwon’s teaching is applied to Ka’s adjacent detour lines, the relative positioning of those lines with respect to the hole area—i.e., which line is closer to the hole—constitutes a routine selection among known routing alternatives already disclosed by Ka. Applicant’s argument that Kwon does not disclose a hole area is also not persuasive because Ka, not Kwon, is relied upon for the hole area and boundary area limitations. Accordingly, the combination of Ka and Kwon teaches or renders obvious the subject matter of amended claim 1.
Further, amended independent claim 9 recites similar distinguishing features as claim 1 in a varying claim scope and is rejected for similar reasons.
The various dependent claims are rejected at least based on their dependency from claims 1 and 9.
Conclusion
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/JENNIFER L ZUBAJLO/ Examiner, Art Unit 2627 3/29/2026