Prosecution Insights
Last updated: April 19, 2026
Application No. 18/960,887

USB INTERFACE CIRCUIT

Non-Final OA §102§103
Filed
Nov 26, 2024
Examiner
OBERLY, ERIC T
Art Unit
2184
Tech Center
2100 — Computer Architecture & Software
Assignee
Rohm Co. Ltd.
OA Round
1 (Non-Final)
74%
Grant Probability
Favorable
1-2
OA Rounds
2y 8m
To Grant
88%
With Interview

Examiner Intelligence

Grants 74% — above average
74%
Career Allow Rate
439 granted / 596 resolved
+18.7% vs TC avg
Moderate +15% lift
Without
With
+14.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
21 currently pending
Career history
617
Total Applications
across all art units

Statute-Specific Performance

§101
4.6%
-35.4% vs TC avg
§103
52.8%
+12.8% vs TC avg
§102
25.6%
-14.4% vs TC avg
§112
12.7%
-27.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 596 resolved cases

Office Action

§102 §103
0887DETAILED ACTION The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Examiner’s Note The Patent Application Fee Determination Record filed 12/6/2024 indicates the total number of independent claims as one; however, claim 2 is written in independent form, and has been treated as such in this examination. Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. Claims 1 and 3-7 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Takichi et al. (US Pub. No. 2022/0077697), hereinafter referred to as Takichi. Referring to claim 1, Takichi discloses a universal serial bus (USB) interface circuit to be mounted on a device destined to be a source in USB Type-C (a receptacle of a universal serial bus (USB) Type-C connector, [0023]), the USB interface circuit comprising: a pull-up circuit that contains a variable current source (application of voltage or current to the CC terminal is stopped, [0072]; NOTE: the adjective “variable” can merely mean liable to change or able to be changed, which is taught by “stopped”) structured to supply electric current to a CC pin of a connector (voltage of the CC terminal of the USB receptacle 15 becomes, for example, 1.5V, which is lower than 5.5V, due to resistance voltage division of the pull-up resistor, [0036]); a voltage detection circuit structured to measure voltage at the CC pin (fig. 2, voltage detector; fig. 4, voltage detectors 33/36 of CC1 and CC2); and a processor structured to control the variable current source (processor 30 turns off the power supply of the CC terminal… application of voltage or current to the CC terminal is stopped, [0071-0072]), and to detect moisture adhered to the CC pin with reference to an output of the voltage detection circuit (voltage detectors 36 and 33 detect a voltage of the CC1 terminal and a voltage of the CC2 terminal of the USB receptacle 15, respectively, and output the voltages to the voltage controller 11, [0029]; foreign substance maybe, for example, a water, [0041]; when a voltage Vd shown in Formula (1) is detected by the voltage detector 31, the processor 30 can determine that the conductive foreign substance is present between the CC2 terminal and the VBUS termina, [0056]). As to claim 3, Takichi discloses comprising a discharge circuit (fig. 4, discharging circuit 32) structured to be switchable between ON state and OFF state, and to discharge in the ON state a VBUS pin of the connector (discharging circuit 32 switches between a state where the VBUS line 61 and GND (also referred to as the ground) are connected to each other and a state where the VBUS line 61 and the GND are disconnected from each other. By connecting the VBUS line 61 and the GND, charges are discharged from the VBUS line 61, [0047]), wherein the processor is structured to detect adhesion of the moisture between the VBUS pin and the CC pin (voltage detectors 36 and 33 detect a voltage of the CC1 terminal and a voltage of the CC2 terminal of the USB receptacle 15, respectively, and output the voltages to the voltage controller 11, [0029]; foreign substance maybe, for example, a water, [0041]; when a voltage Vd shown in Formula (1) is detected by the voltage detector 31, the processor 30 can determine that the conductive foreign substance is present between the CC2 terminal and the VBUS termina, [0056]), in the ON state of the discharge circuit (a state where the VBUS line 61 and the GND are disconnected from each other, [0047]). As to claim 4, Takichi discloses the processor is structured to detect the moisture in a time division manner (fig. 6 depicts a flow chart of the process to detect the moisture, and the process includes divisions of certain wait times, see steps S3, S5, S8, and S11). As to claim 5, Takichi discloses structured to turn off the pull-up circuit (connected to the CC terminal of the USB plug 80 via the pull-up resistor, [0036]), upon detection of the moisture by the processor (foreign substance maybe, for example, a water, [0041]; the processor 30 can determine that the conductive foreign substance, [0056]; processor 30 gives an instruction to turn off the power supply 38 of the CC1 terminal and the power supply 35 of the CC2 terminal…[0072] As a result, the application of voltage or current to the CC terminal is stopped, [0071-0072]). As to claim 6, Takichi discloses the voltage detection circuit contains an A/D converter structured to convert the voltage at the CC pin into a digital value (Each of the voltage detectors 31, 33, 36, and 39 incorporates an A/D converter that converts an input analog voltage value into a digital voltage value, [0046]). As to claim 7, Takichi discloses the USB interface circuit according to claim 1, being monolithically integrated on one semiconductor substrate (a dedicated electronic circuit designed by, for example, an application specific integrated circuit (ASIC) or an electronic circuit designed to be reconfigurable by, for example, a field programmable gate array (FPGA), [0043]; electric components for the plurality of terminals may be mounted on one integrated circuit (IC), [0123]). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Takichi in view of Ko et al. (US Pub. No. 2019/0079130), hereinafter referred to as Ko. As to claim 2, Takichi discloses a universal serial bus (USB) interface circuit to be mounted on a device destined to be a source in USB Type-C (a receptacle of a universal serial bus (USB) Type-C connector, [0023]), the USB interface circuit comprising: a pull-up circuit that contains a resistor structured to pull up a CC pin of a connector (voltage of the CC terminal of the USB receptacle 15 becomes, for example, 1.5V, which is lower than 5.5V, due to resistance voltage division of the pull-up resistor, [0036]); a voltage detection circuit structured to measure voltage at the CC pin (fig. 2, voltage detector; fig. 4, voltage detectors 33/36 of CC1 and CC2); and a processor structured to detect moisture adhered to the CC pin with reference to an output of the voltage detection circuit (voltage detectors 36 and 33 detect a voltage of the CC1 terminal and a voltage of the CC2 terminal of the USB receptacle 15, respectively, and output the voltages to the voltage controller 11, [0029]; foreign substance maybe, for example, a water, [0041]; when a voltage Vd shown in Formula (1) is detected by the voltage detector 31, the processor 30 can determine that the conductive foreign substance is present between the CC2 terminal and the VBUS termina, [0056]). While Takichi teaches the processor controlling switches to effect terminal voltage and current, Takichi does not appear to explicitly disclose a controlled variable resistor. However, Ko discloses a controlled variable resistor (the pull-up resistor R_PU of FIG. 4A may be a variable resistor whose resistance is changed under the control of the port controller 230a, [0022]). Takichi and Ko are analogous art because they are from the same field of endeavor, foreign material detection in electronic connectors. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Takichi and Ko before him or her, to modify the foreign substance detection system of Takichi to include the variable resistance circuitry of Ko because the variable resistance would provide additional control and evaluation of the detection processes. The suggestion/motivation for doing so would have been improve the accuracy of the detection process (Ko: [0051]). Therefore, it would have been obvious to combine Takichi and Ko to obtain the invention as specified in the instant claim. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The US Pub. No. 2023/0025195 of Luo et al., the US Patent No. 11,088,540 of Wu et al., the US Pub. No. 2018/0062325 of Kim et al., and the US Pub. No. 2017/0358922 of Bacon et al. are pertinent to the detection of moisture among electrical connection of a connector. The examiner has cited particular column, line, and/or paragraph numbers in the references as applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in its entirety as potentially teaching of all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner. The examiner requests, in response to this office action, support be shown for language added to any original claims on amendment and any new claims. That is, indicate support for newly added claim language by specifically pointing to page(s) and line number(s) in the specification and/or drawing figure(s). This will assist the examiner in prosecuting the application. When responding to this office action, applicant is advised to clearly point out the patentable novelty which he or she thinks the claims present, in view of the state of art disclosed by the references cited or the objections made. He or she must also show how the amendments avoid such references or objections. See 37 C.F.R. 1.111(c). Applicants seeking an interview with the examiner, including WebEx Video Conferencing, are encouraged to fill out the online Automated Interview Request (AIR) form (http://www.uspto.gov/patent/uspto-automated-interview-request-air-form.html). See MPEP §502.03, §713.01(11) and Interview Practice for additional details. Contact Information Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC T OBERLY whose telephone number is (571)272-6991. The examiner can normally be reached on M-F 800am-430pm (MT). If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dr. Henry Tsai can be reached on (571) 272-4176. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Center. For more information about the Patent Center, see https://patentcenter.uspto.gov/. Should you have questions on access to the Patent Center system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ERIC T OBERLY/ Primary Examiner, Art Unit 2184
Read full office action

Prosecution Timeline

Nov 26, 2024
Application Filed
Jan 23, 2026
Non-Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
74%
Grant Probability
88%
With Interview (+14.6%)
2y 8m
Median Time to Grant
Low
PTA Risk
Based on 596 resolved cases by this examiner. Grant probability derived from career allow rate.

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