Prosecution Insights
Last updated: October 23, 2026
Application No. 18/960,949

MEMORY MANAGEMENT METHOD AND APPARATUS CONSIDERING PERFORMANCE INFORMATION

Non-Final OA §103
Filed
Nov 26, 2024
Priority
Jul 26, 2022 — RE 10-2022-0092286 +1 more
Examiner
ANYA, CHARLES E
Art Unit
2194
Tech Center
2100 — Computer Architecture & Software
Assignee
Samsung Electronics Co., Ltd.
OA Round
1 (Non-Final)
82%
Grant Probability
Favorable
1-2
OA Rounds
1y 2m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allowance Rate
746 granted / 913 resolved
+26.7% vs TC avg
Strong +33% interview lift
Without
With
+32.9%
Interview Lift
resolved cases with interview
Typical timeline
3y 1m
Avg Prosecution
38 currently pending
Career history
965
Total Applications
across all art units

Statute-Specific Performance

§101
6.0%
-34.0% vs TC avg
§103
69.9%
+29.9% vs TC avg
§102
7.0%
-33.0% vs TC avg
§112
6.2%
-33.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 913 resolved cases

Office Action

§103
DETAILED ACTION Claims 1-15 are pending in this application. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Specification The disclosure is objected to because of the following informalities: Page 1 lines 5-9 of the specification includes a claim of priority. An update or revision of the specification maybe required in the event that it is applicable. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-3, 5, 6, 9, 10, 12 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over W.O. No. 2009098547 A1 to Robin et al. in view of U.S. Pub. No. 2005/0034129 A1 to Chew. As to claim 1, Robin teaches an electronic device, comprising: a memory storing at least one instruction corresponding to at least one program (Computer System 100/RAM 104); and at least one processor, comprising processing circuitry, electrically connected to the memory, wherein at least one processor, individually and/or collectively, is configured to execute the at least one instruction as a process (Processor 102), and to: obtain performance information (current usage of the memory 104) about the electronic device and an available memory amount (free-list); determine a memory threshold (threshold r(S)/thresholds) based on the performance information (current usage of the memory 104) and the available memory amount (free-list); update (adjust(ment)) the memory threshold with the determined memory threshold (“…The method comprises adjusting (S318, S328, S612) one or more of the thresholds in dependence upon the current usage of the memory (104) by the one or more processes…Embodiments of the invention make use of free-lists, which have been described above. However, in contrast to the use of free-lists as described above, in embodiments of the invention, the processor 102 of the computer system 100 may adjust the thresholds associated with the free- lists being used, i.e. the thresholds need not be predetermined. This adjustment is based primarily on the current usage of the memory 104 by the one or more processes that are being executed. This will be described in more detail later. The adjustment of the thresholds may also be based on the frequency with which the regions of memory identified in the free-lists have actually been used, or assigned, to one or more processes. Again, this will be described in more detail later…Furthermore, a threshold may be adjusted so that it is no longer positive. In this case, the corresponding free-list will not store any identifiers. As such, the effective number of free-lists (i.e. the number of free-lists with positive associated thresholds) may be varied…In this way, the thresholds associated with the free-lists are adjusted by the processor 102 in dependence upon the current usage of the memory 104 by the one or more processes that are being executed by the computer system 100. When the usage of the memory 104 by the processes involves using above a certain level of the total memory available from the memory 104, then the threshold for one or more of the free-lists is decreased, thereby releasing memory back for use. E m bod i merits of the invention may make use of various methods for selecting, at the step…”). Robin is silent with reference to based on the available memory amount at a specified time being less than the memory threshold, terminate a specified process. Chew teaches based on the available memory amount at a specified time being less than the memory threshold, terminate a specified process (terminate an application) (“…The procedure of FIG. 4 is initiated in response to a request to launch a new application program. In another embodiment, a portion of the procedure of FIG. 4 is executed when available system resources fall below a particular threshold value. For example, if the available memory falls below a predetermined threshold, then steps 280 and 282 in FIG. 4 are executed to terminate an application, thereby reclaiming system resources. In another example, steps 280 and 282 are performed when the number of concurrent processes executing on the portable computer exceeds a threshold. Thus, it is not necessary to wait for a request to launch a new application program before terminating an application. An application can be terminated any time that available system resources fall below a particular threshold…” paragraph 0048). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claim invention to modify the system of Robin with the teaching of Chew because the teaching of Chew would improve the system of Robin by providing a technique for terminating application when memory resources are not available to avoid system crash or resource contention. As to claim 2, Robin teaches the electronic device of claim 1, wherein the performance information includes at least one of a CPU usage overhead of a memory reallocation process, a memory swap-out/in overhead due to memory reallocation, a file drop/loading overhead due to memory reallocation, and an application response speed (current usage of the memory 104). As to claim 3, Robin teaches the electronic device of claim 1, wherein at least one processor, individually and/or collectively, is configured to: obtain the performance information and available memory amount, determine the memory threshold, and update the memory threshold at a specified period (adjust(ment)) (“…The method comprises adjusting (S318, S328, S612) one or more of the thresholds in dependence upon the current usage of the memory (104) by the one or more processes…Embodiments of the invention make use of free-lists, which have been described above. However, in contrast to the use of free-lists as described above, in embodiments of the invention, the processor 102 of the computer system 100 may adjust the thresholds associated with the free- lists being used, i.e. the thresholds need not be predetermined. This adjustment is based primarily on the current usage of the memory 104 by the one or more processes that are being executed. This will be described in more detail later. The adjustment of the thresholds may also be based on the frequency with which the regions of memory identified in the free-lists have actually been used, or assigned, to one or more processes. Again, this will be described in more detail later…Furthermore, a threshold may be adjusted so that it is no longer positive. In this case, the corresponding free-list will not store any identifiers. As such, the effective number of free-lists (i.e. the number of free-lists with positive associated thresholds) may be varied…In this way, the thresholds associated with the free-lists are adjusted by the processor 102 in dependence upon the current usage of the memory 104 by the one or more processes that are being executed by the computer system 100. When the usage of the memory 104 by the processes involves using above a certain level of the total memory available from the memory 104, then the threshold for one or more of the free-lists is decreased, thereby releasing memory back for use. E m bod i merits of the invention may make use of various methods for selecting, at the step…”). As to claim 5, Robin teaches the electronic device of claim 4, wherein at least one processor, individually and/or collectively, is configured to: determine whether the available memory amount exceeds the memory threshold and whether a performance of the electronic device is less than a specified performance criterion based on the performance information; and based on the performance of the electronic device being less than the specified performance criterion although the available memory amount exceeds the memory threshold, increase the memory threshold by a specified increment (increasing) (“…In this way, the thresholds associated with the free-lists are adjusted by the processor 102 in dependence upon the current usage of the memory 104 by the one or more processes that are being executed by the computer system 100. When the usage of the memory 104 by the processes involves using more memory regions of one size than another, then the threshold for that more frequently used size is increased. When the usage of the memory 104 by the processes is such that the amount of memory that is free in the memory 104 is becoming low (so that a memory allocation request at the step S312 has failed), then the threshold for one or more of the free-lists is decreased, thereby releasing memory back for use…”). As to claim 6, Robin teaches the electronic device of claim 4, wherein at least one processor, individually and/or collectively, is configured to: determine whether the available memory amount exceeds the maximum memory threshold and whether a performance of the electronic device is a specified performance criterion or more based on the performance information; and based on the performance of the electronic device being the specified performance criterion or more, and the available memory amount exceeding the maximum memory threshold, decrease the memory threshold by a specified decrement (decreasing) (“…In this way, the thresholds associated with the free-lists are adjusted by the processor 102 in dependence upon the current usage of the memory 104 by the one or more processes that are being executed by the computer system 100. When the usage of the memory 104 by the processes involves using more memory regions of one size than another, then the threshold for that more frequently used size is increased. When the usage of the memory 104 by the processes is such that the amount of memory that is free in the memory 104 is becoming low (so that a memory allocation request at the step S312 has failed), then the threshold for one or more of the free-lists is decreased, thereby releasing memory back for use…”). As to claim 9, see the rejection of claim 1 above. As to claim 10, see the rejection of claim 3 above. As to clam 12, see the rejection of claim 5 above. As to claim 13, see the rejection of claim 6 above. Claims 4 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over W.O. No. 2009098547 A1 to Robin et al. in view of U.S. Pub. No. 2005/0034129 A1 to Chew as applied to claims 1 and 9 above, and further in view of U.S. Pub. No. 2018/0300067 A1 to Mittal et al. As to claim 4, Robin as modified by Chew teaches the electronic device of claim 1, however it is silent with reference to wherein at least one processor, individually and/or collectively, is configured to set at least one of a maximum memory threshold and a minimum memory threshold based on an external input. Mittal teaches wherein at least one processor, individually and/or collectively, is configured to set at least one of a maximum memory threshold and a minimum memory threshold (Parameter Description MEMORY_MANAGER_MAX_SIZE) based on an external input (user) (“…TABLE-US-00001 TABLE A Configuration Parameters Parameter Description MEMORY_MANAGER_MAX_SIZE This parameter defines the maximum amount of memory that can be used on the data processing system for sorting. This value thus defines the maximum amount of memory that can be distributed across the multiple sorters. For example, in one instance, this threshold may be set to 2 GB. This parameter is configurable by a user of the data processing system. If a value for this parameter is not explicitly specified, a default value may be used. This value is generally the same during the runtime of the data processing system. T This parameter identifies a memory usage threshold where corrective actions to adjust memory usage of the sorters will kick in. This parameter is typically represented as a percentage of the MEMORY_MANAGER_MAX_SIZE parameter. For example, in one instance, it may be configured to 80% of MEMORY_MANAGER_MAX_SIZE. In some embodiments, this parameter is configurable by a user of the data processing system. If a value for this parameter is not explicitly specified, a default value may be used. This value is generally the same during the runtime of the data processing system. S.sub.min This parameter identifies the minimum amount of memory that is guaranteed to each sorter. This ensures that sorters that are performing small sorts are not starved for memory. For example, in some instances, the value for this parameter may be set to 4 MB. This parameter is configurable by a user of the data processing system. If a value for this parameter is not explicitly specified, a default value may be used. S.sub.max This parameter identifies a hard maximum limit on the memory that a sorter can use. For example, in some instances, the value for this parameter may be set to 1 GB…” TABLE A). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claim invention to modify the system of Robin and Chew with the teaching of Mittal because the teaching of Mittal would improve the system of Robin and Chew by providing a technique for allowing user to manage computing resource allocation and therefore giving the user control. As to claim 11, see the rejection of claim 4 above. Claims 7, 8, 14 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over W.O. No. 2009098547 A1 to Robin et al. in view of U.S. Pub. No. 2005/0034129 A1 to Chew as applied to claims 5, 6, 12 and 13 above, and further in view of U.S. Pat. No. 9,081,623 B1 to Magerramov et al. As to claim 7, Robin as modified by Chew teaches the electronic device of claim 5, however it is silent with reference to wherein at least one processor, individually and/or collectively, is configured to increase the memory threshold by the specified increment within a limit of the maximum memory threshold. Magerramov teaches wherein at least one processor, individually and/or collectively, is configured to increase the memory threshold by the specified increment within a limit of the maximum memory threshold (maximum change threshold) (“…In some embodiments, the resource allocation application 114 may calculate, recalculate, reallocate, or modify the resource allocation limits 121 subject to a maximum change threshold. The maximum change threshold embodies an amount by which a resource allocation limit 121 may be modified. The maximum change threshold may be defined with respect to a period of time. For example, a maximum change threshold may dictate that a resource allocation limit 121 may not be changed by more than ten percent of an initial value per day. The maximum change threshold may also be enforced by another approach…” Col. 6 Ln. 30-46). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claim invention to modify the system of Robin and Chew with the teaching of Magerramov because the teaching of Magerramov would improve the system of Robin and Chew by providing a technique for controlling computing resource allocation. As to claim 8, Robin as modified by Chew teaches the electronic device of claim 6, however it is silent with reference to wherein at least one processor, individually and/or collectively, is configured to decrease the memory threshold by the specified decrement within a limit of the minimum memory threshold. Magerramov teaches wherein at least one processor, individually and/or collectively, is configured to decrease the memory threshold by the specified decrement within a limit of the minimum memory threshold (maximum change threshold) (“…In some embodiments, the resource allocation application 114 may calculate, recalculate, reallocate, or modify the resource allocation limits 121 subject to a maximum change threshold. The maximum change threshold embodies an amount by which a resource allocation limit 121 may be modified. The maximum change threshold may be defined with respect to a period of time. For example, a maximum change threshold may dictate that a resource allocation limit 121 may not be changed by more than ten percent of an initial value per day. The maximum change threshold may also be enforced by another approach…” Col. 6 Ln. 30-46). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claim invention to modify the system of Robin and Chew with the teaching of Magerramov because the teaching of Magerramov would improve the system of Robin and Chew by providing a technique for controlling computing resource allocation. As to claim 14, see the rejection of claim 7 above. As to claim 15, see the rejection of claim 8 above. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. U.S. 2021/0124496 A1 to Song et al. and directed to a computing device for performing a memory reclamation function and an operating method of the computing device. U.S. Pub. No. 2022/0221998 A1 to XU and directed to Memory management method, electronic device and non-transitory computer-readable medium. U.S. Pub. No. 2018/0246730 to Myrick et al. and directed to memory management of data processing systems. U.S. Pub. No. 2017/0344472 A1 to methods and systems for managing memory allocation. U.S. Pat. No. 9,317,427 B2 issued to DeSota et al. and directed to reallocating unused memory databus utilization to another processor when utilization is below a threshold. U.S. Pub. No. 2017/0060464 A1 to Branson et al. and directed to a method generally includes monitoring, via a streams manager for a distributed application, an amount of memory used by a group of executing processes. U.S. Pat. No. 8,892,827 B2 issued to Bernhard et al. and directed to a method and an apparatus for selecting one or more applications running in a data processing system to reduce memory usage according to information received from the application. Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHARLES E ANYA whose telephone number is (571)272-3757. The examiner can normally be reached Mon-Fir. 9-6pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, KEVIN YOUNG can be reached at 571-270-3180. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CHARLES E ANYA/Primary Examiner, Art Unit 2194
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Prosecution Timeline

Nov 26, 2024
Application Filed
Oct 14, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
82%
Grant Probability
99%
With Interview (+32.9%)
3y 1m (~1y 2m remaining)
Median Time to Grant
Low
PTA Risk
Based on 913 resolved cases by this examiner. Grant probability derived from career allowance rate.

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