DETAILED ACTION
Election/Restrictions
Applicant elects Species I related to Figures 1-5 with traverse. Applicant argues that a serious burden is not present to search both species. The Examiner disagrees. As indicated in the restriction requirement mailed 11/7/2025 a burden may be established where it is necessary to search for one invention where it is not likely to yield pertinent prior art to all inventions. The different wiring or connection schemes as claimed by applicant necessarily require a different search because prior art that is relevant to species I is necessarily not useful for species II because of the differences. Applicant has not articulated how the prior art of species I would be relevant and has not indicated that the species are obvious variants. Therefore, these arguments are not persuasive. Species I is considered to contain claims 1-7 and 10-19. Claim 9, which contains the features of claim 8 cannot be included in species I because as admitted by Applicant, claim 8 is part of species II.
Claims 1-7, 10-19 admitted for examination.
Allowable Subject Matter
Claims 2-7, 10-11 and 13-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1 and 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. US 10,490,122 hereinafter referred to as Kim in view of Chiou et al. US 8,269,939 hereinafter referred to as Chiou in view of Bang et al. US 2014/0239317 hereinafter referred to as Bang.
In regards to claim 1, Kim teaches:
“An electronic device, comprising: a substrate including a first surface and a second surface opposite to the first surface”
Kim Figure 1 and column 4 lines 23-26 teach a display device according to an exemplary embodiment of the present invention may include a substrate SUB, a plurality of pixels PXL provided on the substrate SUB. The Examiner interprets a substrate necessarily has a first and second surface.
“wherein the first surface includes an active area”
Kim Figure 1 teaches the substrate SUB has pixels located on the surface. The Examiner interprets the pixels as an active area. Figures 7A-B illustrates all the electrical components located on the top surface of SUB. The Examiner interprets this as a first surface.
“a first data line and a second data line disposed on the first surface of the substrate and extending along a first direction”
Kim Figure 4 illustrate data lines D1-Dm extending along a first direction. Kim column 15 lines 13-18 and Figures 7A-B teach In FIGS. 6, 7A and 7B, on the basis of a single first pixel PXL1 disposed in an ith row and a jth column of the first pixel region PXA1, three of the first scan lines S1i−1, S1i, and S1i+1 may be connected to the first pixel PXL1. For example, the first light emitting control line E1i, the power line PL, and the data lines Dj are shown. The Examiner interprets the lines Dj are located on the first surface.
“wherein the active area comprises a first unit region disposed between the first data line and the second data line”
Kim Figure 4, inter alia.
“a first electronic unit disposed on the first surface of the substrate in the first unit region”
Kim Figure 5 teaches the pixel contains an OLED. The Examiner interprets this as an first electronic unit.
“a first control unit disposed on the first surface of the substrate in the first unit region”
Kim Figure 4 teaches transistors T1-T7. The Examiner interprets that any of the transistors may be considered a first control unit.
“a first scan line crossing the first data line and the second data line”
Kim Figure 4, inter alia.
“wherein the first control unit is electrically connected between the first electronic unit and the first scan line”
Kim Figure 5 teaches transistors T1-T7. Of the transistors T1-T7, at least transistors T1, T2, T3and T6 are electrically connected between the OLED and the first scan line Sli.
“a first switch element disposed on the first surface of the substrate in the first unit region, and comprising a first gate”
Kim Figure 5 teaches transistors T1-T7, which are all switches which comprise gates.
“and a first signal line electrically connected between the first gate of the first switch element and the [first scan driver]”
Kim Figure 4 and column 11 lines 26-28 teach The first scan driver SDV1 may supply the scan signal to the first scan lines S11 to S1n in response to a first gate control signal GCS1 from the timing controller TC.
Kim does not explicitly teach:
“a first conductive pad disposed on the … surface of the substrate” and “first conductive pad”
Chiou teaches in column 5 lines 29-33 teach the active device array substrate 100 may further include a plurality of pads P. The pads P may be respectively electrically connected to one ends of the first test line 131, the second test line 132, the third test line 141, and the fourth test line 142. It would have been obvious for a person with ordinary skill in the art before the invention was effectively filed to have modified Kim in view of Chiou to have included the features of “a first conductive pad disposed on the … surface of the substrate” and “first conductive pad” because an external driver circuit board cannot transmit a signal into a display area effectively through the circuit in the peripheral area. Therefore, the LCD panel cannot display normally and the manufacturing yield cannot be effectively improved (Chiou column 1 lines 34-37).
Kim/Chiou do not explicitly teach:
“second [surface]”
However, it is known to use data pads to connect to scan lines and to place them on the back surface. Bang teaches in paragraph [0069] scan pads (not shown) for connecting the scan lines of the pixel array 10 to the gate COFs 20 are formed on the back surface of the substrate 12 of the display panel. It would have been obvious for a person with ordinary skill in the art before the invention was effectively filed to have modified Kim/Chiou in view of Bang to have included the features of “second [surface]” because when the COFs 6 and 8 protrude to the outside of the substrate 2 of the display panel, a bezel width of the display device increases and it is difficult to round the edges of the substrate 2 of the display panel (Bang [0011]).
In regards to claim 12, Kim/Chiou/Bang teaches all the limitations of claim 1 and further teaches:
“further comprising a second signal line, wherein a first terminal of the first switch element is electrically connected to the second signal line”
Kim Figure 5 teaches signal lines Sli-1 and Sli+1 connected to switch T3 via T4 or T7 respectively.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL E TEITELBAUM, Ph.D. whose telephone number is (571)270-5996. The examiner can normally be reached 8:30AM-5:00PM EST.
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/MICHAEL E TEITELBAUM, Ph.D./ Primary Examiner, Art Unit 2422