DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 2, and 18-24 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kim et al. (hereinafter “Kim”), US Patent No. 10,713,996.
Regarding claim 1, Kim teaches a pixel circuit (fig. 9) comprising: a light-emitting element configured to emit light (fig. 9, light emitting device 200); a driving transistor configured to supply a current to the light-emitting element (fig. 9, driving transistor 311); a first circuit including a first capacitor charged with a first data voltage (figs. 7, 9, PWM driving circuit 320, capacitor 326); and a second circuit including a second capacitor charged with a second data voltage and configured to adjust the current supplied by the driving transistor to the light-emitting element (figs. 7, 9, PAM driving circuit 310, capacitor 314), wherein the first circuit is configured to output a discharge control signal that instructs the second capacitor to discharge in response to a voltage change in the first capacitor for turning the light-emitting element off (fig. 9, col. 12, lines 1-37).
Regarding claim 2, Kim teaches wherein the first circuit includes: a first charging circuit connected to a data line configured to sequentially receive the first data voltage and the second data voltage, the first charging circuit being configured to charge the first capacitor with the first data voltage supplied through the data line (fig. 8, circuit 323); a first discharging circuit configured to discharge a voltage of the first capacitor (fig. 8, circuit 322); and an inverting circuit configured to output the discharge control signal based on the voltage change in the first capacitor (fig. 8, circuit 325).
Regarding claim 18, Kim teaches a display device (fig. 2A, display panel 1000) comprising: a display panel including a plurality of data lines (fig. 2A, vertical lines), a plurality of gate lines (fig. 2A, horizontal lines), a plurality of power lines (fig. 9, VDD), and a plurality of sub-pixels (fig. 2A, subpixels 10-1 to 10-3); a data driver configured to output a first data voltage corresponding to pulse width modulation PWM data and a second data voltage corresponding to pulse amplitude modulation PAM data (figs. 3, 7, 13, data driver 820); and a gate driver configured to output a gate signal to the plurality of gate lines (fig. 13, gate driver 830), wherein each of the plurality of sub-pixels includes: a light-emitting element configured to emit light (fig. 9, light emitting device 200); a driving transistor configured to supply a current to the light-emitting element (fig. 9, driving transistor 311); a first circuit including a first capacitor configured to be charged with the first data voltage (figs. 7, 9; PWM driving circuit 320, capacitor 326); and a second circuit including a second capacitor configured to be charged with the second data voltage and adjust the current supplied by the driving transistor to the light- emitting element (figs. 7, 9, PAM driving circuit 310, capacitor 314), and wherein the first circuit is configured to output a discharge control signal that instructs the second capacitor to discharge based on a voltage change in the first capacitor (col. 12, lines 1-37).
Regarding claim 19, Kim teaches wherein the data driver is further configured to sequentially supply the second data voltage followed by the first data voltage to each of the plurality of data lines (fig. 13, data driver 820).
Regarding claim 20, Kim teaches wherein a first data line is connected to the first circuit and configured to receive the first data voltage (fig. 7, PWM data voltage), a second data line connected to the second circuit and configured to receive the second data voltage (fig. 7, PAM data voltage), and wherein the first circuit is further configured to charge the first data voltage in the first capacitor while at a same time the second circuit charges the second data voltage in the second capacitor (fig. 9 and accompanying text).
Regarding claim 21, Kim teaches a display device (fig. 2A, display 1000) comprising: a display panel including a plurality of data lines, a plurality of gate lines, and at least one sub-pixel (fig. 2A); and a controller (fig. 13, controller 810) configured to: supply a first data voltage and a second data voltage to the at least one sub- pixel during one frame period for driving the at least one sub-pixel to emit light, wherein a luminance level of the light emitted by the at least one sub-pixel during the one frame period is adjusted based on a first amplitude of the first data voltage (figs. 7, 9; PWM data voltage 320, PAM data voltage 310; col. 12, lines 30-37), and wherein an emission period when the at least one sub-pixel emits the light during the one frame period is adjusted based on a second amplitude of the second data voltage (col 12, lines 18-29; fig. 10).
Regarding claim 22, Kim teaches wherein the controller is configured to sequentially supply the first data voltage and the second data voltage to the at least one sub-pixel during the one frame period (fig. 10, PWM and PAM data).
Regarding claim 23, Kim teaches wherein the controller is configures to simultaneously supply the first data voltage and the second data voltage to the at least one sub-pixel at a same time during the one frame period (fig. 10, PWM and PAM data).
Regarding claim 24, Kim teaches wherein at least one sub-pixel includes a first color sub-pixel configured to emit light of a first color and a second color sub-pixel configured to emit light of a second color different than the first color (fig. 2A, RGB), wherein the controller is further configured to: set a first dynamic data voltage range of the first color sub-pixel to be a first minimum data voltage to a first maximum data voltage (fig. 12B, HDR blocks), and set a second dynamic data voltage range of the second color sub-pixel to be a second minimum data voltage to a second maximum data voltage (fig. 12B, HDR blocks), and wherein the first dynamic data voltage range is different than the second dynamic data voltage range (figs. 12A, 12B, and accompanying text).
Allowable Subject Matter
Claims 3-17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: None of the prior art, either singularly or in combination, teaches or fairly suggests the specific elements comprising the specific combination including “wherein the first charging circuit includes a first pulse width modulation (PWM) transistor configured to electrically connect the first node to the data line in response to a gate-on voltage of a second gate signal, wherein the first discharging circuit includes a second PWM transistor including a gate electrode connected to the first node and a first electrode connected to the first node, and a second electrode connected to the second power line, and wherein the inverting circuit is configured to invert a voltage of the discharge control signal from an off-level to an on-level based on a decrease in a voltage of the first node” and “a first charging circuit connected to a first data line configured to receive the first data voltage, and the first charging circuit being configured to charge the first capacitor with the first data voltage; a first discharging circuit configured to discharge a voltage of the first capacitor; and an inverting circuit configured to output the discharge control signal based on the voltage change in the first capacitor, wherein the second circuit includes: a second charging circuit connected to a second data line configured to receive the second data voltage, and second charging circuit being configured to charge the second capacitor with the second data voltage at a same time while the first data voltage is being charged in the first capacitor by the first charging circuit; and a second discharging circuit configured to discharge the second capacitor when a voltage of the discharge control signal is at an on-level” and “a second PWM transistor including a first electrode and a gate electrode both connected to a first power line configured to receive a pixel driving voltage, and a second electrode connected to the first node, wherein the first node is configured to output the discharge control signal to the second circuit, wherein the second circuit includes: a first pulse amplitude modulation (PAM) transistor configured to turn on in response to the gate-on voltage of the first gate signal to connect a second data line to the third node, the second data line being configured to receive the second data voltage; a second PAM transistor connected between the second node and a fourth node, and configured to turn on in response to a gate-on voltage of a fourth gate signal; and a third PAM transistor connected between the fourth node and the third node, and configured to turn on when a voltage of the discharge control signal output by the first node is an on-level voltage, and wherein the second capacitor is configured to discharge when the second PAM transistor and the third PAM transistor are turned on.”
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Yang et al. (US Pub. No. 2023/0104084) teaches display device and driving circuit including a PWM circuit and a PAM circuit.
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/KENNETH B LEE JR/Primary Examiner, Art Unit 2625