Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
This office action is a response to a paper filed on 01/22/2026 in which claims 1-11, 15-17, 19 and 21-22 are pending and ready for examination.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-8, 15-17, 19 and 21-22 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Xie et al (hereinafter Xie) (US 2020/0220355 A1).
As to claim 1, Xie discloses a configurable power block system (see Fig 1), comprising: a plurality of power processing blocks (see Fig 1) including:
one or more DC/DC power processing blocks (Fig 1, DC/DC) configured to convert power between a first DC voltage and second DC voltage; and one or more DC/AC power processing blocks (Fig 1, DC/AC) configured to convert power between a first AC voltage and a third DC voltage;
a plurality of switches (Fig 1, direct current switches, parag [0016]) configurable to: electrically connect the one or more DC/DC power processing blocks to the one or more DC/AC power processing blocks to form a first group of power processing blocks (Fig 1, parag [0057]); selectively add to, remove from, or replace a DC/DC power processing block or an DC/AC power processing block in the first group to reconfigure the first group (see parag [0103], when a sub-module fails, it can be removed from the system in a bypass mode, only one unit is affected; when a power converter fails, the corresponding direct-current switch can be separated), and electrically connect the first group of power processing blocks to a first electrical connection and a second electrical connection (see Fig 9, parag [0099], DC).
As to claim 2, Xie discloses the system of claim 1, wherein each of the plurality of power processing blocks include one or more sub-processing blocks (Fig 9, plurals of DC/DC converters) configured to convert power between a first voltage and a second voltage, and wherein each of the plurality of sub-processing block includes a plurality of power converters (Fig 9, DC/DC converters).
As to claim 3, Xie discloses the system of claim 2, wherein the one or more sub-processing blocks are configured to convert power between a first sub-processing block DC voltage and a sub-processing block AC voltage (Fig 9, DC/AC converters convert DC power to AC power).
As to claim 4, Xie discloses the system of claim 3, wherein the one or more sub-processing blocks are re-configured to convert power between a second sub-processing block DC voltage and a third sub-processing block DC voltage (Fig 9, DC/DC converters convert DC power to DC power).
As to claim 5, Xie discloses the system of claim 4, further comprising a control board in communication with each of the sub-processing blocks, the control board configured to re-configure the sub-processing blocks between converting power between the first sub-processing block DC voltage (Fig 9, unit 3) and the sub processing block AC voltage (Fig 9, DC/AC), and converting power between the second sub-processing block DC voltage (Fig 9, unit 6) and the third sub-processing block DC voltage (Fig 9, DC/DC) (see claim 12).
As to claim 6, Xie discloses the system of claim 5, wherein the control board is configured to re-configure the sub-processing blocks using one or both of control switching or pulse width modulation (PWM) (see claim 12, controlling the on-off of power semiconductor devices in the direct-current converter and the direct-alternating converter).
As to claim 7, Xie discloses the system of claim 2, further comprising a control board configured to control the plurality of power converters to adjust an output voltage from a given input voltage using control switching and/or pulse width modulation (PWM) of the power converters (see claim 7, parag [0100]).
As to claim 8, Xie discloses the system of claim 2, wherein each of the power converters comprises one of a half-bridge converter, an active neutral point clamped converter, or a full-bridge converter (see Figs 3 & 4).
As to claim 15, Xie discloses the system of claim 1, further comprising a controller in communication with the plurality of power processing blocks and the plurality of switches, the controller configured to: determine a number of power processing blocks required for the first electrical connection; and connect, via activation of the plurality of switches, the determined number of power processing blocks required for the first electrical connection with one another, the first electrical connection, and/or the second electrical connection (see claim 12, controlling the on-off of the power semiconductor devices in the direct-current converter and the direct-alternating converter, to enable the current flowing through the direct-current converter and the direct-alternating converter to be gradually increased until the current reaches a target value).
As to claim 16, Xie discloses the system of claim 15, wherein the controller is configured to determine the number of power processing blocks required for the first electrical connection based on an electrical load (see claim 12, controlling the on-off of the power semiconductor devices in the direct-current converter and the direct-alternating converter, to enable the current flowing through the direct-current converter and the direct-alternating converter to be gradually increased until the current reaches a target value) or electrical supply of the first electrical connection and on one or more maximum power ratings of the plurality of power processing blocks.
As to claim 17, Xie discloses the system of claim 16, wherein the controller receives the electrical load of the first electrical connection (see Fig 9, first electrical connection at the PV/Wind sites) and/or the one or more maximum power ratings of the plurality of power processing blocks from an external device.
As to claim 19, Xie discloses the system of claim 15, wherein each DC/DC power processing block comprises a first series of sub-processing blocks connected in series with a second series of sub-processing blocks (see Fig 9, sub-modules connected in series with DC/AC), each of the first series and the second series of sub-processing blocks comprising a plurality of DC/AC converters (Fig 9, DC/AC converters), the first series of sub-processing blocks configured to operate with the second series of sub-processing blocks to convert power between the first DC voltage and the second DC voltage via an intermediate AC voltage (Fig 9, two-phase, three-phase load, wind power).
As to claim 21, Xie discloses the system of claim 15, wherein each DC/AC power processing block comprises a first series of sub-processing blocks connected in parallel with a second series of sub-processing blocks (Fig 9, DC/AC converters connected in parallel), each of the first series and the second series of sub-processing blocks comprising a plurality of DC/AC converters (Fig 9, DC/AC converters), the first series of sub-processing blocks configured to operate with the second series of sub-processing blocks to convert power between the third DC voltage and the first AC voltage (Fig 9, the DC/AC converters convert DC power into AC power).
As to claim 22, Xie discloses the system of claim 15, wherein in determining the number of power processing blocks required for the first electrical connection, the controller is configured to determine a number of DC/DC power processing blocks a number of DC/AC power processing blocks (Fig 9, parag [0099], five groups of DC/AC converters and four groups of DC/DC converters).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 9-11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Xie et al (hereinafter Xie) (US 2020/0220355 A1) in view of Slepchenkov et al (hereinafter Slepchenkov) (US 2023/0019530 A1).
As to claim 9, Xie does not disclose the system of claim 2, wherein each of the sub-processing blocks is configured to act as a bi-directional power port. However, Slepchenkov discloses wherein each of the sub-processing blocks is configured to act as a bi-directional power port (see Fig 6B, 602A, parag [0101]). It would have been obvious to one skilled in the art before the effective filing date of the invention to modify the converter of Xie to become a bi-directional converter as taught by Slepchenkov in order to provide power in both directions of the system.
As to claim 10, the combination of Xie and Slepchenkov discloses the system of claim 2, wherein each of the plurality of sub-processing blocks are electrically connectable to one or more other sub-processing blocks of the plurality of sub-processing blocks (Slepchenkov, see Fig. 10C, claim 1).
As to claim 11, the combination of Xie and Slepchenkov discloses the system of claim 10, wherein the plurality of sub-processing blocks are coupled into three pairs of sub-processing blocks, each pair of sub-processing blocks configured to convert input DC power into one phase of AC output power (Slepchenkov, see Fig 10C, 108IC, in conjunction with Fig. 10B).
Response to Arguments
Applicant’s arguments, see pages 6-10, filed on 01/22/2026, with respect to the rejection(s) of claim(s) 1 under 102(a)(1) have been fully considered and are moot. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Xie et al and Slepchenkov et al.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DUC M PHAM whose telephone number is (571)272-5026. The examiner can normally be reached 10:00 am - 6:00 pm, Monday to Friday.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kim, Taelor can be reached at 571-270-7166. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/DUC M PHAM/Examiner, Art Unit 2836 May 21, 2026
/TAELOR KIM/Supervisory Patent Examiner, Art Unit 2836
Prosecution Insights