Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claims 9 and 18 are rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. In claims 9 and 18, the term “the plurality of inputs” lacks proper antecedent basis.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-19 are rejected under 35 U.S.C. 103 as being unpatentable over US 2010/0301942 to Hasan Abrar (“Hasan”).
With respect to claim 1, Hassan discloses in Fig. 2 a radio frequency (e.g., Para. 1 discloses use of radio frequency signals as inputs) amplifier comprising:
an output (e.g., the junction between L201 and C202),
a plurality of transistors (e.g., 211-212 and one of the parallel transistors forming 230 as discussed below) arranged to form an amplification path (e.g., 211-212) coupled to the output (e.g., the junction between L201 and 202), and a bypass path (e.g., 230) coupled to the output (e.g., the junction between L201 and 202);
an LC component (e.g., L201 and C202) including a first capacitor (e.g., C202) and an inductor (e.g., L201) connected to an output of the amplifier; and
a switch (e.g., another one of the parallel transistors making up 230) to selectively connect an input of the radio frequency amplifier to the bypass path during a bypass mode of operation and to disconnect the input of the radio frequency amplifier from the bypass path in a gain mode of operation, LC component (e.g., L201 and C202) connected to (e.g., at the junction between L201 and C202) the amplification path in the gain mode of operation and connected to (e.g., at the junction between L201 and C202) the bypass path in the bypass mode of operation. Hassan fails to disclose switch 230 in Fig. 2 is formed of parallel transistors. However, it was notoriously well-known in the art to a person of skill in the art before the effective filing date of the claimed invention that a switch can be implemented by parallel-connected transistors conducting smaller currents to save costs and/or conduct smaller currents through each transistor and thus reduce stress on the transistor; an official notice of the foregoing fact is hereby taken. Thus, it would have been obvious to a person of ordinary skill in the art to implement switch 230 in Fig. 2 of Hasan using the notoriously well-known method of forming a switch with parallel-connected transistors because such a modification would reduce costs and/or enable smaller currents to flow through the transistor to reduce stress through the switch.
With respect to claim 2, LC component (e.g., L201 and C202) provides impedance matching (e.g., however lossy, impedance matching is provided by L201 and C202 as per Para. 11) at the output (e.g., the junction between L201 and 202) in the bypass mode of operation.
With respect to claim 3, the bypass path (e.g., 230) is to connect the input of the amplifier to the output (e.g., the junction between L201 and 202) of the amplifier without signal amplification.
With respect to claim 4, the amplifier includes no more than a single inductor (e.g., L201).
With respect to claim 5, a second capacitor (e.g., C204) is connected in parallel with (e.g., C204 is in parallel with L201 via 212 and 211) the inductor.
With respect to claims 6-7 only, the following discussion applies. The above discussed modification similarly applies to switch 430 in Fig. 4. Further, Fig. 4 of Hasan discloses an output (e.g., OUTPUT), LC component (e.g., L402 and C403), and a switch (e.g., one of the parallel switches forming 430). After considering C404, 411, 412, L402, and C403) to be the claimed RF amplifier and C404 to be the claimed second capacitor coupled in parallel to (e.g., via 412) the single inductor (e.g., L402) within the RF amplifier, Fig. 5 shows that there are signals attenuations at a range of frequencies to show a notch filter.
With respect to claim 7, Hasan fails to explicitly disclose that the first capacitor (e.g., C403) or the second capacitor (e.g., C404) is a variable capacitor. However, it was notoriously well known in the art at the time of the invention that capacitors may be formed of variable capacitors to add adjustability: an official notice of the foregoing fact is hereby taken. Thus, it would have been obvious to a person of ordinary skill in the art at the time of the invention to implement the capacitors C403 and C404 in Fig. 4 of Hasan with the notoriously well-known variable capacitors to add adjustability.
With respect to claim 8, the amplification path (e.g., 211-212) in Fig. 2 of Hasan is a cascode buffer including two or more field-effect transistors (e.g., 211-212) which form an input stage (e.g., 211) and an output stage (e.g., 212).
With respect to claim 9, insofar as understood, each one of the plurality of inputs (e.g., inputs to C402 and C401) is connected to the bypass path (e.g., 430 via C403 and other intervening elements) by a corresponding capacitor.
With respect to claim 10, the amplifier is a low-noise amplifier (e.g., compared to an arbitrary amplifier elsewhere that has a higher noise, the Fig. 2 amplifier is a low-noise amplifier).
With respect to claim 11, the above discussion for claim 1 similarly applies. Further, Fig. 3 of Hasan discloses a radio frequency front-end module comprising: an antenna switch module (e.g., 310 and 314); a transmit path (e.g., 315); and a receive path (e.g., 313) including an amplifier (e.g., 211-212 in Fig. 2) and a receive filter (e.g., C204), wherein the amplifier includes the features discussed for claim 1.
With respect to claims 12-18, the above discussion for dependent claims of claim 1 similarly applies.
With respect to claim 19, the above discussion for claims 1 and 11 similarly applies. Further, Fig. 3 of Hasan discloses a transceiver (e.g., 314) in Fig. 3.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Jung KIM whose telephone number is (571)270-7964. The examiner can normally be reached on M-F from 9AM to 5:30PM.
If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Regis BETSCH, can be reached at (571)270-7101. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JUNG KIM/
Primary Examiner, Art Unit 2836
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