Detailed Action
Summary
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
1. This office action is in response to the application filed on November 27, 2024.
2. Claims 1-10 are pending and has been examined.
Information Disclosure Statement
3. The information disclosure statement (IDS) submitted on 12/01/2025 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Drawings
4. The drawings submitted on 11/27/2024 are acceptable.
Claim Rejections - 35 USC § 102
6. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-7 and 9-10 are rejected under 35 U.S.C. 102 (a)(1) (a)(2) as being anticipated by Hosotain “20110090715”.
In re to claim 1, Hosotain discloses a flyback converter with electromagnetic interference suppression function (Figs. 5,16 and 24 are a fly back converter) comprising: an input end (positive and negative terminal of Vin) ; an output end comprising a first output terminal and a second output terminal (positive and negative output terminal coupled to the output capacitor Co); a rectifying element (diode Df and Ds) ; and a transformer (T) comprising a primary winding (np) , a first secondary winding (secondary windings nf1), and a second secondary winding (nf2), wherein the primary winding (np) is connected to the input end (positive termina of Vin) , an upper terminal of the first secondary winding is connected to the first output terminal (dotted end of nf1 is coupled to output terminal thru Lrf1), a lower terminal of the first secondary winding is connected to a first end of the rectifying element (undotted end of nf1 is coupled to cathode of Df) , an upper terminal of the second secondary winding is connected to a second end of the rectifying element (undotted end of nf2 is coupled to anode of Df2), and a lower terminal of the second secondary winding is connected to the second output terminal (dotted end of nf2 is coupled to output terminal thru Lrf2).
In re to claim 2 , Hosotain discloses (Figs.5, 16 and 24) wherein the rectifying element is a diode (diode Df) , the lower terminal of the first secondary winding is connected to a cathode of the diode (undotted end of nf1 is coupled to cathode of Df), and the upper terminal of the second secondary winding is connected to an anode of the diode (undotted end of nf2 is coupled anode terminal of Df).
In re to claim 3 , Hosotain discloses (Figs.5, 16 and 24) , wherein a waveform of a signal passing through the lower terminal of the first secondary winding is opposite to a waveform of a signal passing through the upper terminal of the second secondary winding (second secondary winding nf1 and the third secondary winding nf2 are preferably wound to include the same number of turns and to have opposite magnetic polarities, such that voltages generated in the second and third secondary windings nf1 and nf2 cancel each other, see prag. 0065).
In re to claim 4 , Hosotain discloses (Figs.5, 16 and 24) wherein a number of turns of the first secondary winding is equal to a number of turns of the second secondary winding (see prag.0065).
In re to claim 5 , Hosotain discloses (Figs.5, 16 and 24) wherein a phase of the primary winding is opposite to a phase of the first secondary winding and a phase of the second secondary winding (the first primary winding and the first secondary winding are wound so as to have opposite magnetic polarities, see prag.0015).
In re to claim 6 , Hosotain discloses (Figs.5, 16 and 24) wherein the input terminal comprises a first input terminal and a second input terminal (positive and negative terminal of Vin restively ), the first input terminal is connected to an upper terminal of the primary winding (positive terminal of Vin is coupled to dotted terminal of np thru Lr), and the second input terminal is connected to a lower terminal of the primary winding (negative terminal of Vin is coupled to undotted terminal of np thru switch S1),.
In re to claim 7 , Hosotain discloses (Figs.5, 16 and 24) further comprising a first capacitor (capacitor Cr) , wherein one end of the first capacitor is connected to the first input terminal (Cr is coupled to Vin), and another end of the first capacitor is connected to the second input terminal (Fig. 16 : Cr is coupled negative terminal of vin thru S1 and S2).
In re to claim 9 , Hosotain discloses (Figs.5, 16 and 24) wherein the switch element is a metal-oxide-semiconductor field-effect transistor or a bipolar junction transistor (switch S1 is MOSFET).
In re to claim 10 , Hosotain discloses (Figs.5, 16 and 24) further comprising a second capacitor (capacitor Co) , wherein one end of the second capacitor is connected to the first output terminal (first plate of Co coupled to positive output terminal) , and another end of the second capacitor is connected to the second output terminal (second plate of capacitor Co is coupled to negative output terminal).
Claim Rejections - 35 USC § 103
5. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Hosotain “20110090715” in a view of Takayanagi “ 20130002746”.
In re to claim 10 , Hosotain discloses (Figs.5, 16 and 24) further comprising a resistor and a switch element (Switch S1) , wherein the second input terminal (negative terminal of Vin) is connected to the lower terminal of the primary winding (undotted terminal of np) to switch (S1) but fails to discloses via resistor.
Whereas, Takayanagi discloses flyback converter (Figs. 4, 8 and 12) second input terminal is coupled to the lower primary terminal thru resistor (Figs. 4,8 and 12 shows R3 is coupled to primary winding N1 thru Q1 and ground . Ground terminal is equivalent to second input terminal).
Therefore, it would have been obvious to one of ordinary skilled person in the art before the effective filing date of the claimed invention to have modified the flyback converter of Hosotain to include a resistor as taught by Takayanaqi to prevent/sink the over/excessive current to the ground and controlling the converter stability, switching efficiency, and system reliability.
Conclusion
8. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Toyoizumi “JP2004122659” The present invention relates to an image forming apparatus such as a laser printer, and more particularly to an image forming apparatus having a built-in low-voltage power supply having a plurality of voltage outputs.
Yasumura “20020080635” The present invention relates to a switching power supply circuit to be provided as a power supply for various electronic apparatus.
Easter “4641229” the present invention relates to dc-to-dc switching converters and to switching voltage regulators.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SISAY G TIKU whose telephone number is (571)272-6898. The examiner can normally be reached 8:30AM-6:00PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Crystal L Hammond can be reached at (571) 270-1682. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/SISAY G TIKU/
Primary Examiner, Art Unit 2838
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