DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
Applicant’s amendment (claims) filed on January 2, 2026 and supplemental amendment (spec) filed on January 27, 2026 has been entered. Claims 1-8 are currently pending. Applicant’s amended claims are addressed herein below.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3 and 8 are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 20190114980) in view of Shih et al. (US 20220092287).
As to claim 1, Kim discloses a display device (Fig. 1), comprising:
a display panel (Fig. 1(100)) that includes a plurality of scan lines (Fig. 1(GL), [0047]), and a display portion (Fig. 1(101)) that is divided into a plurality of display regions ([0056]: display area 101 may be divided into n (where n is a natural number equal to or more than two) number of horizontal blocks);
a scan line driver (Fig. 1(300): gate driving circuit) that sequentially outputs a scan signal to each of the scan lines (Fig. 1(GL), [0047]); and
a touch detector (Fig. 1(600): touch driving circuit) that detects a touch on the display panel ([0076]), wherein
the scan line driver (Fig. 1(300): gate driving circuit) includes at least one circuit group ([0081]: n number of driving stage groups DSG1 to DSGn, k (where k is a natural number equal to “n−1”)),
the circuit group includes a plurality of shift registers (Fig. 13(300a, 300b): first shift register 300a and second shift register 300b) that include a plurality of unit circuits that are multi-stage connected, and that output the scan signal to each of the scan lines, and the plurality of shift registers sequentially output the scan signal to each of the scan lines within each of the display regions ([0182] – [0185]),
the touch detector (Fig. 1(600): touch driving circuit) detects the touch on the display panel in a stopping period in which the at least one circuit group stops outputting of the scan signal (Fig. 3, [0045], [0095]).
Kim does not explicitly teach in the one circuit group: each of the shift registers sequentially outputs the scan signal as a result of a selection signal, for selecting the shift register to output the scan signal, and a start signal, for starting the outputting of the scan signal, being input only into the unit circuit of each first stage, each of the selection signal input into each of the unit circuits of the first stage has a phase that mutually differs according to a scan period in which the circuit group outputs the scan signal and the stopping period, and the start signal is commonly input into each of the unit circuits of the first stage.
Shih teaches in the one circuit group: each of the shift registers (Fig. 9(SR-1 – SR-3): shift registers) sequentially outputs the scan signal ([0070]: scan signals DP_1 – DP_Y) as a result of a selection signal (Fig. 9(S1): switch control signal), for selecting the shift register stage (Fig. 9(SR-1): shift register) to output the scan signal ([0070] – [0071]: scan signal DP_1), and a start signal (Fig. 9(STV1 – STV4): start pulse signal), for starting the outputting of the scan signal, being input into the unit circuit of each first stage (Fig. 9(SR-1): shift register, Fig. 9(522_1 – 522_4): shift register groups, Note: a “shift register group” is interpreted as a unit circuit, [0070] – [0071]),
each of the selection signal input into each of the unit circuits of the first stage (Fig. 9(SR-1): shift register) has a phase that mutually differs according to a scan period in which the circuit group outputs the scan signal and the stopping period (Figs. 9, 12, [0080] – [0082]), and
the start signal (Fig. 9(STV1 – STV4): start pulse signal) is commonly input into each of the unit circuits of the first stage (Fig. 9(SR-1 – SR-3): shift registers, Fig. 9(522_1 – 522_4): shift register groups, Note: a “shift register group” is interpreted as a unit circuit, [0070] – [0071]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the clamed invention to modify Kim’s display device by incorporating Shih’s idea of having start signal (start pulse signal) commonly input into each of the unit circuits of the first stage (first shift register of each shift register group) in order to simplify circuit design while minimizing volume of the display device.
As to claim 2, Kim teaches the display device according to claim 1, wherein the scan line driver (Kim: Fig. 1(300): gate driving circuit) includes a plurality of the circuit group (Kim: ([0056]: display area 101 may be divided into n (where n is a natural number equal to or more than two) number of horizontal blocks), and
the plurality of circuit groups sequentially outputs the scan signal (Kim: [0047]).
Kim does not explicitly teach each of the selection signal input into each of the unit circuits of the first stage is commonly input into each of the unit circuits of the first stage of the different circuit groups.
Shih teaches each of the selection signal (Fig. 9(S1): switch control signal) input into each of the unit circuits of the first stage (Fig. 9(SR-1): shift register) is commonly input into each of the unit circuits of the first stage of the different circuit groups (Fig. 9(522_1 – 522_4): shift register groups, [0070] – [0071]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the clamed invention to modify Kim’s display device by adapting Shih’s idea of each of the selection signal input into each of the unit circuits of the first stage is commonly input into each of the unit circuits of the first stage of the different circuit groups (shift register groups) in order to output scan signals according to the respective start pulse signal of the unit circuit during the same time period.
As to claim 3, Kim (as modified by Shih) teach the display device according to claim 1, wherein a reset signal for resetting the unit circuit of a final stage is commonly input into each of the unit circuits of the final stage of each of the plurality of shift registers (Kim: Fig. 13(RST), [0184], [0189], [0194]).
As to claim 8, Kim discloses a driving method for a display device (Fig. 1) including
a display panel (Fig. 1(100)) including a plurality of scan lines (Fig. 1(GL), [0047]) and a display portion (Fig. 1(101)) divided into a plurality of display regions ([0056]: display area 101 may be divided into n (where n is a natural number equal to or more than two) number of horizontal blocks), a display operation of displaying a display element and a touch detection being performed in an alternating manner (Fig. 3, [0045], [0095]), the driving method comprising:
displaying the display element or a portion of the display element in one of the display regions by sequentially outputting, from one of a plurality of shift registers (Fig. 13(300a, 300b): first shift register 300a and second shift register 300b) that include a plurality of unit circuits and that sequentially output a scan signal to each of the scan lines within each of the plurality of display regions, the scan signal to each of the scan lines, the plurality of unit circuits being multi-stage connected and outputting the scan signal to the scan line ([0182] – [0185]); and
detecting a touch on the display panel in a stopping period in which the plurality of shift registers stops outputting of the scan signal (Fig. 3, [0045], [0095]).
Kim does not explicitly teach in the displaying of the display element or a portion of the display element, the scan signal is sequentially output from the one shift register of the plurality of shift registers as a result of a selection signal, for selecting the shift register to output the scan signal, and a start signal, for starting the outputting of the scan signal, being input into the unit circuit of a first stage of each of the shift registers,
each of the selection signal input into each of the unit circuits of the first stage has a phase that mutually differs according to a scan period in which the plurality of the shift registers outputs the scan signal and the stopping period, and the start signal is commonly input into each of the unit circuits of the first stage.
Shih teaches in the displaying of the display element or a portion of the display element, the scan signal ([0070]: scan signals DP_1 – DP_Y) is sequentially output from the one shift register of the plurality of shift registers (Fig. 9(SR-1): shift register) as a result of a selection signal (Fig. 9(S1): switch control signal), for selecting the shift register (Fig. 9(SR-1): shift register) to output the scan signal ([0070] – [0071]: scan signal DP_1), and a start signal (Fig. 9(STV1 – STV4): start pulse signal), for starting the outputting of the scan signal, being input into the unit circuit of a first stage of each of the shift registers (Fig. 9(SR-1): shift register, Fig. 9(522_1 – 522_4): shift register groups, Note: a “shift register group” is interpreted as a unit circuit, [0070] – [0071]),
each of the selection signal input into each of the unit circuits of the first stage (Fig. 9(SR-1): shift register) has a phase that mutually differs according to a scan period in which the plurality of the shift registers outputs the scan signal and the stopping period (Figs. 9, 12, [0080] – [0082]), and
the start signal (Fig. 9(STV1 – STV4): start pulse signal) is commonly input into each of the unit circuits of the first stage (Fig. 9(SR-1 – SR-3): shift registers, Fig. 9(522_1 – 522_4): shift register groups, Note: a “shift register group” is interpreted as a unit circuit, [0070] – [0071]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the clamed invention to modify Kim’s display device by incorporating Shih’s idea of having start signal (start pulse signal) commonly input into each of the unit circuits of the first stage (first shift register of each shift register group) in order to simplify circuit design while minimizing volume of the display device).
Allowable Subject Matter
Claims 4-7 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Response to Arguments
Applicant’s arguments with respect to claims 1-8 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to AFROZA Y CHOWDHURY whose telephone number is (571)270-1543. The examiner can normally be reached M-F 9am-5pm.
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/AFROZA CHOWDHURY/Primary Examiner, Art Unit 2628