DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on May 29, 2026 has been entered.
Claims 1-9 are currently pending. Claim 9 is new. Applicant’s amended claims are addressed herein below.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1-9 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Regarding claims 1 and 8, “the start signal is commonly and simultaneously input into each of the unit circuits of the first stage” is not described in the originally filed specification. Therefore, this newly added limitation is considered as a new matter.
Claims 2-7 and 9 are rejected since those depend on rejected claim 8.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3 and 8-9 are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 20190114980) in view of Jin et al. (US 20230177994, US 11,869,405).
As to claim 1, Kim discloses a display device (Fig. 1), comprising:
a display panel (Fig. 1(100)) that includes a plurality of scan lines (Fig. 1(GL), [0047]), and a display portion (Fig. 1(101)) that is divided into a plurality of display regions ([0056]: display area 101 may be divided into n (where n is a natural number equal to or more than two) number of horizontal blocks);
a scan line driver (Fig. 1(300): gate driving circuit) that sequentially outputs a scan signal to each of the scan lines (Fig. 1(GL), [0047]); and
a touch detector (Fig. 1(600): touch driving circuit) that detects a touch on the display panel ([0076]), wherein
the scan line driver (Fig. 1(300): gate driving circuit) includes at least one circuit group ([0081]: n number of driving stage groups DSG1 to DSGn, k (where k is a natural number equal to “n−1”)),
the circuit group includes a plurality of shift registers (Fig. 13(300a, 300b): first shift register 300a and second shift register 300b) that include a plurality of unit circuits that are multi-stage connected, and that output the scan signal to each of the scan lines, and the plurality of shift registers sequentially output the scan signal to each of the scan lines within each of the display regions ([0182] – [0185]),
the touch detector (Fig. 1(600): touch driving circuit) detects the touch on the display panel in a stopping period in which the at least one circuit group stops outputting of the scan signal (Fig. 3, [0045], [0095]).
Kim does not explicitly teach in the one circuit group: each of the shift registers sequentially outputs the scan signal as a result of a selection signal, for selecting the shift register to output the scan signal, and a start signal, for starting the outputting of the scan signal, being input only into the unit circuit of each first stage, each of the selection signal input into each of the unit circuits of the first stage has a phase that mutually differs according to a scan period in which the circuit group outputs the scan signal and the stopping period, and the start signal is commonly and simultaneously input into each of the unit circuits of the first stage.
Jin teaches in the one circuit group (Fig. 18(310): shift register unit group): each of the shift registers (Fig. 18(301): shift register unit) sequentially outputs the scan signal ([0120]: output from the signal output terminal Gout) as a result of a selection signal (Fig. 18(511): clock signal Ck), for selecting the shift register stage (Fig. 18(3011): first shift register unit) to output the scan signal ([0120]: output from the signal output terminal Gout), and a start signal (Fig. 18(531): scan enable signal Fw), for starting the outputting of the scan signal, being input into the unit circuit (Fig. 18(301): shift register unit) of each first stage (Fig. 18(3011): first shift register unit, [0130], [0139], [0144]: first level line 531 is configured to transmit the scan enable signal Fw from the scan enable terminal FW in each shift register unit 301),
each of the selection signal (Fig. 18(511): clock signal Ck) input into each of the unit circuits (Fig. 18(301): shift register unit) of the first stage (Fig. 18(3011): first shift register unit) has a phase that mutually differs according to a scan period in which the circuit group outputs the scan signal and the stopping period (Fig. 20, [0130], [0139], [0144]), and
the start signal (Fig. 18(531): scan enable signal Fw) is commonly and simultaneously input into each of the unit circuits (Fig. 18(301): shift register unit) of the first stage (Fig. 18(3011): first shift register unit, [0120], [0144]: first level line 531 is configured to transmit the scan enable signal Fw from the scan enable terminal FW in each shift register unit 301).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Kim’s display device by incorporating Jin’s idea of having start signal (scan enable signal) commonly input into each of the unit circuits of the first stage (first shift register of each shift register group) in order to improve the drive capability of the scan signal transmitted through the scan signal line and simplify circuit design while minimizing volume of the display device.
As to claim 2, Kim teaches the display device according to claim 1, wherein the scan line driver (Kim: Fig. 1(300): gate driving circuit) includes a plurality of the circuit group (Kim: ([0056]: display area 101 may be divided into n (where n is a natural number equal to or more than two) number of horizontal blocks), and
the plurality of circuit groups sequentially outputs the scan signal (Kim: [0047]).
Kim does not explicitly teach each of the selection signal input into each of the unit circuits of the first stage is commonly input into each of the unit circuits of the first stage of the different circuit groups.
Jin teaches each of the selection signal (Fig. 18(511): clock signal Ck) input into each of the unit circuits (Fig. 18(301): shift register unit) of the first stage (Fig. 18(3011): first shift register unit) is commonly input into each of the unit circuits of the first stage of the different circuit groups (Fig. 18(310): shift register unit groups, [0120] – [0121], [0144]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the clamed invention to modify Kim’s display device by adapting Jin’s idea of each of the selection signal (clock signal) input into each of the unit circuits (shift register unit) of the first stage is commonly input into each of the unit circuits of the first stage of the different circuit groups (shift register unit groups) in order to improve the drive capability of the scan signal transmitted through the scan signal line.
As to claim 3, Kim (as modified by Jin) teach the display device according to claim 1, wherein a reset signal for resetting the unit circuit of a final stage is commonly input into each of the unit circuits of the final stage of each of the plurality of shift registers (Kim: Fig. 13(RST), [0184], [0189], [0194]).
As to claim 8, Kim discloses a driving method for a display device (Fig. 1) including
a display panel (Fig. 1(100)) including a plurality of scan lines (Fig. 1(GL), [0047]) and a display portion (Fig. 1(101)) divided into a plurality of display regions ([0056]: display area 101 may be divided into n (where n is a natural number equal to or more than two) number of horizontal blocks), a display operation of displaying a display element and a touch detection being performed in an alternating manner (Fig. 3, [0045], [0095]), the driving method comprising:
displaying the display element or a portion of the display element in one of the display regions by sequentially outputting, from one of a plurality of shift registers (Fig. 13(300a, 300b): first shift register 300a and second shift register 300b) that include a plurality of unit circuits and that sequentially output a scan signal to each of the scan lines within each of the plurality of display regions, the scan signal to each of the scan lines, the plurality of unit circuits being multi-stage connected and outputting the scan signal to the scan line ([0182] – [0185]); and
detecting a touch on the display panel in a stopping period in which the plurality of shift registers stops outputting of the scan signal (Fig. 3, [0045], [0095]).
Kim does not explicitly teach in the displaying of the display element or a portion of the display element, the scan signal is sequentially output from the one shift register of the plurality of shift registers as a result of a selection signal, for selecting the shift register to output the scan signal, and a start signal, for starting the outputting of the scan signal, being input into the unit circuit of a first stage of each of the shift registers,
each of the selection signal input into each of the unit circuits of the first stage has a phase that mutually differs according to a scan period in which the plurality of the shift registers outputs the scan signal and the stopping period, and the start signal is commonly and simultaneously input into each of the unit circuits of the first stage.
Jin teaches in the displaying of the display element or a portion of the display element (Fig. 18(310): shift register unit group): each of the shift registers (Fig. 18(301): shift register unit), the scan signal is sequentially output from the one shift register of the plurality of shift registers (Fig. 18(301): shift register unit) as a result of a selection signal (Fig. 18(511): clock signal Ck), for selecting the shift register to output the scan signal ([0120]: output from the signal output terminal Gout), and a start signal (Fig. 18(531): scan enable signal Fw), for starting the outputting of the scan signal, being input into the unit circuit (Fig. 18(301): shift register unit) of a first stage (Fig. 18(3011): first shift register unit) of each of the shift registers (Fig. 18, [0130], [0139], [0144]: first level line 531 is configured to transmit the scan enable signal Fw from the scan enable terminal FW in each shift register unit 301),
each of the selection signal (Fig. 18(511): clock signal Ck) input into each of the unit circuits (Fig. 18(301): shift register unit) of the first stage (Fig. 18(3011): first shift register unit) has a phase that mutually differs according to a scan period in which the circuit group outputs the scan signal and the stopping period (Fig. 20, [0130], [0139], [0144]), and
the start signal (Fig. 18(531): scan enable signal Fw) is commonly and simultaneously input into each of the unit circuits (Fig. 18(301): shift register unit) of the first stage (Fig. 18(3011): first shift register unit, [0120], [0144]: first level line 531 is configured to transmit the scan enable signal Fw from the scan enable terminal FW in each shift register unit 301).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Kim’s display device by incorporating Jin’s idea of having start signal (scan enable signal) commonly input into each of the unit circuits of the first stage (first shift register of each shift register group) in order to improve the drive capability of the scan signal transmitted through the scan signal line and simplify circuit design while minimizing volume of the display device.
As to claim 9, Kim (as modified by Jin) teach the display device according to claim 1, wherein a number of the shift registers (Fig. 18(301): shift register units) included in the at least one circuit group (Fig. 18(310): shift register unit group) is equal to a number of the selection signals (Fig. 18(511, 512, 513): clock signal Ck) input to the at least one circuit group (Jin: Fig. 18, [0120] – [0121], [0130], [0144], Note: each shift register unit group 310 has three shift registers 301 and three clock signals Ck (selection signals) 511, 512 and 513).
Allowable Subject Matter
Claims 4-7 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims and when the 112 rejection is cured.
Response to Arguments
Applicant’s arguments with respect to claims 1-9 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to AFROZA Y CHOWDHURY whose telephone number is (571)270-1543. The examiner can normally be reached M-F 9am-5pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Nitin Patel can be reached at (571)272-7677. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/AFROZA CHOWDHURY/Primary Examiner, Art Unit 2628
Prosecution Insights