DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This office action is in response to amendment filed on 3/23/2026.
Claims 1, 7-8, and 14-15 have been amended.
The objections and rejections from the prior correspondence that are not restated herein are withdrawn.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 1, 5, 7-8, 12, 14-15, and 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Croxford et al. (US 2017/0364461), Kamata et al. (US 2022/0189561), and Wu et al. (US 2022/0208276).
With respect to claim 1, Croxford teaches of a method comprising: receiving, by a memory subsystem, a read command (fig. 1; paragraph 29-30; where a master device issues a load/read request to the memory system);
determining a command workload for the memory subsystem (paragraph 46-47; where the memory controller monitors the occupancy of its internal buffers and the occupancy of the latency buffer is also monitored);
reducing power consumption when the memory load is light (fig. 2-3; paragraph 39; where memory transaction are grouped together in relative inactive periods to more efficiently use power).
Croxford fails to explicitly teach of (1) determining that the command workload of the memory subsystem satisfies a threshold (2) selecting a forward read trim setting in response to determining that the command workload of the memory subsystem satisfies the threshold; and (3) executing the read command using the selected forward read trim setting.
However, Kamata teaches of determining that the command workload of the memory subsystem satisfies a threshold (paragraph 399-403; where the workload of the memory system is monitored and it is determined if the queue depth of the read requests in the command queue is less than or greater than or equal to a threshold).
The combination of Croxford and Kamata fails to explicitly teach of (1) selecting a forward read trim setting in response to determining that the command workload of the memory subsystem satisfies the threshold; and (2) executing the read command using the selected forward read trim setting.
However, Wu teaches of using a normal read mode in order to reduce power consumption (paragraph 45-46; where during a normal read, lockout mode is employed to reduce the amount of current drawn).
The combination of Croxford, Kamata, and Wu teaches of selecting a forward read trim setting in response to determining the command workload of the memory subsystem satisfies a threshold (Croxford, fig. 3, paragraph 39; Kamata, paragraph 399-403; Wu, paragraph 45-46; where in the combination, the read transactions are issued as normal transactions in order to reduce the amount of power used in response to the memory being lightly loaded, which is determined by the QD being below the threshold of Kamata); and
executing the read command using the selected forward read trim setting (Croxford, fig. 3, paragraph 39; Wu, paragraph 45-46; where in the combination, the read transactions are issued as normal transactions in order to reduce the amount of power used in response to the memory being lightly loaded).
Croxford and Kamata are analogous art because they are from the same field of endeavor, as they are directed to memory management.
It would have been obvious to one of ordinary skill in the art having the teachings of Croxford and Kamata before the time of the effective filing of the claimed invention to use threshold levels of the read queue depth to determine the workload levels of the memory in in Croxford as taught in Kamata. Their motivation would have been to more efficiently determine the workload of the memory system.
Croxford, Kamata, and Wu are analogous art because they are from the same field of endeavor, as they are directed to memory management.
It would have been obvious to one of ordinary skill in the art having the teachings of Croxford, Kamata, and Wu before the time of the effective filing of the claimed invention to execute read transaction in the normal mode in the combination of Croxford and Kamata as taught in Wu. Their motivation would have been to utilize the lockout mode of the normal read to reduce the power consumed (Wu, paragraph 46).
With respect to claim 8, the combination of Croxford, Kamata, and Wu teaches of the limitations cited above with respect to claim 1 for the same reasoning indicated with respect to claim 1.
Croxford also teaches of a non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform the method of claim 1 (paragraph 11, 57, claim 28-29; where a computer readable medium stores a computer program that is executed to case the data processing system to carry out the disclosed method).
With respect to claims 7 and 14, Croxford teaches of the method further comprising: receiving, by the memory subsystem, a second read command (fig. 1; paragraph 29-30; where a master device issues a load/read request to the memory system);
determining a second command workload for the memory subsystem (paragraph 46-47; where the memory controller monitors the occupancy of its internal buffers and the occupancy of the latency buffer is also monitored).
The combination of Croxford and Kamata teaches of determining that the second command workload does not satisfy the threshold (Croxford, fig. 3, paragraph 46-47; Kamata, paragraph 399-403; where Kamata’s thresholds are used to determine the workload levels of the memory system);
Wu teaches of using a reverse read mode in order to perform a faster read operation (paragraph 45-46; where during a reverse read, the operation is performed quicker as it reduces the voltage transition from the initial voltage spike).
The combination of Croxford, Kamata, and Wu teaches of selecting a reverse read trim setting in response to determining the second command workload of the memory subsystem does not satisfy a threshold (Croxford, fig. 3, paragraph 40; Kamata, paragraph 399-403; Wu, paragraph 45-46; where in the combination, the read transactions are issued as reverse transactions in order to reduce duration of the read operation when the memory is heavily loaded in order to maintain throughput, as indicated by Kamata’s workload level comparison to its threshold); and
executing the second read command using the selected reverse read trim setting (Croxford, fig. 3, paragraph 40; Wu, paragraph 45-46; where in the combination, the read transactions are issued as reverse transactions in order to reduce duration of the read operation when the memory is heavily loaded in order to maintain throughput).
Croxford, Kamata, and Wu are analogous art because they are from the same field of endeavor, as they are directed to memory management.
It would have been obvious to one of ordinary skill in the art having the teachings of Croxford, Kamata, and Wu before the time of the effective filing of the claimed invention to execute read transaction in the reverse mode in the combination of Croxford and Kamata as taught in Wu. Their motivation would have been to perform the read operations faster (Wu, paragraph 45).
With respect to claims 5 and 12, Croxford teaches of wherein determining the command workload comprises determining read traffic for the memory subsystem (paragraphs 46-47; where the occupancy of the latency buffers is monitored to determine the current memory load. These include the read operations).
The combination of Croxford, Kamata, and Wu teaches of wherein selecting the forward read trim setting is based on the read traffic satisfying a read traffic threshold (Croxford, fig. 3-4, paragraph 39, 46-49; Kamata, paragraph 399-403; where when the operations are such that the memory is lightly loaded as determined via Kamata’s threshold, in the combination, the read transactions are issued as normal transactions in order to reduce the amount of power used in response to the memory being lightly loaded based on the buffers fill level).
The reasoning for obviousness is the same as indicated with respect claims 1 and 8 above.
With respect to claim 15, the combination of Croxford, Kamata, and Wu teaches of the limitations cited and described above with respect to claims 1 and 7, for the same reasoning described with respect to claims 1 and 7.
With respect to claim 19, the combination of Croxford, Kamata, and Wu teaches of the limitations cited above with respect to claims 5 and 12.
The combination of Croxford and Wu also teaches of wherein determining the first and second command workloads each comprises determining read traffic for the memory subsystem (Croxford paragraphs 46-47; where the occupancy of the latency buffers are monitored to determine the current memory load. These include the read operations),
wherein selecting the forward read trim setting is based on the read traffic satisfying a read traffic threshold (Croxford, fig. 3-4, paragraph 39, 46-49; Kamata, paragraph 399-403; where when the operations are such that the memory is lightly loaded as determined via Kamata’s threshold, in the combination, the read transactions are issued as normal transactions in order to reduce the amount of power used in response to the memory being lightly loaded based on the buffers fill level), and
wherein selecting the reverse read trim setting is based on the read traffic not satisfying the read traffic threshold (Croxford, fig. 3, paragraph 40; Wu, paragraph 45-46; where in the combination, the read transactions are issued as reverse transactions in order to reduce duration of the read operation when the memory is heavily loaded as determined via Kamata’s threshold, in response the buffers fill level, in order to maintain throughput).
Claim(s) 2-3, 9-10, and 16-17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Croxford, Kamata, and Wu as applied to claims 1, 8, and 15 above, and further in view of Byom et al. (US 2014/0068296).
With respect to claims 2 and 9, the combination of Croxford, Kamata, and Wu fails to explicitly each of wherein determining the command workload comprises: estimating a power consumption for the memory subsystem executing the read command, wherein the threshold is a power consumption threshold.
However, Byom teaches of wherein determining the command workload comprises: estimating a power consumption for the memory subsystem executing the read command, wherein the threshold is a power consumption threshold (fig. 5; paragraph 49-52; where the available power level is monitored via a real-time load of the components and predicts the load of the components based on the command queues within the memory system. The selection circuitry sets the current/power threshold).
Croxford, Kamata, Wu, and Byom are analogous art because they are from the same field of endeavor, as they are directed to memory management.
It would have been obvious to one of ordinary skill in the art having the teachings of Croxford, Kamata, Wu, and Byom before the time of the effective filing of the claimed invention to manage the power load in the combination of Croxford, Kamata, and Wu as taught in Byom. Their motivation would have been to more efficiently operate the memory.
With respect to claims 3 and 10, the combination of Croxford, Kamata, Wu, and Byom teaches of wherein the estimated power consumption is a sum of a current power consumption of the memory subsystem executing memory commands in a command queue and additional power consumption of the read command (Croxford, fig. 1; paragraph 29-30; Byom fig. 5 paragraph 49-52; where the available power level is monitored via a real-time load of the components and predicts the load of the components based on the command queues within the memory system. In the combination, as the read command has been received by the memory system, it is also within the queue and thus taken into account for the power level predicting).
The reasoning for obviousness is the same as indicated above with respect to claims 2 and 9.
With respect to claim 16, the combination of Croxford, Kamata, Wu, and Byom teaches of the limitations cited and described above with respect to claims 2 and 9.
Byom also teaches of determining the second command workload comprises estimating a second power consumption for the memory subsystem executing the second read command (fig. 5; paragraph 49-52; where the available power level is monitored via a real-time load of the components and predicts the load of the components based on the command queues within the memory system. The selection circuitry sets the current/power threshold).
The reasoning for obviousness is the same as indicated above with respect to claims 2 and 9.
With respect to claim 17, the combination of Croxford, Kamata, Wu, and Byom teaches of the limitations cited and described above with respect to claims 3 and 10.
The combination of Croxford, Kamata, Wu, and Byom also teaches of wherein the second estimated power consumption is a sum of the power consumption of the memory subsystem executing memory commands in the command queue and additional power consumption of the second read command (Croxford, fig. 1; paragraph 29-30; Byom fig. 5 paragraph 49-52; where the available power level is monitored via a real-time load of the components and predicts the load of the components based on the command queues within the memory system. In the combination, as the read command has been received by the memory system, it is also within the queue and thus taken into account for the power level predicting).
The reasoning for obviousness is the same as indicated above with respect to claims 2 and 9.
Claim(s) 4, 11, and 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Croxford, Kamata, Wu, and Byom as applied to claims 1, 8, and 15 above, and further in view of Nelluri et al. (US 2012/0137158).
With respect to claims 4, 11, and 18, the combination of Croxford, Kamata, Wu, and Byom fails to explicitly teach of wherein the power consumption threshold is a percentage of a peak power threshold of the memory subsystem.
However, Nelluri teaches of wherein the power consumption threshold is a percentage of a peak power threshold of the memory subsystem (paragraph 56; where power threshold is the peak watts, i.e. 100% times the peak power. In the combination with Croxford, it is the peak power of Croxford’s memory system).
Croxford, Kamata, Wu, Byom, and Nelluri are analogous art because they are from the same field of endeavor, as they are directed to memory management.
It would have been obvious to one of ordinary skill in the art having the teachings of Croxford, Kamata, Wu, Byom, and Nelluri before the time of the effective filing of the claimed invention to use the peak power as the threshold in the combination of Croxford, Kamata, Wu, Byom as taught in Nelluri. Their motivation would have been to more efficiently operate the memory.
Claim(s) 6, 13, and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Croxford, Kamata, and Wu as applied to claims 5, 12, and 19 above, and further in view of Ware (US 12,379,955).
With respect to claims 6, 13, and 20 the combination of Croxford, Kamata, and Wu fails to explicitly teach of wherein the read traffic comprises a number of read commands in a command queue of the memory subsystem and wherein the read traffic threshold comprises a threshold number of read commands.
However, Ware teaches of wherein the read traffic comprises a number of read commands in a command queue of the memory subsystem and wherein the read traffic threshold comprises a threshold number of read commands (column 8, lines 53-column 9, line 17; where when the number of read and write access requests pending in the transaction queue falls below relative inactivity threshold that corresponds to the queue depth, the memory is relatively inactive/lightly loaded).
Croxford, Kamata, Wu, and Ware are analogous art because they are from the same field of endeavor, as they are directed to memory management.
It would have been obvious to one of ordinary skill in the art having the teachings of Croxford, Kamata, Wu, and Ware before the time of the effective filing of the claimed invention to determine the light and heaving loading of the combination of Croxford, Kamata, and Wu based on the number of transactions in the transaction queue as taught in Ware. Their motivation would have been to more efficiently operate the memory.
Response to Arguments
Applicant's arguments with respect to independent claims 1, 8, and 15 have been considered but are moot because of the new reference(s) being applied, in light of the amendment, to the particular limitations the arguments are referencing. Thereby the arguments no longer apply to the rejection.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Zhu et al. (US 2021/0019181) discloses using a front-end load threshold to schedule front-end and back-end memory operations.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL C KROFCHECK whose telephone number is (571)272-8193. The examiner can normally be reached on Monday - Friday 8am -5pm, first Friday off.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Tim Vo can be reached on (571) 272-3642. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Michael Krofcheck/Primary Examiner, Art Unit 2138
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