Prosecution Insights
Last updated: August 18, 2026
Application No. 18/966,416

RADIO-FREQUENCY MODULE AND COMMUNICATION DEVICE

Non-Final OA §DP
Filed
Dec 03, 2024
Priority
Jul 03, 2019 — JP 2019-124839 +2 more
Examiner
AKINYEMI, AJIBOLA A
Art Unit
Tech Center
Assignee
Murata Manufacturing Co., Ltd.
OA Round
1 (Non-Final)
80%
Grant Probability
Favorable
1-2
OA Rounds
1y 0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 80% — above average
80%
Career Allowance Rate
760 granted / 946 resolved
+20.3% vs TC avg
Strong +18% interview lift
Without
With
+18.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
28 currently pending
Career history
970
Total Applications
across all art units

Statute-Specific Performance

§101
2.1%
-37.9% vs TC avg
§103
71.6%
+31.6% vs TC avg
§102
19.6%
-20.4% vs TC avg
§112
2.3%
-37.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 946 resolved cases

Office Action

§DP
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 1-10 of application 18/966,416 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-18 of U.S. Patent No. 12199052. Although the claims at issue are not identical, they are not patentably distinct from each other because claims 1-10 of application 18/966,416 is the same as claims 1-18 of U.S Patent No.: 12199052 except for word variations. For example, see table below: Application 18/966,416 U.S. Patent No. 12199052. 1. A radio-frequency module comprising: a mounting substrate having a first main surface and a second main surface on opposite sides of the mounting substrate; a power amplifier mounted on the first main surface of the mounting substrate; a transmission filter connected to the power amplifier and mounted on the first main surface of the mounting substrate; a first chip component including a first switch connected to the transmission filter and mounted on the second main surface of the mounting substrate; a second chip component including a low-noise amplifier connected to the first switch and mounted on the second main surface of the mounting substrate; and an external connection terminal connected to a ground and overlapping the power amplifier in a plan view of the mounting substrate; wherein the first chip component and the second chip component each include a substrate having a first main substrate surface and a second main substrate surface on opposite sides of the substrate, and wherein the second main substrate surface of the substrate in each of the first chip component and the second chip component and a tip surface of the external connection terminal are coplanar with each other. 1. A radio-frequency module comprising: a mounting substrate having a first main surface and a second main surface on opposite sides of the mounting substrate; an electronic component mounted on the first main surface of the mounting substrate; and a first chip component and a second chip component mounted on the second main surface of the mounting substrate, wherein the first chip component and the second chip component include: a substrate having a first main substrate surface and a second main substrate surface on opposite sides of the substrate; and a circuit portion formed on the first main substrate surface side of the substrate, wherein at least a part of the second main substrate surface of the substrate in each of the first chip component and the second chip component is exposed, wherein a material of the substrate in the first chip component and a material of the substrate in the second chip component are a same material, and wherein (1) the first chip component is a first switch that is configured to controllably switch signal paths and the second chip component is a second switch that is configured to controllably switch signal paths; (2) the first chip component is a switch that is configured to controllably switch signal paths and the second chip component is a low-noise amplifier provided in a signal path of a reception signal; (3) the first chip component is a switch that is configured to controllably switch signal paths and the second chip component is a surface acoustic wave filter provided in a signal path: (4) the first chip component is a low-noise amplifier provided in a signal path for a reception signal and the second chip component is a surface acoustic wave filter provided in a signal path for the reception signal; (5) the first chip component is a switch that is configured to controllably switch signal paths and the second chip component is a surface acoustic wave filter provided in a signal path for a reception signal; (6) the first chip component is a low-noise amplifier provided in a signal path for a reception signal and the second chip component is a transmission filter provided in a signal path for a transmission signal; or (7) the first chip component is a switch provided in a signal path for a reception signal and the second chip component is a transmission filter provided in a signal path for a transmission signal. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to AJIBOLA A AKINYEMI whose telephone number is (571)270-1846. The examiner can normally be reached Monday-Friday 8:00am-5:00pm, EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, YUWEN PAN can be reached at (571)-272-7855. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /AJIBOLA A AKINYEMI/Primary Examiner, Art Unit 2649
Read full office action

Prosecution Timeline

Dec 03, 2024
Application Filed
Jul 17, 2026
Non-Final Rejection mailed — §DP (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
80%
Grant Probability
99%
With Interview (+18.3%)
2y 9m (~1y 0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 946 resolved cases by this examiner. Grant probability derived from career allowance rate.

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