Prosecution Insights
Last updated: July 17, 2026
Application No. 18/967,642

STORING AND PROVIDING ACCESS TO ROUND KEYS OF ADVANCED ENCRYPTION STANDARD USING DUAL PORT MEMORY DEVICES

Non-Final OA §102
Filed
Dec 03, 2024
Priority
Dec 12, 2023 — provisional 63/609,333
Examiner
IDOWU, OLUGBENGA O
Art Unit
2494
Tech Center
2400 — Computer Networks
Assignee
Microchip Technology Incorporated
OA Round
1 (Non-Final)
71%
Grant Probability
Favorable
1-2
OA Rounds
1y 8m
Est. Remaining
90%
With Interview

Examiner Intelligence

Grants 71% — above average
71%
Career Allowance Rate
464 granted / 650 resolved
+13.4% vs TC avg
Strong +19% interview lift
Without
With
+19.1%
Interview Lift
resolved cases with interview
Typical timeline
3y 3m
Avg Prosecution
25 currently pending
Career history
677
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
82.5%
+42.5% vs TC avg
§102
14.8%
-25.2% vs TC avg
§112
0.5%
-39.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 650 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1 – 20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Langhammer, patent number: US 10 237 066. As per claim 1, Langhammer teaches a method comprising: generating, using a first encryption key, a first set of round keys for rounds of an advanced encryption standard (AES) algorithm (providing round keys in an AES system, Key stage 1, Fig. 1, col. 5, lines 16-40, key expansion, col. 8, lines 44- 59); generating, using a second encryption key, a second set of round keys for the rounds of AES algorithm (providing second set of round keys, key stage 2, Fig. 1, col. 5, lines 41-49); determining different addresses, of a plurality of memory devices, for the first set of round keys and for the second set of round keys (round keys from stage circuits 111 and 112, col. 5, lines 26-49), wherein first addresses of a first round key, of the first set of round keys, are determined based on: a round of AES algorithm associated with the first round key, the first encryption key, and first indexes of words included in the first round of key (key expansion based on words, col. 8, lines 44- 59), and wherein second addresses of a second round key, of the second set of round keys, are determined based on a round of AES algorithm associated with the second round key, the second encryption key, and second indexes of words included in the second round of key (key expansion based on words, col. 8, lines 44- 59); storing the first set of round keys and the second set of round keys in the different addresses (different storage for sets of round keys, col. 8, lines 60-67), wherein the first round key is stored in a memory device, of the plurality of memory devices, using a first port of the memory device (register circuits for round keys 201 and 202, col. 8, lines 60-67), and wherein the memory device is a dual port memory device that includes the first port and a second port (Dual port RAM, col. 8, lines 60-67); and retrieving the first set of round keys and the second set of round keys from the different addresses (selecting round keys, col. 5, lines 26 - 41), wherein the first round key is retrieved from the first memory device using the second port of the memory device (multiport RAM for reading and writing, col. 8, lines 60-67). As per claim 2, Langhammer teaches wherein the memory device includes a static random access memory (RAM, col. 8, lines 60-67). As per claim 3, Langhammer teaches wherein the memory device includes a register file (registers, col. 8, lines 60-67). As per claim 4, Langhammer teaches wherein round keys, of the first set of round keys and of the second set of round keys, that are generated for a first round of AES algorithm are stored on a first memory device of the plurality of memory devices, and wherein round keys, of the first set of round keys and of the second set of round keys, that are generated for a second round of AES algorithm are stored on a second memory device of the plurality of memory devices (Storage, 111 and 112, col. 5, lines 26-49). As per claim 5, Langhammer teaches wherein the first set of round keys and the second set of round keys are generated as part of AES-galois/counter mode (GCM) (GCM, col. 9, lines 24 - 31). As per claim 6, Langhammer teaches wherein round keys, of the first set of round keys and of the second set of round keys, that are generated for a round of AES algorithm are stored on a particular memory device of the plurality of memory devices, and wherein storing the round keys, generated for the round of AES algorithm, on the particular memory device enables one AES-GCM instance to be used for the round keys for the round of AES algorithm (GCM, col. 9, lines 24 - 31). As per claim 7, Langhammer teaches further comprising determining an address of a word of the first round key based on a round of AES algorithm associated with the first round key, the first encryption key, and an index of the word included in the first round of key (Key expansion, col. 8, lines 46-59). As per claim 8, Langhammer teaches further comprising: receiving a request to perform an AES algorithm on data using a word of the first round key; determining a round for the AES algorithm, an encryption key for the round, and an index for the word; obtaining from the memory device, via the second port, the word; and performing the AES algorithm on the data to obtain encrypted data (encrypting, Fig. 1 130, col. 4, lines 33-49). As per claim 9, Langhammer teaches a system comprising: one or more processing units adapted to: generate, using a first encryption key, a first set of round keys for rounds of an advanced encryption standard (AES) algorithm (providing round keys in an AES system, Key stage 1, Fig. 1, col. 5, lines 16-40, key expansion, col. 8, lines 44- 59); generate, using a second encryption key, a second set of round keys for the rounds of AES algorithm (providing second set of round keys, key stage 2, Fig. 1, col. 5, lines 41-49); determine different addresses, of a plurality of memory devices, for the first set of round keys and for the second set of round keys (round keys from stage circuits 111 and 112, col. 5, lines 26-49), wherein first addresses of a first round key, of the first set of round keys, are determined based on: a round of AES algorithm associated with the first round key, the first encryption key, and first indexes of words included in the first round of key (key expansion based on words, col. 8, lines 44- 59), and wherein second addresses of a second round key, of the second set of round keys, are determined based on a round of AES algorithm associated with the second round key, the second encryption key, and second indexes of words included in the second round of key (key expansion based on words, col. 8, lines 44- 59); and store the first set of round keys and the second set of round keys in the different addresses (different storage for sets of round keys, col. 8, lines 60-67), wherein the first round key is stored in a memory device, of the plurality of memory devices, using a first port of the memory device (register circuits for round keys 201 and 202, col. 8, lines 60-67), and wherein the memory device is a dual port memory device that includes the first port and a second port (Dual port RAM, col. 8, lines 60-67). As per claim 10, Langhammer teaches wherein the one or more processing units are adapted to retrieve the first set of round keys and the second set of round keys from the different addresses, wherein the first round key is retrieved from the first memory device using the second port of the first memory device (multiport RAM for reading and writing, col. 8, lines 60-67). As per claim 11, Langhammer teaches wherein the memory device includes a dual-port static random access memory (RAM, col. 8, lines 60-67). As per claim 12, Langhammer teaches wherein the memory device includes a dual-port register file (registers, col. 8, lines 60-67). As per claim 13, Langhammer teaches wherein the first set of round keys and the second set of round keys are generated as part of AES-galois/counter mode (GCM) (GCM, col. 9, lines 24 - 31). As per claim 14, Langhammer teaches wherein round keys, of the first set of round keys and of the second set of round keys, that are generated for a round of AES algorithm are stored on a particular memory device of the plurality of memory devices, and wherein storing the round keys, generated for the round of AES algorithm, on the particular memory device enables one physical AES-GCM instance to be used for the round keys for the round of AES algorithm (GCM, col. 9, lines 24 - 31). As per claim 15, Langhammer teaches wherein the one or more processing units are adapted to determine an address of word of the first round key based on a round of AES algorithm associated with the first round key, the first encryption key, and an index of the word included in the first round of key (Key expansion, col. 8, lines 46-59). Claims 16-20 are rejected based on claims 9 and 11-14. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to OLUGBENGA O IDOWU whose telephone number is (571)270-1450. The examiner can normally be reached Monday-Friday 8am - 5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jung Kim can be reached at 5712723804. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /OLUGBENGA O IDOWU/Primary Examiner, Art Unit 2494
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Prosecution Timeline

Dec 03, 2024
Application Filed
May 27, 2026
Non-Final Rejection mailed — §102 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
71%
Grant Probability
90%
With Interview (+19.1%)
3y 3m (~1y 8m remaining)
Median Time to Grant
Low
PTA Risk
Based on 650 resolved cases by this examiner. Grant probability derived from career allowance rate.

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