DETAILED ACTION
Status of Claims
Claims 1 – 16 are pending.
Claims 1 and 10 are independent.
This office action is Non-Final.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
A rejection based on double patenting of the “same invention” type finds its support in the language of 35 U.S.C. 101 which states that “whoever invents or discovers any new and useful process... may obtain a patent therefor...” (Emphasis added). Thus, the term “same invention,” in this context, means an invention drawn to identical subject matter. See Miller v. Eagle Mfg. Co., 151 U.S. 186 (1894); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Ockert, 245 F.2d 467, 114 USPQ 330 (CCPA 1957).
A statutory type (35 U.S.C. 101) double patenting rejection can be overcome by canceling or amending the claims that are directed to the same invention so they are no longer coextensive in scope. The filing of a terminal disclaimer cannot overcome a double patenting rejection based upon 35 U.S.C. 101.
Claims 1 – 20 are rejected under 35 U.S.C. 101 as claiming the same invention as that of claims 1 – 8, 11 and 12 of prior U.S. Patent No. 12,197,261. This is a statutory double patenting rejection.
The differences are emphasized by the Examiner
Instant Application No. ‘761
Patent No. ‘261
1. An information processing system comprising: a removable memory device including first power supply terminals to which a first voltage is applicable, second power supply terminals to which a second voltage different from the first voltage is applicable, and power supply ground terminals connectable to a ground level, the first power supply terminals being electrically connected to each other, the power supply ground terminals being electrically connected to each other; and a connecting portion connectable to the removable memory device, and a power supply circuit configured to apply the first voltage and the second voltage to the removable memory device, the power supply circuit comprising a first wire connected to an output node of the first voltage against a power ground, a second wire connected to an output node of the second voltage against the power ground, a ground wire connected to a return node of the power ground, and a pair of first feedback wires connected to inputs of a first voltage divider, wherein when the removable memory device is connected to the connecting portion, one of the pair of first feedback wires is electrically connected to one of the first power supply terminals via the connecting portion, and the first wire is electrically connected to another terminal of the first power supply terminals via the connecting portion, when the removable memory device is connected to the connecting portion, the other of the pair of first feedback wires is electrically connected to one of the power supply ground terminals via the connecting portion, and the ground wire is electrically connected to another terminal of the power supply ground terminals via the connecting portion, when the removable memory device is connected to the connecting portion, the second wire is electrically connected to at least one of the second power supply terminals via the connecting portion, and when the removable memory device is connected to the connecting portion, the power supply circuit is configured to control the first voltage, based on a voltage between the pair of first feedback wires.
1. An information processing apparatus comprising: a connecting portion connectable to a removable memory device; and a power supply circuit configured to apply a first voltage and a second voltage different from the first voltage to the removable memory device, the removable memory device including first power supply terminals to which the first voltage is applicable, second power supply terminals to which the second voltage is applicable, and power supply ground terminals connectable to a ground level, the first power supply terminals being electrically connected to each other, the power supply ground terminals being electrically connected to each other, the power supply circuit comprising a first wire connected to an output node of the first voltage against a power ground, a second wire connected to an output node of the second voltage against the power ground, a ground wire connected to a return node of the power ground, and a pair of first feedback wires connected to inputs of a first voltage divider, wherein when the removable memory device is connected to the connecting portion, one of the pair of first feedback wires is electrically connected to one of the first power supply terminals via the connecting portion, and the first wire is electrically connected to another terminal of the first power supply terminals via the connecting portion, when the removable memory device is connected to the connecting portion, the other of the pair of first feedback wires is electrically connected to one of the power supply ground terminals via the connecting portion, and the ground wire is electrically connected to another terminal of the power supply ground terminals via the connecting portion, when the removable memory device is connected to the connecting portion, the second wire is electrically connected to at least one of the second power supply terminals via the connecting portion, and when the removable memory device is connected to the connecting portion, the power supply circuit is configured to control the first voltage, based on a voltage between the pair of first feedback wires.
2. The information processing system of claim 1, wherein the removable memory device including the second power supply terminals being electrically connected to each other, the power supply circuit comprises a pair of second feedback wires connected to inputs of a second voltage divider, when the removable memory device is connected to the connecting portion, one of the pair of second feedback wires is electrically connected to one of the second power supply terminals via the connecting portion, and the second wire is electrically connected to another terminal of the second power supply terminals via the connecting portion, the other of the pair of second feedback wires is electrically connected to the one of the power supply ground terminals via the connecting portion, and when the removable memory device is connected to the connecting portion, the power supply circuit is configured to control the second voltage, based on a voltage between the pair of second feedback wires.
2. The information processing apparatus of claim 1, wherein the removable memory device including the second power supply terminals being electrically connected to each other, the power supply circuit comprises a pair of second feedback wires connected to inputs of a second voltage divider, when the removable memory device is connected to the connecting portion, one of the pair of second feedback wires is electrically connected to one of the second power supply terminals via the connecting portion, and the second wire is electrically connected to another terminal of the second power supply terminals via the connecting portion, the other of the pair of second feedback wires is electrically connected to the one of the power supply ground terminals via the connecting portion, and when the removable memory device is connected to the connecting portion, the power supply circuit is configured to control the second voltage, based on a voltage between the pair of second feedback wires.
3. The information processing system of claim 1, wherein the power supply circuit comprises a pair of second feedback wires connected to inputs of a second voltage divider, when the removable memory device is connected to the connecting portion, the second wire is electrically connected to all the second power supply terminals via the connecting portion, and one of the pair of second feedback wires is electrically connected to all the second power supply terminals via the connecting portion, the other of the pair of second feedback wires is electrically connected to the one of the power supply ground terminals via the connecting portion, and when the removable memory device is connected to the connecting portion, the power supply circuit is configured to control the second voltage, based on a voltage between the pair of second feedback wires.
3. The information processing apparatus of claim 1, wherein the power supply circuit comprises a pair of second feedback wires connected to inputs of a second voltage divider, when the removable memory device is connected to the connecting portion, the second wire is electrically connected to all the second power supply terminals via the connecting portion, and one of the pair of second feedback wires is electrically connected to all the second power supply terminals via the connecting portion, the other of the pair of second feedback wires is electrically connected to the one of the power supply ground terminals via the connecting portion, and when the removable memory device is connected to the connecting portion, the power supply circuit is configured to control the second voltage, based on a voltage between the pair of second feedback wires.
4. The information processing system of claim 2, wherein the power supply circuit includes a first portion where the one and the other of the pair of first feedback wires extend in parallel, and a second portion where the one and the other of the pair of second feedback wires extend in parallel.
4. The information processing apparatus of claim 2, wherein the power supply circuit includes a first portion where the one and the other of the pair of first feedback wires extend in parallel, and a second portion where the one and the other of the pair of second feedback wires extend in parallel.
5. The information processing system of claim 3, wherein the power supply circuit includes a first portion where the one and the other of the pair of first feedback wires extend in parallel, and a second portion where the one and the other of the pair of second feedback wires extend in parallel.
4. The information processing apparatus of claim 2, wherein the power supply circuit includes a first portion where the one and the other of the pair of first feedback wires extend in parallel, and a second portion where the one and the other of the pair of second feedback wires extend in parallel.
6. The information processing system of claim 1, wherein the number of first power supply terminals is three, the number of second power supply terminals is three, and the number of power supply ground terminals is five.
5. The information processing apparatus of claim 1, wherein the number of first power supply terminals is three, the number of second power supply terminals is three, and the number of power supply ground terminals is five.
7. The information processing system of claim 1, wherein the second voltage is higher than the first voltage.
6. The information processing apparatus of claim 1, wherein the second voltage is higher than the first voltage.
8. The information processing system of claim 6, wherein the first voltage is 1.2 V, and the second voltage is 2.5 V.
7. The information processing apparatus of claim 6, wherein the first voltage is 1.2 V, and the second voltage is 2.5 V.
9. The information processing system of claim 1, wherein the power supply circuit includes a step-down switching regulator, the switching regulator comprises the pair of first feedback wires, the first voltage divider, a reference voltage generator which generates a reference voltage, a switching controller connected to output of the first voltage divider and the reference voltage generator, and a first switch circuit and a second switch circuit controlled by the switching controller, output of the first voltage divider is a feedback voltage based on the voltage between the pair of first feedback wires, and the switching controller is configured to control the first voltage by using the first switch circuit and the second switch circuit, based on the feedback voltage and the reference voltage.
8. The information processing apparatus of claim 1, wherein the power supply circuit includes a step-down switching regulator, the switching regulator comprises the pair of first feedback wires, the first voltage divider, a reference voltage generator which generates a reference voltage, a switching controller connected to output of the first voltage divider and the reference voltage generator, and a first switch circuit and a second switch circuit controlled by the switching controller, output of the first voltage divider is a feedback voltage based on the voltage between the pair of first feedback wires, and the switching controller is configured to control the first voltage by using the first switch circuit and the second switch circuit, based on the feedback voltage and the reference voltage.
10. An information processing system comprising: a removable memory device including first power supply terminals to which a first voltage is applicable, second power supply terminals to which a second voltage different from the first voltage is applicable, and power supply ground terminals connectable to a ground level, the first power supply terminals being electrically connected to each other, the second power supply terminals being electrically connected to each other, the power supply ground terminals being electrically connected to each other; and a connecting portion connectable to the removable memory device, and a power supply circuit configured to apply the first voltage and the second voltage the removable memory device, the power supply circuit comprising a first wire connected to an output node of the first voltage against a power ground, a second wire connected to an output node of the second voltage against the power ground, a ground wire connected to a return node of the power ground, and a pair of first feedback wires connected to inputs of a first voltage divider, wherein when the removable memory device is connected to the connecting portion, one of the pair of first feedback wires is electrically connected to one of the first power supply terminals via the connecting portion, and the first wire is electrically connected to another terminal of the first power supply terminals via the connecting portion, when the removable memory device is connected to the connecting portion, the ground wire is electrically connected to all the power supply ground terminals via the connecting portion, and the other of the pair of first feedback wires is electrically connected to all the power supply ground terminals via the connecting portion, when the removable memory device is connected to the connecting portion, the second wire is electrically connected to all the second power supply terminals via the connecting portion, and when the removable memory device is connected to the connecting portion, the power supply circuit is configured to control the first voltage, based on a voltage between the pair of first feedback wires.
11. An information processing apparatus comprising: a connecting portion connectable to a removable memory device; and a power supply circuit configured to apply a first voltage and a second voltage different from the first voltage to the removable memory device, the removable memory device including first power supply terminals to which the first voltage is applicable, second power supply terminals to which the second voltage is applicable, and power supply ground terminals connectable to a ground level, the first power supply terminals being electrically connected to each other, the second power supply terminals being electrically connected to each other, the power supply ground terminals being electrically connected to each other, the power supply circuit comprising a first wire connected to an output node of the first voltage against a power ground, a second wire connected to an output node of the second voltage against the power ground, a ground wire connected to a return node of the power ground, and a pair of first feedback wires connected to inputs of a first voltage divider, wherein when the removable memory device is connected to the connecting portion, one of the pair of first feedback wires is electrically connected to one of the first power supply terminals via the connecting portion, and the first wire is electrically connected to another terminal of the first power supply terminals via the connecting portion, when the removable memory device is connected to the connecting portion, the ground wire is electrically connected to all the power supply ground terminals via the connecting portion, and the other of the pair of first feedback wires is electrically connected to all the power supply ground terminals via the connecting portion, when the removable memory device is connected to the connecting portion, the second wire is electrically connected to all the second power supply terminals via the connecting portion, and when the removable memory device is connected to the connecting portion, the power supply circuit is configured to control the first voltage, based on a voltage between the pair of first feedback wires.
11. The information processing system of claim 10, wherein the power supply circuit comprises a pair of second feedback wires connected to inputs of a second voltage divider, when the removable memory device is connected to the connecting portion, one of the pair of second feedback wires is electrically connected to all the second power supply terminals via the connecting portion, the other of the pair of second feedback wires is electrically connected to all the power supply ground terminals via the connecting portion, and when the removable memory device is connected to the connecting portion, the power supply circuit is configured to control the second voltage, based on a voltage between the pair of second feedback wires.
12. The information processing apparatus of claim 11, wherein the power supply circuit comprises a pair of second feedback wires connected to inputs of a second voltage divider, when the removable memory device is connected to the connecting portion, one of the pair of second feedback wires is electrically connected to all the second power supply terminals via the connecting portion, the other of the pair of second feedback wires is electrically connected to all the power supply ground terminals via the connecting portion, and when the removable memory device is connected to the connecting portion, the power supply circuit is configured to control the second voltage, based on a voltage between the pair of second feedback wires.
12. The information processing system of claim 11, wherein the power supply circuit includes a first portion where the one and the other of the pair of first feedback wires extend in parallel, and a second portion where the one and the other of the pair of second feedback wires extend in parallel.
4. The information processing apparatus of claim 2, wherein the power supply circuit includes a first portion where the one and the other of the pair of first feedback wires extend in parallel, and a second portion where the one and the other of the pair of second feedback wires extend in parallel.
13. The information processing system of claim 10, wherein the number of first power supply terminals is three, the number of second power supply terminals is three, and the number of power supply ground terminals is five.
5. The information processing apparatus of claim 1, wherein the number of first power supply terminals is three, the number of second power supply terminals is three, and the number of power supply ground terminals is five.
14. The information processing system of claim 10, wherein the second voltage is higher than the first voltage.
6. The information processing apparatus of claim 1, wherein the second voltage is higher than the first voltage.
15. The information processing system of claim 14, wherein the first voltage is 1.2 V, and the second voltage is 2.5 V.
7. The information processing apparatus of claim 6, wherein the first voltage is 1.2 V, and the second voltage is 2.5 V.
16. The information processing system of claim 10, wherein the power supply circuit includes a step-down switching regulator, the switching regulator comprises the pair of first feedback wires, the first voltage divider, a reference voltage generator which generates a reference voltage, a switching controller connected to output of the first voltage divider and the reference voltage generator, and a first switch circuit and a second switch circuit controlled by the switching controller, output of the first voltage divider is a feedback voltage based on the voltage between the pair of first feedback wires, and the switching controller is configured to control the first voltage by using the first switch circuit and the second switch circuit, based on the feedback voltage and the reference voltage.
8. The information processing apparatus of claim 1, wherein the power supply circuit includes a step-down switching regulator, the switching regulator comprises the pair of first feedback wires, the first voltage divider, a reference voltage generator which generates a reference voltage, a switching controller connected to output of the first voltage divider and the reference voltage generator, and a first switch circuit and a second switch circuit controlled by the switching controller, output of the first voltage divider is a feedback voltage based on the voltage between the pair of first feedback wires, and the switching controller is configured to control the first voltage by using the first switch circuit and the second switch circuit, based on the feedback voltage and the reference voltage.
Appropriate action is required.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Dadashev; Oleg et al. ( US Patent No. 6,456,557) “Voltage Regulator For Memory Device” is cited to teach a memory device that includes a voltage regulator that compensates for resistance variations in the bit line control (multiplexing) circuit used to access the memory cells by including in its feedback path an emulated multiplexing circuit having an identical resistance to that of the multiplexing circuit. The voltage regulator also includes a differential amplifier, a pull‐up transistor for generating a reference voltage, and a first clamp transistor controlled by the reference voltage to pass a desired voltage level to the multiplexing circuit. The feedback path incorporates the emulator circuit between a second clamp transistor and a voltage divider. Because the emulation and multiplexing circuits have the same resistance, the voltage passed to the voltage divider is essentially identical to the voltage passed by the multiplexing circuit to a selected memory cell, thereby allowing the voltage regulator to produce an optimal voltage level at the selected memory cell.
Toyoshima, Hiroshi et al. (Us Patent Application Publication No. 2003/0235058 A1) “Semiconductor Integrated Circuit Device” is cited to teach a circuit that includes a power supply circuit that is formed with a phase compensating resistor and a phase compensating capacitor, between a second input terminal of a differential amplifier and a low supply voltage. Thereby, the first pole frequency in the overall gain is determined by the first pole frequency in the voltage‐dividing resistor stage in the Bode diagram for the pole/zero compensation, which is shifted to a lower frequency. Also, the zero point cancels the first pole frequency in the differential amplifier stage, which reduces the phase delay to secure the phase margin. And, since the phase compensating resistor can take a considerably high resistance, the same characteristic can be achieved with a low capacitance of the phase compensating capacitor; thereby, the phase compensation becomes possible with a resistor and a capacitor having a smaller size than the pole/zero compensation with the internal supply voltage.
Pan; Dong. (US Patent Application Publication No. 2011/0235455 A1) “Voltage Regulators, Amplifiers, Memory Devices and Methods” is cited to teach circuits, devices and methods, such as an amplifier (e.g., a voltage regulator) that includes a feedback circuit that supplies negative feedback through a feedback path. One such feedback path includes a capacitance coupled in series with a "one‐way" isolation circuit through which a feedback signal is coupled. The "one‐way" isolation circuit may allow the feedback signal to be coupled from a "downstream" node, such as an output node, to an "upstream" node, such as a node at which an error signal is generated to provide negative feedback. However, the "one‐way" isolation circuit may substantially prevent variations in the voltage at the upstream node from being coupled to the capacitance in the isolation circuit. As a result, the voltage at the upstream node may quickly change since charging and discharging of the capacitance responsive to voltage variations at the upstream node may be avoided.
Duong; Hoang Quoc et al. (US Patent Application Publication No. 2017/0126118 A1) “Regulator Circuit“ is cited to teach a regulator circuit that includes an operational amplifier, a buffer, a power transistor, a first feedback circuit, a current sensor, and second feedback circuit. The operational amplifier drives a first node with a first voltage generated by amplifying a difference between an input voltage and a feedback voltage. The buffer drives a second node with a second voltage generated by buffering the first voltage. The power transistor has a drain receiving a supply voltage, a gate connected to the second node, and a source connected to a third node. The current sensor generates a first sensing current based on the second voltage. The second feedback circuit generates a plurality of feedback currents corresponding to a ripple of the output voltage and enhances a speed at which the ripple is reduced by providing at least one of the plurality of feedback currents to the third node.
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/TERRELL S JOHNSON/Primary Examiner, Art Unit 2176
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