DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Election/Restrictions
Applicant’s election without traverse of Species F, drawn to Fig. 19, in the reply filed on 11/12/2025 is acknowledged.
Although Applicant alleges that elected Species F is “encompassed by claims 1-2 and 4-20”, it is noted by the Examiner that the features of claims 10 and 18-19 do not appear supported by the embodiment shown in Fig. 19, to which embodiment elected Species F is drawn.
Claims 3, 10, and 18-19 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to nonelected species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 11/12/2025.
Drawings
The drawings are objected to because:
Dashed lines are indistinct, rather than “sufficiently dense and dark, and uniformly thick and well-defined. … heavy enough to permit adequate reproduction” as required by 37 CFR 1.84(l). See Fig. 19, for example.
In Fig. 19, it is unclear to what structure GE points because it appears to point to the same structure as ACT. See also Figs. 6 and 17, for example.
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(4) because reference characters "CST1" and "GE" appear to have both been used to designate the same part in Fig. 19. See also Figs. 6 and 17, for example.
Views are not “grouped together and arranged on the sheet(s) without wasting space” as required by 37 CFR 1.84(h). The Examiner suggests enlarging and/or rotating drawings to use more of the available space.
Fewer than all numbers, letters, and reference characters measure at least 1/8 inch in height as required by 37 CFR 1.84(p)(3). See Fig. 4, for example.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Specification
Applicant is reminded of the proper content of an abstract of the disclosure.
A patent abstract is a concise statement of the technical disclosure of the patent and should include that which is new in the art to which the invention pertains. The abstract should not refer to purported merits or speculative applications of the invention and should not compare the invention with the prior art.
If the patent is of a basic nature, the entire technical disclosure may be new in the art, and the abstract should be directed to the entire disclosure. If the patent is in the nature of an improvement in an old apparatus, process, product, or composition, the abstract should include the technical disclosure of the improvement. The abstract should also mention by way of example any preferred modifications or alternatives.
Where applicable, the abstract should include the following: (1) if a machine or apparatus, its organization and operation; (2) if an article, its method of making; (3) if a chemical compound, its identity and use; (4) if a mixture, its ingredients; (5) if a process, the steps.
Extensive mechanical and design details of an apparatus should not be included in the abstract. The abstract should be in narrative form and generally limited to a single paragraph within the range of 50 to 150 words in length.
See MPEP § 608.01(b) for guidelines for the preparation of patent abstracts.
The abstract of the disclosure is objected to because it does not include that which is new in the art. A corrected abstract of the disclosure is required and must be presented on a separate sheet, apart from any other text. See MPEP § 608.01(b).
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-2, 4-9, and 11-12 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Independent claim 1 recites “the plurality of subpixel circuits comprising a driving transistor; … a gate electrode of the driving transistor overlaps”. It is unclear whether each subpixel comprises a driving transistor, or whether the plurality of subpixels collectively comprises a driving transistor. If each subpixel comprises its own driving transistor, then it is unclear which one of plural driving transistors is meant by the limitation “the driving transistor”.
Other rejected claims are indefinite by virtue of dependency from at least one indefinite claim.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-2, 6, 9, 13, and 16 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chen (US Pat. No. 11373599 B1).
As recited in independent claim 1, Chen shows a display device comprising: a plurality of subpixels (see array of subpixels in Fig. 1, for example); a plurality of subpixel circuits (insofar as each subpixel comprises a circuit) in the plurality of subpixels (see array of subpixels in Fig. 1, for example), the plurality of subpixel circuits (insofar as each subpixel comprises a circuit) comprising a driving transistor T1; and a plurality of constant voltage lines (see PVDD and 30 in Fig. 16, for example) connected to the plurality of subpixel circuits (see plural subpixel circuits in Fig. 16, for example), wherein a gate electrode g of the driving transistor T1 overlaps (see overlapping appearance of PVDD and g in Fig. 16, for example) at least one PVDD of the plurality of constant voltage lines (PVDD and 30).
As recited in claim 2, Chen shows that the plurality of constant voltage lines (PVDD and 30) comprise a first constant voltage line PVDD to which a first constant voltage (PVDD is a power signal line, to which a power signal is necessarily applied) is applied, and the gate electrode g of the driving transistor overlaps (see overlapping appearance of g and PVDD in Fig. 16) the first constant voltage line PVDD.
As recited in claim 6, Chen shows a substrate 01; a gate insulation layer GI between an active layer b of the driving transistor T1 and the gate electrode M1 of the driving transistor T1; and an interlayer insulation layer ILD between the gate electrode M1 of the driving transistor T1 and a source electrode and a drain electrode (see source/drain metal layer M2 in Fig. 5, for example) of the driving transistor T1, wherein at least one PVDD of the plurality of constant voltage lines (PVDD and 30, for example) is on (insofar as PVDD and is disposed at the source/drain metal layer M2) the interlayer insulation layer ILD and overlaps (see overlapping appearance of g and PVDD in Fig. 16, for example) the gate electrode g of the driving transistor T1.
As recited in claim 9, Chen shows that the gate electrode g of the driving transistor T1 comprises: a first portion (a central portion, for example) overlapping the active layer (see appearance of T1 in Fig. 16) of the driving transistor T1; and a second portion (a right portion, for example) extending (rightwardly) from the first portion (central portion) and overlapping (see overlapping appearance of PVDD and right portion of g in Fig. 16, for example) at least one PVDD of the plurality of constant voltage lines (see PVDD and 30 in Fig. 16, for example).
As recited in claim 13, Chen shows a display device comprising: a substrate 01 on which a plurality of subpixels (see array of subpixels in Fig. 1, for example) are defined; a driving transistor T1 in each of the plurality of subpixels (see array of subpixels in Fig. 1, for example) on the substrate 01; a first constant voltage line PVDD connected to the plurality of subpixels (see array of subpixels in Fig. 1, for example) and to which a first constant voltage (insofar as a power signal is applied to PVDD) is applied; and a second constant voltage line 30 connected to the plurality of subpixels (see array of subpixels in Fig. 1, for example) and to which a second constant voltage (insofar as a reset voltage is applied to 30) is applied, wherein a gate electrode g of the driving transistor T1 overlaps (see overlapping appearance of g and PVDD in Fig. 16) at least one PVDD of the first constant voltage line PVDD and the second constant voltage line 30.
As recited in claim 16, Chen shows that the first constant voltage (power signal) is one of a reference voltage (it is noted by the Examiner that these two voltages are recited in the alternative, such that a prior art teaching of the latter voltage anticipates the claim, even in the absence of the former voltage) or a high-potential voltage (power signal), and the second constant voltage (reset voltage) is the other of the reference voltage (reset voltage) and the high-potential voltage (it is noted by the Examiner that these two voltages are recited in the alternative, such that a prior art teaching of the former voltage anticipates the claim, even in the absence of the latter voltage).
Claim(s) 20 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Yeo et al (US 20240324294 A1).
As recited in independent claim 20, Yeo et al show a display device (“DISPLAY APPARATUS”, see Title) comprising: a plurality of subpixels PX; a plurality of subpixel circuits PC disposed in the plurality of subpixels (insofar as each subpixel comprises one subpixel circuit PC) respectively, wherein each of plurality of subpixel circuits PC comprises: a driving transistor T1; a storage capacitor Cst connected to the driving transistor T1; and at least one auxiliary capacitor Chd disposed between the storage capacitor Cst and a reference voltage line (see Vref in Fig. 5B) or a high-potential voltage line (see ELVDD in Fig. 5A).
Claim Rejections - 35 USC § 103
Claim(s) 8 and 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chen (US Pat. No. 11373599 B1).
Chen shows a display device as described above.
As recited in claims 8 and 15, Chen is silent regarding whether the substrate comprises glass.
Official notice is taken of the fact that glass substrates were known in the art prior to the effective filing date.
Moreover, the Examiner finds that a glass substrate was predictable before the effective filing date.
It would have been obvious to one of ordinary skill in the art prior to the effective filing date to use a glass substrate as the array substrate of Chen. The rationale is as follows: one of ordinary skill in the art would have had reason to try any known substrate material, including glass, in the absence of criticality, as was known in the art.
Allowable Subject Matter
Claims 4-5, 7, and 11-12 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
Claims 14 and 17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 4 and its dependent claim 5: The closest art of record is Chen (US Pat. No. 11373599 B1), which shows gate electrode g overlapping first constant voltage line PVDD, but does not show gate electrode g overlapping second constant voltage line 30.
Regarding claim 7: The closest art of record is Chen (US Pat. No. 11373599 B1), which is silent regarding an inorganic layer between two plastic substrates.
Regarding claim 11: The closest art of record is Chen (US Pat. No. 11373599 B1), which shows (see Fig. 2, for example) first transistor T2 providing a data voltage Vdata to a first node N2 in response to a first scan signal S2, a second transistor T3 providing a voltage of a second node N1 to a third node N3 in response to said first scan signal S2, a fourth transistor T5 providing a reference voltage Vref to a fourth node N4 in response to a second scan signal S1, and a fifth transistor T4 providing the reference voltage Vref to the second node N1 in response to a third scan signal S1, Chen is silent regarding a second transistor configured to provide a voltage of a second node to a third node in response to the second scan signal, in combination with a fourth transistor configured to provide the reference voltage to the fourth node in response to the (same) second scan signal, and a fifth transistor configured to provide the reference voltage to the first node in response to the light emission signal.
Regarding claim 12: The closest art of record is Chen (US Pat. No. 11373599 B1). Although Chen shows storage capacitor Cst, Chen neither shows nor suggests that the gate electrode of the driving transistor and the at least one of the plurality of constant voltage lines forms an auxiliary capacitor, in combination with a storage capacitor.
Regarding claim 14: The closest art of record is Chen (US Pat. No. 11373599 B1), which neither shows nor suggests an inorganic layer between first and second organic layers of a substrate.
Regarding claim 17: The closest art of record is Chen (US Pat. No. 11373599 B1). Although Chen shows gate electrode g overlapping second voltage line PVDD, Chen neither shows nor suggests gate electrode g overlapping second constant voltage line 30 in combination with g overlapping second voltage line PVDD.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Julie Anne Watko whose telephone number is (571)272-7597. The examiner can normally be reached Monday-Tuesday 9AM-5PM, Wednesday 10:30AM-5PM, Thursday-Friday 9AM-5PM, and occasional Saturdays.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ke Xiao can be reached at 571-272-7776. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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JULIE ANNE WATKO
Primary Examiner
Art Unit 2627
/Julie Anne Watko/Primary Examiner, Art Unit 2627
01/03/2026