DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 7-8 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
A broad range or limitation together with a narrow range or limitation that falls within the broad range or limitation (in the same claim) may be considered indefinite if the resulting claim does not clearly set forth the metes and bounds of the patent protection desired. See MPEP § 2173.05(c). In the present instance, claim 7 recites the broad recitation “1 nm or more”, and the claim also recites “20 nm or less” which is the narrower statement of the range/limitation. The claim(s) are considered indefinite because there is a question or doubt as to whether the feature introduced by such narrower language is (a) merely exemplary of the remainder of the claim, and therefore not required, or (b) a required feature of the claims. The Examiner has interpreted the limitation as “between 1 nm and 20 nm”.
A broad range or limitation together with a narrow range or limitation that falls within the broad range or limitation (in the same claim) may be considered indefinite if the resulting claim does not clearly set forth the metes and bounds of the patent protection desired. See MPEP § 2173.05(c). In the present instance, claim 8 recites the broad recitation “50 nm or more”, and the claim also recites “200 nm or less” which is the narrower statement of the range/limitation. The claim(s) are considered indefinite because there is a question or doubt as to whether the feature introduced by such narrower language is (a) merely exemplary of the remainder of the claim, and therefore not required, or (b) a required feature of the claims. The Examiner has interpreted the limitation as “between 50 nm and 200 nm”.
A broad range or limitation together with a narrow range or limitation that falls within the broad range or limitation (in the same claim) may be considered indefinite if the resulting claim does not clearly set forth the metes and bounds of the patent protection desired. See MPEP § 2173.05(c). In the present instance, claim 8 recites the broad recitation “50 nm or more”, and the claim also recites “300 nm or less” which is the narrower statement of the range/limitation. The claim(s) are considered indefinite because there is a question or doubt as to whether the feature introduced by such narrower language is (a) merely exemplary of the remainder of the claim, and therefore not required, or (b) a required feature of the claims. The Examiner has interpreted the limitation as “between 50 nm and 300 nm”.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-6 are rejected under 35 U.S.C. 103 as being unpatentable over Nam (U.S. 2020/0091303) in view of Park (U.S. 2016/0041274).
Regarding claim 1:
Nam discloses a semiconductor device comprising:
a semiconductor layer ([0014], semiconductor material) arranged above an insulating surface ([0014], isolation layer);
a first gate electrode ([0018], gate electrode) arranged above the semiconductor layer and facing the semiconductor layer ([0018], gate electrode position on active region of the substrate);
a first insulating layer ([0018]-[0019], lower gate insulating layer) arranged between the semiconductor layer ([0018]-[0019], lower gate insulating layer positioning) and the first gate electrode and containing a silicon oxide covering a pattern end of the semiconductor layer ([0019], silicon dioxide);
a second insulating layer ([0018]-[0019], upper gate insulating layer) arranged above the first insulating layer between the semiconductor layer and the first gate electrode ([0018]-[0019], upper gate insulating layer positioning), the second insulating layer having a common planar shape with the first gate electrode (Fig. 18, 112 insulator); and
a third insulating layer ([0024], insulating pattern) arranged above the second insulating layer between the semiconductor layer and the first gate electrode (Fig. 2, 148 insulating pattern positioning), the third insulating layer having a common planar shape with the first gate electrode (Fig. 2, 148 similar to 124) and containing a silicon nitride ([0024], silicon nitride).
However, Nam fails to disclose the second insulating layer containing a first metal oxide.
Park teaches the second insulating layer containing a first metal oxide ([0054], aluminum oxide).
It would have been obvious to one of an ordinary skill in the art before the effective filing date to substitute the insulating layer material of Nam with the aluminum oxide taught by Park in order to improve image resolution by increasing the dielectric constant of insulating layer (Park; [0050] and [0054]). KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415-421, 82 USPQ2d 1385, 1395-97 (2007).
Regarding claim 2:
The combination of Nam and Park discloses the semiconductor device according to claim 1, further comprising:
a second gate electrode (Nam; Fig. 1, multiple active regions 104; [0018], each active region has gate electrode) arranged between the insulating surface and the semiconductor layer (Nam; Fig. 3, insulating surface 106 and substrate 102); and
a fourth insulating layer (Nam; Fig. 3, 114) arranged between the second gate electrode and the semiconductor layer (Nam; Fig. 3 and [0018]-[0019], lower gate insulating layer positioning).
Regarding claim 3:
The combination of Nam and Park discloses the semiconductor device according to claim 1, wherein the semiconductor layer includes an oxide semiconductor (Nam; [0058], oxidation of substrate that contains silicon).
Regarding claim 4:
The combination of Nam and Park discloses the semiconductor device according to claim 1, wherein the semiconductor layer includes an oxide semiconductor having a poly-crystalline structure (Nam; [0058], silicon oxide containing crystal orientation).
Regarding claim 5:
The combination of Nam and Park discloses the semiconductor device according to claim 1, further comprising:
a second gate electrode (Nam; Fig. 1, multiple active regions 104; [0018], each active region has gate electrode) arranged between the insulating surface and the semiconductor layer (Nam; Fig. 3, insulating surface 106 and substrate 102);
a fourth insulating layer (Nam; [0024], insulating pattern) arranged between the second gate electrode and the semiconductor layer (Nam; Fig. 2, 148 insulating pattern positioning) and containing a silicon nitride (Nam; [0024], silicon nitride).;
a fifth insulating layer (Nam; [0018]-[0019], lower gate insulating layer) arranged between the fourth insulating layer and the semiconductor layer (Nam; [0018]-[0019], lower gate insulating layer) and containing a silicon oxide (Nam; [0019], silicon dioxide);
a sixth insulating layer (Nam; [0018]-[0019], upper gate insulating layer) arranged between the fifth insulating layer and the semiconductor layer (Nam; [0018]-[0019], upper gate insulating layer) and containing a second metal oxide (Park; [0054], aluminum oxide).; and
the semiconductor layer includes an oxide semiconductor having a poly-crystalline structure (Nam; [0058], oxidation of substrate that contains silicon).
It would have been obvious to one of an ordinary skill in the art before the effective filing date to substitute the insulating layer material of Nam with the aluminum oxide taught by Park in order to improve image resolution by increasing the dielectric constant of insulating layer (Park; [0050] and [0054]). KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415-421, 82 USPQ2d 1385, 1395-97 (2007).
Regarding claim 6:
The combination of Nam and Park discloses the semiconductor device according to claim 5, wherein the first metal oxide and the second metal oxide contain aluminum as a main component (Park; [0054], aluminum oxide).
It would have been obvious to one of an ordinary skill in the art before the effective filing date to substitute the insulating layer material of Nam with the aluminum oxide taught by Park in order to improve image resolution by increasing the dielectric constant of insulating layer (Park; [0050] and [0054]). KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415-421, 82 USPQ2d 1385, 1395-97 (2007).
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Nam (U.S. 2020/0091303) in view of Park (U.S. 2016/0041274) as applied to claim 1 above, and further in view of Jung (U.S. 2019/0072677).
Regarding claim 10:
The combination of Nam and Park discloses a radiation detector comprising:
the semiconductor device according to claim 1 (rejected above);
a photoelectric conversion layer (Park; [0049], photoconductive layer)connected to the semiconductor device (Park; [0049], photoconductive layer).
However, the combination of Nam and Park fail to disclose a wavelength conversion layer facing the photoelectric conversion layer and configured to emit visible light based on an irradiated radiation.
Jung teaches a wavelength conversion layer ([0074], scintillator) facing the photoelectric conversion layer (Fig. 5, 130) and configured to emit visible light based on an irradiated radiation ([0072], scintillator conversion).
It would have been obvious to one of an ordinary skill in the art before the effective filing date to combine the detector of Nam and Park with the wavelength conversion layer of Jung. One would have been motivated to make such combination in order to improve image quality by reducing the effects of heat. Therefore, it would have been obvious to combine the detector of Nam and Park with the wavelength conversion layer of Jung to yield predictable results. KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415-421, 82 USPQ2d 1385, 1395-97 (2007).
Allowable Subject Matter
Claim 9 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 7-8 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
The closest prior arts are Nam (U.S. 2020/0091303) and Park (U.S. 2016/0041274).
Regarding claim 7, as best understood:
The combination of Nam and Park discloses the semiconductor device according to claim 6.
However, the combination of Nam and Park fail to disclose wherein a thickness of the second insulating layer is between 1 nm and 20 nm.
Since the prior art of record fails to teach the details above, nor is there any reason to modify or combine prior art elements absent of applicant’s disclosure, the claim is deemed patentable over the prior art of record, if rewritten to overcome the 112(b) rejection above and if rewritten in independent form to include all of the limitations of the base claim and any intervening claim.
Regarding claim 8, as best understood:
The combination of Nam and Park discloses the semiconductor device according to claim 5.
However, the combination of Nam and Park fail to disclose wherein a thickness of the first insulating layer is between 50 nm and 200 nm, and a thickness of the third insulating layer is between 50 nm and 300 nm.
Since the prior art of record fails to teach the details above, nor is there any reason to modify or combine prior art elements absent of applicant’s disclosure, the claim is deemed patentable over the prior art of record, if rewritten to overcome the 112(b) rejection above and if rewritten in independent form to include all of the limitations of the base claim and any intervening claim.
Regarding claim 9:
The combination of Nam and Park discloses the semiconductor device according to claim 5.
However, the combination of Nam and Park fail to disclose a seventh insulating layer arranged above the first gate electrode, covering a pattern end of the first gate electrode, and containing a silicon nitride; and an eighth insulating layer arranged above the seventh insulating layer and containing a silicon oxide.
Since the prior art of record fails to teach the details above, nor is there any reason to modify or combine prior art elements absent of applicant’s disclosure, the claim is deemed patentable over the prior art of record, if rewritten in independent form to include all of the limitations of the base claim and any intervening claim.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SOORENA KEFAYATI whose telephone number is (469)295-9078. The examiner can normally be reached M to F, 7:30 am to 4:30 pm.
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/S.K./Examiner, Art Unit 2884
/DAVID J MAKIYA/Supervisory Patent Examiner, Art Unit 2884
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