Prosecution Insights
Last updated: October 02, 2026
Application No. 18/969,582

COMMUNICATION VIA SERIALIZER/DESERIALIZER

Final Rejection §103
Filed
Dec 05, 2024
Priority
Dec 20, 2023 — FR FR2314545
Examiner
HASSAN, AURANGZEB
Art Unit
2184
Tech Center
2100 — Computer Architecture & Software
Assignee
STMicroelectronics N.V.
OA Round
2 (Final)
80%
Grant Probability
Favorable
3-4
OA Rounds
1y 0m
Est. Remaining
97%
With Interview

Examiner Intelligence

Grants 80% — above average
80%
Career Allowance Rate
621 granted / 773 resolved
+25.3% vs TC avg
Strong +17% interview lift
Without
With
+17.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 10m
Avg Prosecution
24 currently pending
Career history
802
Total Applications
across all art units

Statute-Specific Performance

§101
2.6%
-37.4% vs TC avg
§103
57.0%
+17.0% vs TC avg
§102
26.7%
-13.3% vs TC avg
§112
5.3%
-34.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 773 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status 1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 2. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 3. Claims 1 – 20 are rejected under 35 U.S.C. 103 as being unpatentable over Kumar et al. (US Publication Number 2016/0335196, hereinafter “Kumar”) in view of Yamada et al. (US Publication Number 2021/0400123, hereinafter “Yamada). 4. As per claims 1, 10, and 13, Kumar teaches an electronic device, system and method adapted to implementing a communication comprising a first memory (OTP 140, figure 1) adapted to storing first software adapted to initializing the communication (first software consists of firmware installed by the manufacturer for initialization of the device, paragraph 11), the first software is different from the second software adapted to implementing the communication (the second software is that store in the static memory 150 comprised of commands used for communication, paragraph 13). Kumar does not appear to explicitly disclose the structure of the preamble where communication is by means of a serializer/deserializer, wherein the serializer/deserializer comprises memory adapted to storing software, wherein the serializer/deserializer is adapted to initialize communication with the first software and to implement the communication with a second software. However, Yamada discloses wherein communication is by means of a serializer/deserializer (7 and 13 of figure 1, paragraph 183), wherein the serializer/deserializer comprises memory adapted to storing software (memory 11a, figure 2 with connection to 17 and 18, paragraph 202), wherein the serializer/deserializer is adapted to initialize communication with the first software and to implement the communication with a second software (node handling for 1 and 2, figure 17, paragraphs 267 – 269). Kumar and Yamada are analogous art because they are from the same field of endeavor of data handling. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Kumar and Yamada before him or her, to modify the communication mechanism of Kumar to include the configuration of Yamada because it would enhance robustness of memory functionality. One of ordinary skill would be motivated to make such modification in order to enhance integration functionality (paragraphs 3 – 6). Therefore, it would have been obvious to combine Yamada with Kumar to obtain the invention as specified in the instant claims. 5. Kumar modified by the teachings of Yamada as seen in claim 1 above, as per claims 2 and 14, Kumar teaches a device and method, wherein the first memory is a programmable read-only memory (OTP memory, figure 1, paragraph 10). 6. Kumar modified by the teachings of Yamada as seen in claim 1 above, as per claims 3 and 15, Kumar teaches a device and method, wherein the first software is an abbreviated version of the second software (the first software contains linking information for the second more robust software, paragraphs 11 and 12). 7. Kumar modified by the teachings of Yamada as seen in claim 1 above, as per claims 4 and 16, Kumar teaches a device and method, wherein, once the first software has been used, the electronic device is adapted to receiving the second software (software in OTP is used for initialization and software in static memory is used for functionality for commands, paragraphs 12 and 13). 8. Kumar modified by the teachings of Yamada as seen in claim 1 above, as per claims 5 and 17, Kumar teaches a device and method, wherein the second software is sent by a first control circuit external to the electronic device (static memory seen to receive external commands via 110, figure 1, paragraph 21). 9. Kumar modified by the teachings of Yamada as seen in claim 1 above, as per claims 6 and 18, Kumar teaches a device and method, wherein the second software is stored in a second memory of the electronic device (static memory 150, figure 1 and 606, figure 6). 10. Kumar modified by the teachings of Yamada as seen in claim 1 above, as per claim 7, Yamada teaches a device, wherein the second memory is a static random-access memory (SRAM 17a, figure 2) of a serializer/deserializer module of the electronic device. 11. Kumar modified by the teachings of Yamada as seen in claim 1 above, as per claim 8, Kumar teaches a device, wherein the first software is adapted to initializing the communication having a first data rate lower than a second data rate of the communication when it is implemented by the second software (OTP and first software speed is lower than that of SRAM and second software, paragraphs 11 – 13, figure 1). 12. Kumar modified by the teachings of Yamada as seen in claim 1 above, as per claim 8, Kumar teaches a device, wherein the first software is adapted to initializing the communication having first functionalities different from second functionalities of the communication when it is implemented by the second software (first and second software have different functionality where SRAM is utilized to avoid filling OTP from manufacturer to enhance streamlining, paragraphs 11 – 13). 13. Kumar modified by the teachings of Yamada as seen in claim 1 above, as per claims 11 and 19, Kumar teaches a device and method, wherein the first software and the second software are microcodes adapted to directly send commands to one or more electronic circuits and components responsible for implementing a communication by serializer/deserializer (sent to 130 virtual OTP memory manager component, figure 1). 14. Kumar modified by the teachings of Yamada as seen in claim 1 above, as per claims 12 and 20, Yamada teaches a device and method, wherein initialization of the communication corresponds to triggering of one or more electronic circuits and components responsible for implementing a communication by serializer/deserializer (paragraph 353 initialization). Response to Arguments 15. Applicant’s arguments with respect to claim 1 – 20 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion 16. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Tai/Belknap have teachings of boot initialization of software. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to AURANGZEB HASSAN whose telephone number is (571)272-8625. The examiner can normally be reached 7 AM to 3 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Henry Tsai can be reached at 571-272-4176. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. AH /HENRY TSAI/Supervisory Patent Examiner, Art Unit 2184
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Prosecution Timeline

Dec 05, 2024
Application Filed
Feb 25, 2026
Non-Final Rejection mailed — §103
May 22, 2026
Response Filed
Aug 18, 2026
Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
80%
Grant Probability
97%
With Interview (+17.0%)
2y 10m (~1y 0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 773 resolved cases by this examiner. Grant probability derived from career allowance rate.

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