Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Claims 1-20 are pending.
NOTE:
It is noted that any citations to specific, pages, columns, lines, or figures in the prior art reference and any interpretations of the reference should not be considered to be limiting in any way. A reference is relevant for all it contains and may be relied upon for all that it would have reasonably suggested to one having ordinary skill in the art. See MPEP 2123.
Information Disclosure Statement
The references cited in the information disclosure statement (IDS) submitted on December 05, 2024 have been considered by the examiner.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. The title is meant to have an “informative value in indexing, classifying, searching”. See MPEP606.01.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over Campbell et. al. U.S. Patent Pub No. 20220050792 (hereinafter Campbell) in view of Tsirkin et. al. US Patent No. 2024/0354261 (hereinafter Tsirkin).
Regarding Claim 1, Campbell teaches a memory device comprising: a memory processing unit configured to receive a memory access request including a first physical memory address based on a first page size(Fig.1,4;Para23-25 "lookup will iterate through possible page sizes, checking the TLB for the translation assuming each page size until either the translation is found (a TLB hit) or checks have been performed for all possible page sizes supported by the memory architecture without finding the translation (a TLB Miss") Para29-31, 57-60 "Cache 410 includes a page directory entry cache (PDEC) 412 and a translation lookaside buffer (TLB) 414."),
translate the first physical address based on the first page size into a second physical address based on a second page size that is smaller than the first page size, and access memory cells of the memory device using the second physical address (Fig.1, 2; Para23-25, 29-31 "In one example, the set of possible page sizes has entries including 1 Gigabyte (GB), 2 Megabytes (MB), 64 kilobytes (kB) or 4 kB (one of which is "correct," meaning the real address is stored in a page of one of these sizes)." 2MG page corresponds to first page size, which is bigger than 4kB page).
However, Campbell fails to teach but Tsirkin teaches request from a host(Fig.1,2; Para16-17, 42-45"At block 210, the processing device receives, by an operating system running on a host computer system, a request to map a physical address (e.g., a guest physical address of guest memory) associated with a peripheral device (e.g., a mapping request).").
Campbell and Tsirkin are analogous art because they are from the same field of endeavor. They both relate to data management in a storage system.
Therefore, before the effective filling date of claimed invention was made, it would have been obvious to a person of ordinary skill in the art to modify the above method, as taught by Campbell, and incorporating the host, as taught by Tsirkin.
One of ordinary skill in the art would have been motivated to do this modification in order to utilize more efficient approach of data management, as suggested by Tsirkin (Para2-3).
Regarding claim 2, the combination of Campbell and Tsirkin teaches all the limitations of the base claims as outlined above.
Further, Campbell teaches wherein the first page size is a huge page size, and the second page size is a normal page size that is smaller than the huge page size(Fig.1, 2; Para23-25, 29-31 "In one example, the set of possible page sizes has entries including 1 Gigabyte (GB), 2 Megabytes (MB), 64 kilobytes (kB) or 4 kB (one of which is "correct," meaning the real address is stored in a page of one of these sizes).").
Regarding claim 3, the combination of Campbell and Tsirkin teaches all the limitations of the base claims as outlined above.
Further, Campbell teaches wherein the first physical address comprises a physical frame number (PFN) based on the first page size, and a first page offset based on the first page size (Fig.1,2,4; Para20-21 "The actual physical address is selected from the page based on an offset (also included in the virtual address).").
Regarding claim 4, the combination of Campbell and Tsirkin teaches all the limitations of the base claims as outlined above.
Further, Campbell teaches wherein the memory processing unit is further configured to generate tag data using a portion of a first page offset of the first physical address and a physical frame number (PFN) of the first physical address, based on the first page size (Fig.4-5; Para25-27 "The indices are utilized to walk the translation tree itself in order to find the page of physical addresses, then the offset is utilized to determine which actual physical address within the page of physical addresses is correct").
Regarding claim 5, the combination of Campbell and Tsirkin teaches all the limitations of the base claims as outlined above.
Further, Campbell teaches wherein the memory processing unit is further configured to generate the tag data further based on a process identifier executed by an operating system in addition to the portion of the first page offset and the PFN (Fig.4-5; Para25-27).
Regarding claim 6, the combination of Campbell and Tsirkin teaches all the limitations of the base claims as outlined above.
Further, Campbell teaches wherein the memory processing unit is further configured to determine a device PFN (DPFN) using a page table entry (PTE) found in an internal page table of the memory device based on the tag data, and generate the second physical address based on the DPFN(Fig.1,2,4; Para20-21, 25-27).
Regarding claim 7, the combination of Campbell and Tsirkin teaches all the limitations of the base claims as outlined above.
Further, Campbell teaches wherein the memory processing unit is further configured to: extract a page offset from the first physical address based on the second page size , and determine the second physical address by combining the page offset and a device physical frame number (DPFN)(Fig.1,2,4; Para20-21, 25-27).
Regarding claim 8, the combination of Campbell and Tsirkin teaches all the limitations of the base claims as outlined above.
Further, Campbell teaches wherein the memory processing unit is further configured to, when a miss is detected in at least one of a translation lookaside buffer (TLB), a huge page table entry (PTE), or an internal PTE, set up a new internal PTE corresponding to the second physical address in an internal page table of the memory device(Fig.1,2,4; Para21-23, 25-27).
Regarding claim 9, the combination of Campbell and Tsirkin teaches all the limitations of the base claims as outlined above.
Further, Tsirkin teaches wherein the memory device is configured to receive the memory access request from the host via an external bus based on at least one of a compute express link (CXL) protocol or a peripheral component interconnect (PCI) protocol (Fig.1, Para16-17,28).
Regarding claim 10, the combination of Campbell and Tsirkin teaches all the limitations of the base claims as outlined above.
Further, Campbell teaches wherein the memory device is configured to reserve a partial area of a memory module for a page cache used by an operating system of the host (Fig.1,4; Para16-17,21-23, 25-27).
Regarding claims 11-20, the combination of Campbell and Tsirkin teaches these claims according to the reasoning set forth in claim 1-10.
Conclusion
The prior art made of record , listed on form PTO-892, and not relied upon, if any, is considered pertinent to applicant's disclosure.
Cheriton et.al. US20190205261 teaches address translations with huge TLB.
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TASNIMA . MATIN
Primary Examiner
Art Unit 2135
/TASNIMA MATIN/Primary Examiner, Art Unit 2135