DETAILED ACTION
Claims 1-20 are pending.
Priority: Dec. 14, 2023(Provisional)
Assignee: Micron
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Allowable Subject Matter
Claim 2 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim(s) 8-20 are allowed.
The following is an examiner’s statement of reasons for allowance. Claim(s) 8 and 18 each contain the following limitations that distinguish the claims form the prior art:
“…omitting the adding the page ID to the cold list when the page ID is not already in the cold list and the cold list is full…”.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-4, 8-10, 12-13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Wang et al.(2020/0242034), and further in view of Golander et al.(20160170659).
As per claim 1, Wang discloses:
A storage system(Wang, [0018 -- Computer system 100 includes a data center 102. ]) comprising:
a memory array including multiple memory cells(Wang, [0020 -- Storage system 114 represents persistent storage devices (e.g., one or more hard disks, flash memory modules, solid state disks, and/or optical disks).]);
and a Wang, [0042 -- At block 308, cache module 132 adds the location identifier and mapping data to cold queue 220. Block 308 is expanded in FIG. 4, and described in detail by method 400 of FIG. 4], [0043 -- When data first enters data structure 136, it enters into a storage location within cold queue 220. Cold queue 220 uses a FIFO replacement algorithm. The FIFO algorithm is implemented via a cold pointer 222 (see FIG. 2). When old data stored at the storage location pointed to by cold pointer 222 is evicted, new data is added to that storage location, and cold pointer 222 shifts to the next storage location]) indicating cold memory pages accessed less frequently than other memory pages(Wang, [0017 -- In certain embodiments, the cold queue is a queue stored in memory that stores unimportant or less used memory pages than stored in the hot queue. In certain embodiments, the hot queue is a queue stored in memory that stores important or more frequently used memory pages than in the cold queue]), including:
add a page identifier (ID) of a memory page to the cold list in response to receiving a memory operation containing a memory address included in the memory page when the page ID is not already in the cold list(Wang, [0042 -- At block 308, cache module 132 adds the location identifier and mapping data to cold queue 220. Block 308 is expanded in FIG. 4, and described in detail by method 400 of FIG. 4.], [0017 -- In certain embodiments, the cold queue is a queue stored in memory that stores unimportant or less used memory pages than stored in the hot queue. In certain embodiments, the hot queue is a queue stored in memory that stores important or more frequently used memory pages than in the cold queue]);
Wang does not explicitly disclose the following, however Golander discloses:
and remove the page ID from the cold list when the page ID is already in the cold list(Golander, [0086 -- If the page is in Lr then the page is moved to the head of Lf (307) – i.e. If the page/page ID is in the Lr(cold list), then it is moved to Lf(hot list)]).
Therefore it would have been obvious to a person of ordinary skill at the time of filing to incorporate the features of Golander into the system of Wang for the benefit of the movement of pages through the lists enabling management of the pages which is adaptive to the workload, since by moving pages out from either Lr or Lf arbitrarily. The computer systems is improved by providing low latency I/O access while offering expanded physical memory space and also enabling to reduce costs due to use of cheaper storage devices partly replacing the more expensive storage devices(Golander, [088], [0118]).
As per claim 2, the rejection of claim 1 is incorporated, in addition, Wang discloses:
the cold list and page ID;
Wang does not explicitly disclose the following, however Golander discloses:
wherein the Golander, [0062 -- In one embodiment of the invention a memory is maintained into two lists, one list for pages that were accessed once (Lr) and another list that includes pages that were accessed more than once (Lf).], [0086 -- In one embodiment, once there is a request to access a page (302) it is determined whether the request is for a new page (e.g., a page not in any list) or whether the request is for repeated access], [0087 -- If there is an access request for a new page, the pool of free pages is examined to see if there is a free page (304). If there is a free page (e.g., in the pool) then a page is allocated (306). However, if there are no free pages are available a page (one or more) must be moved out of the memory to allow room for a new page (one or more). – i.e. evicting a page is done in this step but it does not add another page; no free page in Lr(cold list)]).
Therefore it would have been obvious to a person of ordinary skill at the time of filing to incorporate the features of Golander into the system of Wang for the benefit of the movement of pages through the lists enabling management of the pages which is adaptive to the workload, since by moving pages out from either Lr or Lf arbitrarily. The computer systems is improved by providing low latency I/O access while offering expanded physical memory space and also enabling to reduce costs due to use of cheaper storage devices partly replacing the more expensive storage devices(Golander, [088], [0118]).
As per claim 3, the rejection of claim 1 is incorporated, in addition Wang discloses:
wherein the Wang, [0043 -- Cold queue 220 uses a FIFO replacement algorithm. The FIFO algorithm is implemented via a cold pointer 222 (see FIG. 2). When old data stored at the storage location pointed to by cold pointer 222 is evicted, new data is added to that storage location, and cold pointer 222 shifts to the next storage location]).
As per claim 4, the rejection of claim 1 is incorporated, in addition, Wang discloses:
wherein the Wang, [0037 -- Presence of a hash of the location identifier within hash table 200 indicates that the location identifier is stored within one of queues 210, 220, or 230, and that data associated with the location identifier is within cache 138 (or was recently within cache 138 if the location identifier is in ghost queue 210)]);
determine a page ID hash using the page ID and a hash function(Wang, [0032 -- Hash table 200 includes entries that are indexed according to a hash of a location identifier, or in some embodiments, just the location identifier.]);
and add the page ID to cold list by inserting the page ID into the cold hash table using the page ID hash as an index into the cold hash table(Wang, [0048 -- Cache module 132 adds a hash of the location identifier, which was added to cold queue 220 at block 408, to hash table 200]).
Claim(s) 6, 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Wang et al.(2020/0242034), further in view of Golander et al.(20160170659), and further in view of Arad et al.(10587516).
As per claim 6, the rejection of claim 4 is incorporated, in addition, Wang discloses:
processor, page ID and cold hash table;
Wang does not explicitly disclose the following, however Arad discloses:
wherein the processor is configured to discard the page ID when a cold hash table entry indexed by the page ID hash is not empty and the cold hash table is full(Arad, [Col. 11 lines 53-57 -- At block 410, cache module 132 updates hash table 200 to reflect the presence of new data within data structure 136]).
Therefore it would have been obvious to a person of ordinary skill at the time of filing to incorporate the features of Arad into the system of Wang in view of Golander for the benefit of facilitates inserting an increased number of keys into a hash lookup table of a given size as compared to the number of keys that can be inserted into the hash lookup table using conventional methods for inserting keys. Selecting a key with a maximum, or a highest, number of remaining possible memory locations for storing the key in the hash table decreases insertion failures in the hash table and increases memory load utilization of the hash table(Arad, Col. 10 lines 1-5).
Claim(s) 7, 11, 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Wang et al.(2020/0242034), further in view of Golander et al.(20160170659), and further in view of Gazit et al.(10007615).
As per claim 7, the rejection of claim 4 is incorporated, in addition, Wang discloses:
processor, page ID and cold hash table;
Wang does not explicitly disclose the following, however Gazit discloses:
wherein the processor is configured to include a timestamp of the memory operation with the page ID in the cold hash table(Gazit, [Col. 7, lines 43-50 -- Flow diagram 300 illustrates searching, inserting, and deleting entries from multiple hash tables of a cache. In some embodiments, each information block data entry of the hash tables in FIG. 2 includes a time stamp and a hash value. The hash value is generated by applying the hash function (corresponding to the particular hash table) on an incoming data block. In some embodiments, the incoming data block can be a 46-bit virtual address]).
Therefore it would have been obvious to a person of ordinary skill at the time of filing to incorporate the features of Gazit into the system of Wang in view of Golander for the benefit of multi-level hashing being implemented in a cache to assure constant delay in access time and very low probability of failure and the cache sits between a processor and a memory in a computer system to provide fast access to critical information(Gazit, Col. 1 lines 58-62).
Response to Arguments
Applicant's arguments filed 3/18/2026 have been fully considered but they are not persuasive.
Regarding claim 1, the applicant contends that the prior art of Wang and Golander does not disclose:
…A storage system including a memory controller configured to produce a cold list of memory pages of the memory array indicating cold memory pages accessed less frequently than other memory pages…
The USPTO disagrees. The prior art of Wang discloses in Fig. 2, 0017 and 0043 that the cold queue contains storage locations of data accessed less frequently than pages referenced in the hot queue also shown in Fig. 2. The USPTO maintains this rejection.
Additionally, the applicant argues that the prior art of Wang, Golander and Guda does not disclose:
“…concatenate the page ID to a previous page ID previously stored at the cold hash table entry indexed by the page ID hash when the cold hash table entry is not empty…”.
The USPTO disagrees. The prior art of Guda, Col. 8 lines 66-67, and col. 9 lines 1-5 discloses allocating an ACD(allocation Cluster Descriptor) with previously allocated ACDs by chaining(concatenating) them in a cold list. The USPTO maintains this rejection.
Regarding the applicant’s remarks for claims 6 and 7 on pg. 9 of the Remarks, the position of the USPTO is since claim 1 is properly rejected, and the combination of the prior art Wang, Golander Arad for 6 or Wang, Golander, Gazit for 7 teach the limitations, the rejections are maintained.
Applicant’s arguments, regarding claim(s) 2, 8 and 18, have been fully considered and are persuasive. The rejections of claim(s) 2, 8-20 have been withdrawn.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ARVIND TALUKDAR whose telephone number is (303)297-4475. The examiner can normally be reached M-F, 10 am-6pm EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Hosain Alam can be reached at 571-272-3978. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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Arvind Talukdar
Primary Examiner
Art Unit 2132
/ARVIND TALUKDAR/Primary Examiner, Art Unit 2132