Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on December 5, 2024; May 16, 2025; and October 3, 2025 were filed. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Election/Restrictions
Applicant’s election without traverse of Species I (Fig. 1 and 3) in the reply filed on February 23, 2026 is acknowledged.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1, 12, and 22 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112(pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 (lines 5-10) recites "a protection circuit comprising at least one pair of transistors sharing a gate terminal to adjust, based on the first inverted voltage and the second inverted voltage, one of a first intermediate voltage and a second intermediate voltage of the protection circuit; a cross-coupling circuit configured to adjust an other of the first intermediate voltage and the second intermediate voltage; and an output circuit configured to invert the first intermediate voltage to output". It is unclear which first intermediate voltage is to be inverted by the output circuit, as there appears to be a first intermediate voltage of the protection circuit and a first intermediate voltage of the cross-coupling circuit. Thus, this is indefinite under 112(b).
Further, regarding the first section and second section of the claim recited above, the examiner suggests the claim could be rewritten as "a protection circuit comprising at least one pair of transistors sharing a gate terminal to adjust, based on the first inverted voltage and the second inverted voltage, one of a plurality of first intermediate voltage and one of a plurality of second intermediate voltage of the protection circuit; a cross-coupling circuit configured to adjust an other one of the plurality of the first intermediate voltage and one of the plurality of the second intermediate voltage". Regarding the third section of the claim recited above, for the purpose of compact prosecution, the claim is being interpreted as an output circuit configured to invert the first intermediate voltage from the protection circuit.
Claims 2-11 inherit the defects of the associated parent claim and/or any intervening claims.
Claim 12 (lines 5-14) recites "a protection circuit configured to adjust, based on the first inverted voltage and the second inverted voltage, one of a first intermediate voltage and a second intermediate voltage; a cross-coupling circuit configured to adjust an other of the first intermediate voltage and the second intermediate voltage; an output circuit configured to invert the first intermediate voltage to output an output voltage that swings between a second ground voltage level and a second power supply voltage level; and a metastable state-preventing circuit configured to allow the first intermediate voltage and the second intermediate voltage to escape from a metastable voltage level when the first intermediate voltage and the second intermediate voltage are at the metastable voltage level". It is unclear which first intermediate voltage is to be inverted by the output circuit, as there appears to be a first intermediate voltage of the protection circuit and a first intermediate voltage of the cross-coupling circuit. Thus, this is indefinite under 112(b). Further, it is unclear which first intermediate voltage and which second intermediate voltage corresponds to the metastable state-preventing circuit section of the claim, which is also indefinite under 112(b).
Further, the examiner suggests the claim could be rewritten similar to the suggestion in claim 1 regarding the first and second sections of claim 12 recited above. Regarding the third section of the claim recited above, for the purpose of compact prosecution, the claim is being interpreted as an output circuit configured to invert the first intermediate voltage from the cross-coupling circuit. Additionally, regarding the fourth section of the claim recited above, for the purpose of compact prosecution, the claim is being interpreted as a metastable state-preventing circuit configured to allow the first intermediate voltage and the second intermediate voltage, from the protection circuit.
Claims 13-15 and 17-18 inherit the defects of the associated parent claim and/or any intervening claims.
Claim 22 (lines 5-13) recites "an output circuit configured to invert the first intermediate voltage to output an output voltage that swings between a second ground voltage level and a second power supply voltage level; and an auxiliary circuit connected to a bias voltage and configured to assist in adjusting the first intermediate voltage and the second intermediate voltage". It is unclear which first intermediate voltage is to be inverted by the output circuit, as there appears to be a first intermediate voltage of the protection circuit and a first intermediate voltage of the cross-coupling circuit. Thus, this is indefinite under 112(b). Further, it is unclear which first intermediate voltage and which second intermediate voltage corresponds to the auxiliary circuit section of the claim, which is also indefinite under 112(b).
Further, the examiner suggests the claim could be rewritten similar to the suggestion in claim 12 above regarding the first, second, and third sections of claim 12 recited above. Regarding the third section of the claim recited above, for the purpose of compact prosecution, the claim is being interpreted as an output circuit configured to invert the first intermediate voltage from the protection circuit. Additionally, regarding the fourth section of the claim recited above, for the purpose of compact prosecution, the claim is being interpreted as an auxiliary circuit configured to assist in adjusting the first intermediate voltage and the second intermediate voltage, from the protection circuit.
Claims 23 and 25 inherit the defects of the associated parent claim and/or any intervening claims.
Claim Rejections - 35 USC § 102
Applicant is reminded that claim mapping is provided as a courtesy to the applicant, but applicant should consider a reference as a whole, as the entire reference gives context to mapped sections.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-5, 9-10, 22-23, and 25 are rejected under 35 U.S.C. 102(a)(1) and 102(a)(2) as being anticipated by Schrom et al. (US 7199617 B1); hereinafter Schrom.
Regarding Claim 1, as best understood, Schrom discloses a level shifter [Fig. 3] comprising: an input circuit [305] configured to invert an input voltage [d] to output a first inverted voltage [output of U1] and a second inverted voltage [output of U2], wherein the input voltage swings between a first ground voltage [355] and a first power supply voltage [360]; a protection circuit [310/315] comprising at least one pair of transistors sharing a gate terminal [M5/M6, M7/M8, M9/M10, M11/M12] to adjust, based on the first inverted voltage and the second inverted voltage, one of a first intermediate voltage [voltage at node near 345] and a second intermediate voltage [voltage at node near 350] of the protection circuit; a cross-coupling circuit [320] configured to adjust an other of the first intermediate voltage and the second intermediate voltage; and an output circuit [U5] configured to invert the first intermediate voltage to output an output voltage [y3] that swings between a second ground voltage [365] and a second power supply voltage [370].
Regarding Claim 2, as best understood, Schrom discloses the level shifter of claim 1, wherein the input circuit comprises: a first inverter [U1] configured to invert the input voltage to output the first inverted voltage; and a second inverter [U2] configured to invert the first inverted voltage to output the second inverted voltage.
Regarding Claim 3, as best understood, Schrom discloses the level shifter of claim 1, wherein the at least one pair of transistors of the protection circuit comprises a first pair of transistors [M9/M10] configured to be turned on based on the first power supply voltage, a second pair of transistors [M7/M8] configured to be turned on based on a first gate voltage [voltage at gates of M7/M8], and a third pair of transistors [M5/M6] configured to be turned on based on a second gate voltage [voltage at gates of M5/M6], the first pair of transistors comprises a first protection switching element [M9] configured to receive the first inverted voltage and a second protection switching element [M10] configured to receive the second inverted voltage, the second pair of transistors comprises a third protection switching element [M7] connected to the first protection switching element and a fourth protection switching element [M8] connected to the second protection switching element, and the third pair of transistors comprises a fifth protection switching element [M5] connected to the third protection switching element, and a sixth protection switching element [M6] connected to the fourth protection switching element.
Regarding Claim 4, as best understood, Schrom discloses the level shifter of claim 3, further comprising a bias generation circuit [313] connected to the second power supply voltage terminal [V2] and the first ground voltage terminal configured to generate the first gate voltage, the second gate voltage, and a bias voltage [voltage applied to C1/C2].
Regarding Claim 5, as best understood, Schrom discloses the level shifter of claim 4, wherein the bias generation circuit comprises a buffer [M13/M14] configured to buffer the second gate voltage to output the bias voltage.
Regarding Claim 9, as best understood, Schrom discloses the level shifter of claim 1, further comprising an auxiliary circuit [C1/C2/C3/C4] connected to a bias voltage [voltage at drain terminals of M13/M14] and configured to assist in adjusting the first intermediate voltage and the second intermediate voltage.
Regarding Claim 10, as best understood, Schrom discloses the level shifter of claim 9, wherein the at least one pair of transistors of the protection circuit comprises: a first protection switching element [M9] and a second protection switching element [M10], which are configured to be turned on based on the first power supply voltage; a third protection switching element [M7] and a fourth protection switching element [M8], which are configured to be turned on based on a first gate voltage [voltage at gates of M7/M8]; and a fifth protection switching element [M5] and a sixth protection switching element [M6], which are configured to be turned on based on a second gate voltage [voltage at gates of M5/M6], and wherein the auxiliary circuit comprises: a first auxiliary switching element [C1] connected to the bias voltage and configured to be turned on based on a voltage between the third protection switching element and the fifth protection switching element [voltage at terminals between M5/M7] to assist in adjusting the first intermediate voltage; and a second auxiliary switching element [C2] connected to the bias voltage and configured to be turned on based on a voltage between the fourth protection switching element and the sixth protection switching element [voltage at terminals between M6/M8] to assist in adjusting the second intermediate voltage.
Regarding Claim 22, as best understood, Schrom discloses a level shifter [Fig. 3] comprising: an input circuit [305] configured to invert an input voltage [d] to output a first inverted voltage [output of U1] and a second inverted voltage [output of U2], wherein the input voltage swings between a first ground voltage level [355] and a first power supply voltage level [360]; a protection circuit [310/315] configured to adjust, based on the first inverted voltage and the second inverted voltage, one of a first intermediate voltage [voltage at node near 345] and a second intermediate voltage [voltage at node near 350]; a cross-coupling circuit [320] configured to adjust an other of the first intermediate voltage and the second intermediate voltage; an output circuit [U5] configured to invert the first intermediate voltage to output an output voltage [y3] that swings between a second ground voltage level [365] and a second power supply voltage level [370]; and an auxiliary circuit [C1/C2/C3/C4] connected to a bias voltage [voltage at drain terminals of M13/M14] and configured to assist in adjusting the first intermediate voltage and the second intermediate voltage.
Regarding Claim 23, as best understood, Schrom discloses the level shifter of claim 22, wherein the protection circuit comprises: a first protection switching element [M9] and a second protection switching element [M10], which are configured to be turned on based on a first power supply voltage [V1]; a third protection switching element [M7] and a fourth protection switching element [M8], which are configured to be turned on based on a first gate voltage [voltage at gates of M7/M8]; and a fifth protection switching element [M5] and a sixth protection switching element [M6], which are configured to be turned on based on a second gate voltage [voltage at gates of M5/M6].
Regarding Claim 25, as best understood, Schrom discloses the level shifter of claim 23, wherein the auxiliary circuit comprises: a first auxiliary switching element [C1] connected to the bias voltage and configured to be turned on based on a voltage [voltage at terminals between M5/M7] between the third protection switching element and the fifth protection switching element to assist in adjusting the first intermediate voltage; and a second auxiliary switching [C2] element connected to the bias voltage and configured to be turned on based on a voltage [voltage at terminals between M6/M8] between the fourth protection switching element and the sixth protection switching element to assist in adjusting the second intermediate voltage.
Claim Rejections - 35 USC § 103
Applicant is reminded that claim mapping is provided as a courtesy to the applicant, but applicant should consider a reference as a whole, as the entire reference gives context to mapped sections.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Schrom, in view of Alam et al. (US 9647660 B1); hereinafter Schrom, in view of Alam.
Regarding Claim 6, as best understood, Schrom does not explicitly disclose the level shifter of claim 1, further comprising a metastable state-preventing circuit configured to allow the first intermediate voltage and the second intermediate voltage to escape from a metastable voltage level when the first intermediate voltage and the second intermediate voltage are at the metastable voltage level.
However, Alam discloses wherein the level shifter [Fig. 3] further comprises a metastable state-preventing circuit [M8/M11] configured to allow the first intermediate [voltage at node 309] voltage and the second intermediate voltage [voltage at node 312] to escape from a metastable voltage level [column 11, lines 39-60] when the first intermediate voltage and the second intermediate voltage are at the metastable voltage level. It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Schrom, in view of Alam, by including a metastable state-preventing circuit of Alam with the level shifter of Schrom, for the purpose of avoiding a meta-stable state.
Claims 7-8 are rejected under 35 U.S.C. 103 as being unpatentable over Schrom, in view of Alam, further in view of Tandon et al. (US 8218377 B2); hereinafter Schrom, in view of Alam, further in view of Tandon.
Regarding Claim 7, as best understood, Schrom, in view of Alam, discloses the level shifter of claim 6, wherein the at least one pair of transistors of the protection circuit comprises a first pair of transistors [Schrom, M9/M10] configured to be turned on based on the first power supply voltage, a second pair of transistors [Schrom, M7/M8] configured to be turned on based on a first gate voltage [Schrom, voltages at gates of M7/M8], and a third pair of transistors [M5/M6] configured to be turned on based on a second gate voltage [voltage at gates of M5/M6], and wherein the metastable state-preventing circuit comprises: a first metastable switching element [Alam, M8] connected to the second power supply voltage and configured to be turned on or off based on the second intermediate voltage; and a second metastable switching element [Alam, M11] connected to the first metastable switching element and configured to be turned on or off based on the first intermediate voltage. Schrom, in view of Alam, does not explicitly disclose a third metastable switching element connected to the second metastable switching element and configured to be turned on based on the second gate voltage.
However, Tandon discloses a level shifter [Fig. 6] which comprises a metastable state-preventing circuit [404c/404d] that comprises: a first metastable switching element [610] connected to the second power supply voltage [GND between 518/520] and configured to be turned on or off based on the second intermediate voltage [voltage at node N2]; a second metastable switching element [606] connected to the first metastable switching element [through 518/520] and configured to be turned on or off based on the first intermediate voltage [voltage at node N1]; and a third metastable switching element [608] connected to the second metastable switching element and configured to be turned on based on the second gate voltage. It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Schrom, in view of Alam, further in view of Tandon, by adding a third metastable switching element, for the purpose of avoiding a meta-stable state.
Regarding Claim 8, as best understood, Schrom, in view of Alam, further in view of Tandon, discloses the level shifter of claim 7, wherein the first metastable switching element is turned on when the second intermediate voltage is at the metastable voltage level, and the second metastable switching element is turned on when the first intermediate voltage is at the metastable voltage level.
Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Schrom, in view of Schrom/Vunnam (US 20140210517 A1); hereinafter Schrom, in view of Schrom/Vunnam.
Regarding Claim 11, as best understood, Schrom discloses the level shifter [Fig. 2, Fig. 3] of claim 1, wherein the at least one pair of transistors of the protection circuit comprises: a first protection switching element [M9] and a second protection switching element [M10], which are configured to be turned on based on the first power supply voltage; a third protection switching element [M7] and a fourth protection switching element [M8], which are configured to be turned on based on a first gate voltage [voltage at gates of M7/M8]; and a fifth protection switching element [M5] and a sixth protection switching element [M6], which are configured to be turned on based on a second gate voltage [voltage at gates of M5/M6], and wherein the level shifter further comprises a capacitor circuit [Fig. 2, C1/C2] comprising: a third capacitor [Fig. 2, C1] connected in parallel to the first protection switching element [Fig. 2, M7] and the third protection switching element [Fig. 2, M5]; and a fourth capacitor [Fig. 2, C2] connected in parallel to the second protection switching element [Fig. 2, M8] and the fourth protection switching element [Fig. 2, M6]. Schrom does not explicitly disclose a first capacitor connected in parallel to the first protection switching element, the third protection switching element, and the fifth protection switching element; and a second capacitor connected in parallel to the second protection switching element, the fourth protection switching element, and the sixth protection switching element.
However, Schrom/Vunnam discloses wherein the level shifter [Fig. 2B] further comprises a capacitor circuit [C1/C2] comprising: a first capacitor [C1] connected in parallel to the first protection switching element [MN2], the third protection switching element [MN1], and the fifth protection switching element [MP5]; and a second capacitor [C2] connected in parallel to the second protection switching element [MN4], the fourth protection switching element [MN3], and the sixth protection switching element [MP6]. It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Schrom, in view of Schrom/Vunnam, by adding a first and second capacitor to be connected in parallel with the first/third/fifth and second/fourth/sixth protection switching elements, respectively, for the purpose of enabling a level shifting stage by performing quick level shifting operations and eliminating problems associated with the cross-coupled circuit.
Claims 12-15 and 17-18 are rejected under 35 U.S.C. 103 as being unpatentable over Schrom, in view of Tandon.
Regarding Claim 12, as best understood, Schrom discloses a level shifter [Fig. 3] comprising: an input circuit [305] configured to invert an input voltage [d] to output a first inverted voltage [output of U1] and a second inverted voltage [output of U2], wherein the input voltage swings between a first ground voltage level [355] and a first power supply voltage level [360]; a protection circuit [310/315] configured to adjust, based on the first inverted voltage and the second inverted voltage, one of a first intermediate voltage [voltage at node near 345] and a second intermediate voltage [voltage at node near 350]; a cross-coupling circuit [320] configured to adjust an other of the first intermediate voltage and the second intermediate voltage; an output circuit [U5] configured to invert the first intermediate voltage to output an output voltage [y3] that swings between a second ground voltage [365] and a second power supply voltage [370]. Schrom does not explicitly disclose a level shifter comprising a metastable state-preventing circuit configured to allow the first intermediate voltage and the second intermediate voltage to escape from a metastable voltage level when the first intermediate voltage and the second intermediate voltage are at the metastable voltage level.
However, Tandon discloses a level shifter [Fig. 6] comprising a metastable state-preventing circuit [404c/404d] configured to allow the first intermediate voltage [voltage at node N1] and the second intermediate voltage [voltage a node N2] to escape from a metastable voltage level [column 7, lines 41-67; column 8, lines 1-4] when the first intermediate voltage and the second intermediate voltage are at the metastable voltage level. It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Schrom, in view of Tandon, by including a metastable state-preventing circuit of Tandon with the level shifter of Schrom, for the purpose of avoiding a meta-stable state.
Regarding Claim 13, as best understood, Schrom, in view of Tandon, discloses the level shifter of claim 12, wherein the metastable state-preventing circuit comprises: a first metastable switching element [Tandon, 610] connected to a second power supply voltage [Tandon, GND between 518/520] and configured to be turned on or off based on the second intermediate voltage; a second metastable switching element [Tandon, 606] connected to the first metastable switching element [Tandon, through 518/520] and configured to be turned on or off based on the first intermediate voltage; and a third metastable switching element [Tandon, 608] connected to the second metastable switching element and configured to be turned on based on a second gate voltage.
Regarding Claim 14, as best understood, Schrom, in view of Tandon, discloses the level shifter of claim 13, wherein the first metastable switching element is configured to be turned on when the second intermediate voltage is at the metastable voltage level, and the second metastable switching element is configured to be turned on when the first intermediate voltage is at the metastable voltage level.
Regarding Claim 15, as best understood, Schrom, in view of Tandon, discloses the level shifter of claim 12, wherein the protection circuit comprises: a first protection switching element [Schrom, M9] and a second protection switching element [Schrom, M10], which are configured to be turned on based on a first power supply voltage [Schrom, 360]; a third protection switching element [Schrom, M7] and a fourth protection switching element [Schrom, M8], which are configured to be turned on based on a first gate voltage [Schrom, voltage at gates of M7/M8]; and a fifth protection switching element [Schrom, M5] and a sixth protection switching element [Schrom, M6], which are configured to be turned on based on a second gate voltage [Schrom, voltage at gates of M5/M6].
Regarding Claim 17, as best understood, Schrom, in view of Tandon, discloses the level shifter of claim 15, further comprising a bias generation circuit [Schrom, 313] connected to the second power supply voltage terminal and the first ground voltage terminal and configured to generate the first gate voltage, the second gate voltage, and a bias voltage [Schrom, voltage applied to C1/C2].
Regarding Claim 18, as best understood, Schrom, in view of Tandon, discloses the level shifter of claim 17, wherein the bias generation circuit comprises a buffer [Schrom, M13/M14] configured to buffer the second gate voltage to output the bias voltage.
Conclusion
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/Amit R Bhatia/Examiner, Art Unit 2842
/REGIS J BETSCH/SPE, Art Unit 2843