CTNF 18/971,304 CTNF 84450 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Email Communication Applicant is encouraged to authorize the Examiner to communicate with applicant via email by filing form PTO/SB/439 either via USPS, Central Fax, or EFS-Web. See MPEP 502.01, 502.03, 502.05. Specification 06-11 AIA The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. 06-31 AIA The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification. Claim Rejections - 35 USC § 102 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 07-15-aia AIA Claim(s) 1-2, 4-13, & 15-18 is/are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by JP2014225697A hereafter referred to as Inoue . In regards to claim 1, Inoue discloses A multilayer electronic component, comprising: a body (29 – fig. 2; [0033]) including a capacitance formation portion (37 – fig. 2; [0033]) including a dielectric layer (24-25 – fig. 2; [0034]) and first and second internal electrodes (27-28 – fig. 2; [0033]) disposed alternately in a first direction with the dielectric layer interposed therebetween, and cover portions (38-39 – fig.2; [0033]) disposed in an upper portion and a lower portion of the capacitance formation portion in the first direction; and external electrodes (34-35 – fig. 2; [0030])disposed on the body, wherein the capacitance formation portion includes outer regions (41 – fig. 2; [0033]) adjacent to the cover portion and a central region (40 – fig. 2; [0033]) other than the outer region, and wherein an average thickness of the first internal electrode included in the outer regions is greater than an average thickness of the first internal electrode included in the central region, and an average thickness of the second internal electrode included in the outer regions is greater than an average thickness of the second internal electrode included in the central region (table 1 – samples 22-23; [0055]). In regards to claim 2, Inoue discloses The multilayer electronic component of claim 1, wherein, when an average thickness of a first internal electrode included in the central region is defined as tea, and an average thickness of the first internal electrode included in the outer regions is defined as teb, 1.6 ≤ teb/tea ≤ 2.0 is satisfied (table 1 – sample 22). In regards to claim 4, Inoue discloses The multilayer electronic component of claim 1, wherein the cover portion includes an upper cover portion (38 – fig. 2) disposed in an upper portion of the capacitance formation portion in the first direction and a lower cover portion (39 – fig. 2) disposed in a lower portion of the capacitance formation portion in the first direction, wherein the outer regions includes an upper outer region (41 – fig. 2) adjacent to the upper cover portion and a lower outer region (41 – fig. 2) adjacent to the lower cover portion, and wherein the upper outer region includes one or more of each of the first and second internal electrodes, and the lower outer region includes one or more of each of the first and second internal electrodes (fig. 2). In regards to claim 5, Inoue discloses The multilayer electronic component of claim 2, wherein, when an average thickness of the second internal electrode included in the central region is defined as tea’ and an average thickness of the second internal electrode included in the outer region is defined as teb’, 1.6 ≤ teb’/tea’ ≤ 2.0 is satisfied (table 1 – sample 22). In regards to claim 6, Inoue discloses The multilayer electronic component of claim 5, wherein tea and tea’ satisfy 0.9 ≤ tea/tea’ ≤ 1.1, and teb and teb’ satisfy 0.9 ≤ teb/teb’ ≤ 1.1 (table 1 – sample 22). In regards to claim 7, Inoue discloses The multilayer electronic component of claim 1, wherein, when a sum of a number of first and second internal electrodes included in the central region is defined as Na, and a sum of a number of first and second internal electrodes included in the outer regions is defined as Nb, Nb/Na is 0.04 or more (table 1 – sample 22). In regards to claim 8, Inoue discloses The multilayer electronic component of claim 1, wherein, when a sum of a number of first and second internal electrodes included in the central region is defined as Na and a sum of a number of first and second internal electrodes included in the outer regions is defined as Nb, Nb/Na is 0.04 or more and 25 or less (table 1 – sample 22). In regards to claim 9, Inoue discloses The multilayer electronic component of claim 1, wherein, when an average thickness of the first internal electrode included in the central region is defined as tea and an average thickness of the first internal electrode included in the outer regions is defined as teb, 1.8 ≤ teb/tea ≤ 2.0 is satisfied (table 1 – sample 22), and wherein, when a sum of numbers of the first and second internal electrodes included in the central region is defined as Na and a sum of numbers of the first and second internal electrodes included in the outer regions is defined as Nb, Nb/Na is 0.04 or more and 2.59 or less (table 1 – sample 22). In regards to claim 10, Inoue discloses The multilayer electronic component of claim 1, wherein the cover portion includes the dielectric layer and does not include the first and second internal electrodes (fig. 2; [0035]). In regards to claim 11, Inoue discloses The multilayer electronic component of claim 1, wherein the cover portion includes the dielectric layer (fig. 2; [0035]). In regards to claim 12, Inoue discloses The multilayer electronic component of claim 1, wherein the cover portion includes an upper cover portion (38 – fig. 2) disposed in an upper portion of the capacitance formation portion in the first direction and a lower cover portion (39 – fig. 2) disposed in a lower portion of the capacitance formation portion in the first direction, and the outer regions includes an upper outer region (41 – fig. 2) adjacent to the upper cover portion and a lower outer region (41 – fig. 2) adjacent to the lower cover portion, and wherein, when an average thickness of the upper outer region in the first direction is defined as tb1 and an average thickness of the lower outer region in the first direction is defined as tb2, 0.9 ≤ tb1/tb2 ≤ 1.1 is satisfied (fig. 2; table 1 – sample 22). In regards to claim 13, Inoue discloses The multilayer electronic component of claim 1, wherein, when an average thickness in the first direction of the outer regions is defined as tb and an average thickness in the first direction of the central region is defined as ta, tb/ta is 0.03 or more fig. 2; [0039]). In regards to claim 15, Inoue discloses A multilayer electronic component, comprising: a top cover portion (38 – fig.2; [0033]) and a bottom cover portion (39 – fig.2; [0033]) disposed above and below a capacitance forming portion (37 – fig. 2; [0033]) in a stacking direction, the capacitance forming portion comprising: an uppermost pair of internal electrodes (27-28 in section 41 – fig. 2; [0033]) with a dielectric layer disposed therein, disposed adjacent the top cover portion, a lowermost pair of internal electrodes (27-28 in section 41 – fig. 2; [0033]) with a dielectric layer disposed therein, disposed adjacent the bottom cover portion, and central pairs of internal electrodes (27-28 in section 40 – fig. 2; [0033]) disposed between the uppermost and lowermost pairs, wherein an average thickness of the central pairs of internal electrodes is smaller than an average thickness of the uppermost and/or lowermost pairs of internal electrodes (table 1 – samples 22-23; [0055]). In regards to claim 16, Inoue discloses The multilayer electronic component of claim 15, wherein the average thickness of the uppermost and/or lowermost pairs of internal electrodes is in a range from 1.6 times to 2.0 times that of the central pairs of internal electrodes (table 1 – samples 22). In regards to claim 17, Inoue discloses The multilayer electronic component of claim 15, wherein the average thickness of central pairs of internal electrodes is substantially the same among the central pairs (table 1 – samples 22). In regards to claim 18, Inoue discloses The multilayer electronic component of claim 15, wherein the average thickness of the uppermost and/or lowermost pairs of internal electrodes is substantially the same among the uppermost and/or lowermost pairs (table 1 – samples 22) . 07-15-aia AIA Claim(s) 1, 14-15, & 19 is/are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Lee et al. (US 2015/0136462) . In regards to claim 1, Lee ‘462 discloses A multilayer electronic component, comprising: a body (110 – fig. 2; [0034]) including a capacitance formation portion including a dielectric layer (111 – fig. 2; [0034]) and first and second internal electrodes (121-122 – fig. 2; [0034]) disposed alternately in a first direction with the dielectric layer interposed therebetween, and cover portions (fig. 2) disposed in an upper portion and a lower portion of the capacitance formation portion in the first direction; and external electrodes (131-132 – fig. 2; [0036]) disposed on the body, wherein the capacitance formation portion includes outer regions (120B – fig. 2; [0063]) adjacent to the cover portion and a central region (120A – fig. 2; [0063]) other than the outer region, and wherein an average thickness of the first internal electrode included in the outer regions is greater than an average thickness of the first internal electrode included in the central region, and an average thickness of the second internal electrode included in the outer regions is greater than an average thickness of the second internal electrode included in the central region (table 1 – sample 1-2 & [0063]). In regards to claim 14, Lee ‘462 discloses The multilayer electronic component of claim 1, wherein, when an average thickness of the dielectric layer included in the central region is defined as tda and an average thickness of the dielectric layer included in the outer regions is defined as tdb, 0.9 ≤ tdb/tda ≤ 1.1 is satisfied (fig. 2; [0071]). In regards to claim 15, Lee ‘462 discloses A multilayer electronic component, comprising: a top cover portion and a bottom cover portion disposed above and below a capacitance forming portion in a stacking direction (seen in fig. 2), the capacitance forming portion comprising: an uppermost pair of internal electrodes (121-122 – fig. 2; [0034]) with a dielectric layer (111 – fig. 2; [0034]) disposed therein, disposed adjacent the top cover portion, a lowermost pair of internal electrodes (121-122 – fig. 2; [0034]) with a dielectric layer (111 – fig. 2; [0034]) disposed therein, disposed adjacent the bottom cover portion, and central pairs of internal electrodes (121-122 – fig. 2; [0034]) disposed between the uppermost and lowermost pairs, wherein an average thickness of the central pairs of internal electrodes is smaller than an average thickness of the uppermost and/or lowermost pairs of internal electrodes (table 1 – sample 1-2 & [0063]). In regards to claim 19, Lee ‘462 discloses The multilayer electronic component of claim 15, wherein an average thickness of the dielectric layers disposed between the central pairs of internal electrodes is substantially the same as an average thickness of the dielectric layers disposed between the uppermost and/or lowermost pairs of internal electrodes (fig. 2; [0071]) . 07-15-aia AIA Claim(s) 1 is/are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Kim et al. (US 2020/0118748) . In regards to claim 1, Kim ‘748 discloses A multilayer electronic component, comprising: a body (110 – fig. 3; [0016]) including a capacitance formation portion (La & Lb portions – fig. 3) including a dielectric layer and first and second internal electrodes (121-122 & 125-126 – fig. 3; [0057]) disposed alternately in a first direction with the dielectric layer interposed therebetween, and cover portions (Lc – fig. 3) disposed in an upper portion and a lower portion of the capacitance formation portion in the first direction; and external electrodes (131-132 – fig. 3; [0016]) disposed on the body, wherein the capacitance formation portion includes outer regions (Lb – fig. 3) adjacent to the cover portion and a central region (La – fig. 3) other than the outer region, and wherein an average thickness of the first internal electrode included in the outer regions is greater than an average thickness of the first internal electrode included in the central region, and an average thickness of the second internal electrode included in the outer regions is greater than an average thickness of the second internal electrode included in the central region (fig. 3; table 1 & [0058]) . Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-23-aia AIA The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. 07-21-aia AIA Claim (s) 2-3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim ‘748 . In regards to claim 2, Kim ‘748 discloses wherein, when an average thickness of a first internal electrode included in the central region is defined as tea, and an average thickness of the first internal electrode included in the outer regions is defined as teb, 1.2 ≤ teb/tea is satisfied ([0058]). Kim ‘748 fails to explicitly discloses 1.6 ≤ teb/tea ≤ 2.0 is satisfied. However, Kim ‘748 discloses that teb/tea is a result effective variable, particularly for ensuring strong strength from external impacts such as warpage while also preventing delamination ([0055-0056]). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to construct the capacitor of Kim ‘748 such that 1.6 ≤ teb/tea ≤ 2.0 is satisfied to obtain a capacitor with good protection from warpage and delamination, as taught by Kim ‘748. Where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. In regards to claim 3, Kim ‘748 further discloses wherein tea is 300nm or more 937.5nm or less, and a teb is 480nm or more 1500nm ([0038] – tea is 400 nm or less therefore teb is 800 nm or less) . Conclusion 07-96 AIA The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. JP08298228A – fig. 1 US 2025/0372312 – fig. 2 US 2011/0141659 – table 1 US 2004/0179326 – [0024] US 2014/0355177 – table 1 – noting that one way to control connectivity of electrodes is increasing the thickness US 2023/0115608 – [0010] Communication Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVID M SINCLAIR whose telephone number is (571)270-5068. The examiner can normally be reached M-TH from 8AM-4PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, TIMOTHY J DOLE can be reached at (571)272-2229. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /David M Sinclair/Primary Examiner, Art Unit 2847 Application/Control Number: 18/971,304 Page 2 Art Unit: 2847 Application/Control Number: 18/971,304 Page 3 Art Unit: 2847 Application/Control Number: 18/971,304 Page 4 Art Unit: 2847 Application/Control Number: 18/971,304 Page 5 Art Unit: 2847 Application/Control Number: 18/971,304 Page 6 Art Unit: 2847 Application/Control Number: 18/971,304 Page 7 Art Unit: 2847 Application/Control Number: 18/971,304 Page 8 Art Unit: 2847 Application/Control Number: 18/971,304 Page 9 Art Unit: 2847 Application/Control Number: 18/971,304 Page 10 Art Unit: 2847 Application/Control Number: 18/971,304 Page 11 Art Unit: 2847 Application/Control Number: 18/971,304 Page 12 Art Unit: 2847 Application/Control Number: 18/971,304 Page 13 Art Unit: 2847
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